Editing Zero page (section)

== Page addressing ==
<!-- Note: The Intel 4004 had no zero page and did not support interrupts at all, but I parked this information here because it appears to be the most suitable place for now. This certainly needs to be reworded to put into a broader context. More research needed on behaviour on other processor types. -->
In some processor architectures, like that of the [[Intel 4004]] 4-bit processor, memory was divided into (256 byte) pages and special precautions had to be taken when the [[control flow]] crossed [[page boundary|page boundaries]], as some [[machine instruction]]s exhibited different behaviour if located in the last few instructions of a page, so that only few instructions were recommended to jump between pages.<ref name="Intel_1973_MCS-4"/>