Editing Dynamic random-access memory (section)

==External links==
* {{cite book |url=http://www.eecs.berkeley.edu/~culler/courses/cs252-s05/lectures/cs252s05-lec01-intro.ppt#359,15,Memory%20Capacity%20%20(Single%20Chip%20DRAM |first1=David |last1=Culler |chapter=Memory Capacity (Single Chip DRAM) |page=15 |title=EECS 252 Graduate Computer Architecture: Lecture 1 |publisher=Electrical Engineering and Computer Sciences,University of California, Berkeley |year=2005}} Logarithmic graph 1980–2003 showing size and cycle time.
* [http://www-1.ibm.com/servers/eserver/pseries/campaigns/chipkill.pdf Benefits of Chipkill-Correct ECC for PC Server Main Memory] — A 1997 discussion of SDRAM reliability—some interesting information on soft errors from [[cosmic ray]]s, especially with respect to [[error-correcting code]] schemes
* [http://www.tezzaron.com/about/papers/soft_errors_1_1_secure.pdf Tezzaron Semiconductor Soft Error White Paper] 1994 literature review of memory error rate measurements.
* {{cite web |url=http://www.nepp.nasa.gov/docuploads/40D7D6C9-D5AA-40FC-829DC2F6A71B02E9/Scal-00.pdf |title=Scaling and Technology Issues for Soft Error Rates |first1=A. |last1=Johnston |work=4th Annual Research Conference on Reliability Stanford University |date=October 2000|url-status=dead |archive-url=https://web.archive.org/web/20041103124422/http://www.nepp.nasa.gov/docuploads/40D7D6C9-D5AA-40FC-829DC2F6A71B02E9/Scal-00.pdf |archive-date=2004-11-03 }}
* {{cite journal |url=http://www.research.ibm.com/journal/rd/462/mandelman.html |title=Challenges and future directions for the scaling of dynamic random-access memory (DRAM)  |date=2002 |doi=10.1147/rd.462.0187|archive-url=https://web.archive.org/web/20050322211513/http://www.research.ibm.com/journal/rd/462/mandelman.html|archive-date=2005-03-22|last1=Mandelman |first1=J. A. |last2=Dennard |first2=R. H. |last3=Bronner |first3=G. B. |last4=Debrosse |first4=J. K. |last5=Divakaruni |first5=R. |last6=Li |first6=Y. |last7=Radens |first7=C. J. |journal=IBM Journal of Research and Development |volume=46 |issue=2.3 |pages=187–212 }}
* [https://arstechnica.com/paedia/r/ram_guide/ram_guide.part1-2.html Ars Technica: RAM Guide]
* {{cite thesis|first1=David Tawei |last1=Wang|title=Modern DRAM Memory Systems: Performance Analysis and a High Performance, Power-Constrained DRAM-Scheduling Algorithm|type=PhD |publisher=University of Maryland, College Park|year=2005|url=http://www.ece.umd.edu/~blj/papers/thesis-PhD-wang--DRAM.pdf|access-date=2007-03-10 |hdl=1903/2432}} A detailed description of current DRAM technology.
* [http://www.cs.berkeley.edu/~pattrsn/294 Multi-port Cache DRAM — '''MP-RAM''']
* {{cite web |url=https://lwn.net/Articles/250967/ |title=What every programmer should know about memory |first1=Ulrich |last1=Drepper  |year=2007}}
 
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[[Category:Computer memory]]
[[Category:Types of RAM]]
[[Category:American inventions]]
[[Category:20th-century inventions]]