Editing 64-bit computing (section)

== Limits of processors ==
In principle, a 64-bit microprocessor can address 16&nbsp;EB ({{nowrap|16 × 1024<sup>6</sup> <nowiki>=</nowiki> 2<sup>64</sup> <nowiki>=</nowiki> 18,446,744,073,709,551,616 bytes}}) of memory. However, not all instruction sets, and not all processors implementing those instruction sets, support a full 64-bit virtual or physical address space.

The [[x86-64|x86-64 architecture]] ({{as of|2024|March|lc=on}}) allows 48 bits for virtual memory and, for any given processor, up to 52 bits for physical memory.<ref>{{cite web|url=https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/programmer-references/24593.pdf|title=AMD64 Programmer's Manual Volume 2: System Programming|date=March 2024|publisher=Advanced Micro Devices|page=127}}</ref><ref>{{cite web|url=https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-3a-part-1-manual.pdf|title=Intel 64 and IA-32 Architectures Software Developer's Manual Volume 3A: System Programming Guide, Part 1|date=September 2016|publisher=Intel|at=p. 4-2}}</ref> These limits allow memory sizes of 256&nbsp;[[Terabyte|TB]] ({{nowrap|256 × 1024<sup>4</sup> bytes}}) and 4&nbsp;[[Petabyte|PB]] ({{nowrap|4 × 1024<sup>5</sup> bytes}}), respectively. A PC cannot currently contain 4&nbsp;[[petabyte]]s of memory (due to the physical size of the memory chips), but AMD envisioned large servers, shared memory clusters, and other uses of physical address space that might approach this in the foreseeable future. Thus the 52-bit physical address provides ample room for expansion while not incurring the cost of implementing full 64-bit physical addresses. Similarly, the 48-bit virtual address space was designed to provide 65,536 (2<sup>16</sup>) times the 32-bit limit of 4&nbsp;GB ({{nowrap|4 × 1024<sup>3</sup> bytes}}), allowing room for later expansion and incurring no overhead of translating full 64-bit addresses.

The [[Power ISA#Power ISA v.3.0|Power ISA v3.0]] allows 64 bits for an effective address, mapped to a segmented address with between 65 and 78 bits allowed, for virtual memory, and, for any given processor, up to 60 bits for physical memory.<ref>{{cite web|url=https://openpowerfoundation.org/?resource_lib=power-isa-version-3-0|title=Power ISA Version 3.0|publisher=[[IBM]]|date=November 30, 2015|page=983}}</ref>

The Oracle [[SPARC]] Architecture 2015 allows 64 bits for virtual memory and, for any given processor, between 40 and 56 bits for physical memory.<ref>{{cite web|url=https://community.oracle.com/servlet/JiveServlet/downloadBody/1005258-102-3-148654/OracleSparcArchitecture2015.pdf|title=Oracle SPARC Architecture 2015 Draft D1.0.9|date=November 16, 2016|page=475|publisher=[[Oracle Corporation|Oracle]]|archive-url=https://web.archive.org/web/20200422022137/https://community.oracle.com/servlet/JiveServlet/downloadBody/1005258-102-3-148654/OracleSparcArchitecture2015.pdf|archive-date=April 22, 2020|url-status=dead}}</ref>

The ARM [[AArch64]] Virtual Memory System Architecture allows from 48 to 56 bits for virtual memory and, for any given processor, from 32 to 56 bits for physical memory.<ref>{{cite web |title=ARM Architecture Reference Manual for A-profile architecture |url=https://developer.arm.com/documentation/ddi0487/latest |at=section D8.1.6 "Implemented physical address size", section D8.1.8 "Supported virtual address ranges" |date=30 November 2024}}</ref>

The [[DEC Alpha]] specification requires minimum of 43 bits of virtual memory address space (8&nbsp;TB) to be supported, and hardware need to check and trap if the remaining unsupported bits are zero (to support compatibility on future processors). [[Alpha 21064]] supported 43 bits of virtual memory address space (8&nbsp;TB) and 34 bits of physical memory address space (16&nbsp;GB). [[Alpha 21164]] supported 43 bits of virtual memory address space (8&nbsp;TB) and 40 bits of physical memory address space (1&nbsp;TB). [[Alpha 21264]] supported user-configurable 43 or 48 bits of virtual memory address space (8&nbsp;TB or 256&nbsp;TB) and 44 bits of physical memory address space (16&nbsp;TB).