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Instruction pipelining
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====Solutions==== Pipelined processors commonly use three techniques to work as expected when the programmer assumes that each instruction completes before the next one begins: *The pipeline could [[Pipeline stall|stall]], or cease scheduling new instructions until the required values are available. This results in empty slots in the pipeline, or ''bubbles'', in which no work is performed. *An additional data path can be added that routes a computed value to a future instruction elsewhere in the pipeline before the instruction that produced it has been fully retired, a process called [[operand forwarding]].<ref>{{cite web|url=http://www.csee.umbc.edu/~squire/cs411_l19.html |title=CMSC 411 Lecture 19, Pipelining Data Forwarding |publisher=University of Maryland Baltimore County Computer Science and Electrical Engineering Department |access-date=2020-01-22}}</ref><ref>{{Cite web |url=http://hpc.serc.iisc.ernet.in/~govind/hpc/L10-Pipeline.txt |title=High performance computing, Notes of class 11 |publisher=hpc.serc.iisc.ernet.in |date=September 2000 |access-date=2014-02-08 |url-status=dead |archive-url=https://web.archive.org/web/20131227033204/http://hpc.serc.iisc.ernet.in/~govind/hpc/L10-Pipeline.txt |archive-date=2013-12-27 }}</ref> *The processor can locate other instructions which are not dependent on the current ones and which can be immediately executed without hazards, an optimization known as [[out-of-order execution]].
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