Editing LLVM (section)

===Backends===
At version 16, LLVM supports many [[instruction set]]s, including [[IA-32]], [[x86-64]], [[ARM architecture|ARM]], [[Qualcomm Hexagon]], [[Loongson#LoongArch|LoongArch]], [[Motorola 68000|M68K]], [[MIPS architecture|MIPS]], [[Nvidia|NVIDIA]] [[Parallel Thread Execution]] (PTX, also named ''NVPTX'' in LLVM documentation), [[PowerPC]], [[TeraScale (microarchitecture)|AMD TeraScale]],<ref>{{cite mailing list |url=http://lists.llvm.org/pipermail/llvm-dev/2012-March/048409.html |title=[LLVMdev] RFC: R600, a new backend for AMD GPUs |mailing-list=llvm-dev |first=Tom |last=Stellard |date=March 26, 2012}}</ref> most recent [[Advanced Micro Devices|AMD]] GPUs (also named ''AMDGPU'' in LLVM documentation),<ref>{{cite web |url=https://llvm.org/docs/AMDGPUUsage.html |title=User Guide for AMDGPU Backend — LLVM 15.0.0git documentation}}</ref> [[SPARC]], [[z/Architecture]] (also named ''SystemZ'' in LLVM documentation), and [[XCore]]. 

Some features are not available on some platforms. Most features are present for IA-32, x86-64, z/Architecture, ARM, and PowerPC.<ref>[http://llvm.org/docs/CodeGenerator.html#target-feature-matrix Target-specific Implementation Notes: Target Feature Matrix] // The LLVM Target-Independent Code Generator, LLVM site.</ref> [[RISC-V]] is supported as of version 7. 

In the past, LLVM also supported other backends, fully or partially, including C backend, [[Cell (microprocessor)|Cell SPU]], [[MicroBlaze|mblaze (MicroBlaze)]],<ref>{{cite web |title=Remove the mblaze backend from llvm |website=GitHub |date=July 25, 2013 |url=https://github.com/llvm/llvm-project/commit/729866670b05108c399221ca3908400d94ef9783 |access-date=January 26, 2020}}</ref> AMD R600, DEC/Compaq [[DEC Alpha|Alpha]] ([[Alpha AXP]])<ref>{{cite web |title=Remove the Alpha backend. |website=GitHub |date=October 27, 2011 |url=https://github.com/llvm/llvm-project/commit/4c9fca99c9a6734bb33c34aeaf40b71c4002757e |access-date=January 26, 2020}}</ref> and [[Nios II|Nios2]],<ref name=" llvm 2019">{{cite web |title=&#91;Nios2&#93; Remove Nios2 backend |website=GitHub |date=January 15, 2019 |url=https://github.com/llvm/llvm-project/commit/99fcbf67d04d488d819bffb8fda3bb9d5504b63b |access-date=January 26, 2020}}</ref> but that hardware is mostly obsolete, and LLVM developers decided the support and maintenance costs were no longer justified.{{citation needed|date=December 2021}}

LLVM also supports [[WebAssembly]] as a target, enabling compiled programs to execute in WebAssembly-enabled environments such as [[Google Chrome]] / [[Chromium (web browser)|Chromium]], [[Firefox]], [[Microsoft Edge (series of web browsers)|Microsoft Edge]], [[Apple Safari]] or [[WAVM (virtual machine)|WAVM]]. LLVM-compliant WebAssembly compilers typically support mostly unmodified source code written in C, C++, D, Rust, Nim, Kotlin and several other languages.

The LLVM machine code (MC) subproject is LLVM's framework for translating machine instructions between textual forms and machine code. Formerly, LLVM relied on the system assembler, or one provided by a toolchain, to translate assembly into machine code. LLVM MC's integrated assembler supports most LLVM targets, including IA-32, x86-64, ARM, and ARM64. For some targets, including the various MIPS instruction sets, integrated assembly support is usable but still in the beta stage.{{citation needed|date=December 2021}}