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Memory protection
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=== Simulated segmentation === [[Simulation]] is the use of a [[system monitoring|monitoring]] [[computer program|program]] to interpret the machine code instructions of some computer architectures. Such an [[instruction set simulator]] can provide memory protection by using a segmentation-like scheme and validating the target address and length of each instruction in real time before actually executing them. The simulator must calculate the target address and length and compare this against a list of valid address ranges that it holds concerning the [[thread (computer science)|thread's]] environment, such as any dynamic [[computer memory|memory]] blocks acquired since the thread's inception, plus any valid shared static memory slots. The meaning of "valid" may change throughout the thread's life depending upon context. It may sometimes be allowed to alter a static block of storage, and sometimes not, depending upon the current mode of execution, which may or may not depend on a storage key or supervisor state.{{Citation needed|date=April 2007}} It is generally not advisable to use this method of memory protection where adequate facilities exist on a CPU, as this takes valuable processing power from the computer. However, it is generally used for debugging and testing purposes to provide an extra fine level of granularity to otherwise generic [[storage violation]]s and can indicate precisely which instruction is attempting to overwrite the particular section of storage which may have the same storage key as unprotected storage.
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