Editing PIC microcontrollers (section)

===PIC16===
{{Further|topic=this family of microcontrollers|PIC instruction listings#Mid-range core devices (14 bit)|PIC instruction listings#Enhanced mid-range core devices (14 bit)}}
[[File:AST Research Ascentia A Series - Synaptics TM1202SPU-154-5 - Microchip PIC16C58A-93300.jpg|thumb|Microchip PIC16C58A]]
[[File:PIC16LF870 in SOIC Socket.jpg|thumb|PIC16LF870 in SOIC Socket]]
These devices feature a 14-bit wide code memory, and an improved 8-level deep call stack. The instruction set differs very little from the baseline devices, but the two additional opcode bits allow 128 registers and 2048 words of code to be directly addressed. There are a few additional miscellaneous instructions, and two additional 8-bit literal instructions, add and subtract. The mid-range core is available in the majority of devices labeled PIC12 and PIC16.

The first 32 bytes of the register space are allocated to special-purpose registers; the remaining 96 bytes are used for general-purpose RAM. If banked RAM is used, the high 16 registers (0x70–0x7F) are global, as are a few of the most important special-purpose registers, including the STATUS register, which holds the RAM bank select bits. (The other global registers are FSR and INDF, the low 8 bits of the program counter PCL, the PC high preload register PCLATH, and the master interrupt control register INTCON.)

The PCLATH register supplies high-order instruction address bits when the 8 bits supplied by a write to the PCL register, or the 11 bits supplied by a <code>GOTO</code> or <code>CALL</code> instruction, are not sufficient to address the available ROM space.