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Programmable logic device
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== FPGAs == {{main|Field-programmable gate array}} While PALs were being developed into GALs and CPLDs (all discussed above), a separate stream of development was happening. This type of device is based on [[gate array]] technology and is called the [[field-programmable gate array]] (FPGA). Early examples of FPGAs are the 82S100 array, and 82S105 sequencer, by Signetics, introduced in the late 1970s. The 82S100 was an array of AND terms. The 82S105 also had flip-flop functions. (Remark: 82S100 and similar ICs from Signetics have PLA structure, AND-plane + OR-plane.) FPGAs use a grid of [[logic gate]]s, and once stored, the data doesn't change, similar to that of an ordinary gate array. The term ''field-programmable'' means the device is programmed by the customer, not the manufacturer. FPGAs and gate arrays are similar but gate arrays can only be configured at the factory during fabrication.<ref>{{cite book | url=https://books.google.com/books?id=mZRsBgAAQBAJ&dq=gate+array+custom&pg=SA4-PA28 | title=Electronics, Power Electronics, Optoelectronics, Microwaves, Electromagnetics, and Radar | isbn=978-1-4200-0315-4 | last1=Dorf | first1=Richard C. | date=3 October 2018 | publisher=CRC Press }}</ref><ref>{{cite book | url=https://books.google.com/books?id=ymoCEAAAQBAJ&dq=gate+array+custom&pg=PA276 | title=Embedded System Design: A Unified Hardware / Software Introduction | isbn=978-0-471-38678-0 | last1=Vahid | first1=Frank | last2=Givargis | first2=Tony D. | date=17 October 2001 | publisher=John Wiley & Sons }}</ref><ref>{{cite book | url=https://books.google.com/books?id=rMsqBgAAQBAJ&dq=gate+array+custom&pg=SA47-PA12 | title=The VLSI Handbook | isbn=978-1-4200-0596-7 | last1=Chen | first1=Wai-Kai | date=3 October 2018 | publisher=CRC Press }}</ref> FPGAs are usually programmed after being soldered down to the circuit board, in a manner similar to that of larger CPLDs. In most larger FPGAs, the configuration is volatile and must be re-loaded into the device whenever power is applied or different functionality is required. Configuration is typically stored in a configuration [[programmable read-only memory|PROM]], [[EEPROM]] or flash memory.<ref>{{cite web |url=https://cdrdv2-public.intel.com/654742/cfg_cf52010.pdf |title=Using Flash Memory to Configure FPGAs |publisher=[[Altera]] |access-date=2024-08-21}}</ref> EEPROM versions may be in-system programmable (typically via [[JTAG]]). The difference between FPGAs and CPLDs is that FPGAs are internally based on [[Lookup table|look-up tables]] (LUTs), whereas CPLDs form the logic functions with sea-of-gates (e.g. [[Canonical normal form|sum of products]]). CPLDs are meant for simpler designs while FPGAs are meant for more complex designs. In general, CPLDs are a good choice for wide [[combinational logic]] applications, whereas FPGAs are more suitable for large [[state machine]]s such as [[microprocessors]].
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