Editing Risc PC (section)

== Limitations ==
The 16&nbsp;MHz [[front-side bus]] is usually recognised as being the most significant fault of the computer; and the arrival of the (five times faster) [[StrongARM]] processor in 1996 meant that the Risc PC had a [[Central processing unit|CPU]] significantly faster than the computer had been designed for. Acorn had originally expected ARM&nbsp;CPUs to progress from the 30&nbsp;MHz ARM6 to the 40&nbsp;MHz ARM7, and then onto the ARM8 cores, which at the time were clocked at around 50–80&nbsp;MHz. In 2000, Castle released "Kinetic", a new StrongARM processor board with its own onboard memory slots augmenting main memory, reducing the need to negotiate the slow front-side bus for memory accesses.

The podule bus on the Risc PC can achieve a maximum data throughput of approximately 6100&nbsp;KByte/s. It is 32-bit and Risc PC predecessors have a 16-bit bus.<ref>{{cite web|url=http://www.drobe.co.uk/article.php?id=1076|title=Podule Bus review|date=2 June 2004|publisher=[[Drobe]]|first1=Andrew|last1=Hill|first2=Chris|last2=Williams|access-date=30 August 2019}}</ref> For comparison, the [[conventional PCI|PCI bus]], which was available in systems at the time of the Risc PC's introduction, is over 20 times faster. The transfer of 650&nbsp;MB would take 2 minutes via podule, compared to 5 seconds via PCI.