Editing 3B series computers (section)

===3B4000===
The 3B4000 is a [[high availability]] server introduced in 1987<ref>{{cite news |newspaper=[[The New York Times]]
|url=https://www.nytimes.com/1987/09/03/business/computers-introduced-at-at-t.html
|title=Computers Introduced At A.T.&T.
|author=Calvin Sims  |date=September 3, 1987}}</ref> and based on a 'snugly-coupled' architecture using the WE series 32x00 32-bit processor.  Known internally as 'Apache', the 3B4000 is a follow-on to the 3B15 and initial revisions use a 3B15 as a master processor.  Developed in the mid-1980's at the [[Lisle, Illinois|Lisle]] Indian Hill West facility by the High Performance Computer Development Lab, the system consists of multiple high performance (at the time) processor boards – adjunct processing elements (APEs) and adjunct communication elements (ACEs).  These adjunct processors run a customized UNIX kernel with drivers for SCSI (APEs) and serial boards (ACEs). The processing boards are interconnected by a redundant low latency parallel bus (ABUS) running at 20 MB/s. The UNIX kernels running on the adjunct processors are modified to allow the fork/exec of processes across processing units.  The system calls and peripheral drivers are also extended to allow processes to access remote resources across the ABUS.  Since the ABUS is hot-swappable, processors can be added or replaced without shutting down the system. If one of the adjunct processors fails during operation, the system can detect and restart programs that were running on the failed element.

The 3B4000 is capable of significant expansion; one test system (including storage) occupies 17 mid-height cabinets.  Generally, the performance of the system increases linearly with additional processing elements, however the lack of a true [[shared memory]] capability requires rewriting applications that rely heavily on this feature to avoid a severe performance penalty.