Editing 555 timer IC (section)

=== Astable ===
{{stack|[[File:555 Astable Diagram.svg|thumb|Schematic of a 555 timer in astable mode]]}}
{{stack|[[File:NE555 Astable Waveforms.svg|thumb|Waveform in astable mode]]}}
{{see also|Electronic oscillator}}
{| class="wikitable floatright" style="text-align: right"
|-
|+ Astable mode examples with [[E series of preferred numbers|common values]]
! [[Frequency]] !! [[Capacitance|C]] !! [[Electrical resistance and conductance|R<sub>1</sub>]] !! R<sub>2</sub> !! [[Duty cycle]]
|-
| 0.1{{nbsp}}Hz (+0.048%) || 100{{nbsp}}μF || 8.2{{nbsp}}kΩ || 68{{nbsp}}kΩ || 52.8%
|-
| 1{{nbsp}}Hz (+0.048%) || 10{{nbsp}}μF || 8.2{{nbsp}}kΩ || 68{{nbsp}}kΩ || 52.8%
|-
| 10{{nbsp}}Hz (+0.048%) || 1{{nbsp}}μF || 8.2{{nbsp}}kΩ || 68{{nbsp}}kΩ || 52.8%
|-
| 100{{nbsp}}Hz (+0.048%) || 100{{nbsp}}nF || 8.2{{nbsp}}kΩ || 68{{nbsp}}kΩ || 52.8%
|-
| 1{{nbsp}}kHz (+0.048%) || 10{{nbsp}}nF || 8.2{{nbsp}}kΩ || 68{{nbsp}}kΩ || 52.8%
|-
| 10{{nbsp}}kHz (+0.048%) || 1{{nbsp}}nF || 8.2{{nbsp}}kΩ || 68{{nbsp}}kΩ || 52.8%
|-
| 100{{nbsp}}kHz (+0.048%) || 100{{nbsp}}pF || 8.2{{nbsp}}kΩ || 68{{nbsp}}kΩ || 52.8%
|}<!-- NOTE: Common preferred values are best for examples. Capacitors are E3 series values, resistors are E6 or E12 series values. user:sbmeirow -->

In the astable configuration, the 555 timer puts out a continuous stream of rectangular pulses having a specific period.

The astable configuration is implemented using two resistors, <math>R_1</math> and <math>R_2 ,</math> and one capacitor <math>C</math>. The threshold and trigger pins are both connected to the capacitor; thus they have the same voltage.

Its repeated operating cycle (starting with the capacitor uncharged) is:

# Since the capacitor's voltage will be below {{Frac|1|3}}&nbsp;''V''<sub>CC</sub>, the trigger pin causes the 555's internal latch to change state, causing OUT to go high and the internal discharge transistor to cut-off.
# Since the discharge pin is no longer short-circuited to ground, the capacitor starts charging via current from Vcc through the resistors <math>R_1</math> and <math>R_2</math>.
# Once the capacitor charge reaches {{Frac|2|3}}&nbsp;Vcc, the threshold pin causes the 555's internal latch to change state, causing OUT to go low and the internal discharge transistor to go into saturation (maximal-conductivity) mode.
# This discharge transistor provides a discharge path, so the capacitor starts discharging through <math>R_2</math>.
# Once the capacitor's voltage drops below {{Frac|1|3}}&nbsp;''V''<sub>CC</sub>, the cycle repeats from step 1.

During the first pulse, the capacitor charges from 0&nbsp;V to {{Frac|2|3}}&nbsp;''V''<sub>CC</sub>, however, in later pulses, it only charges from {{Frac|1|3}}&nbsp;''V''<sub>CC</sub> to {{Frac|2|3}}&nbsp;''V''<sub>CC</sub>. Consequently, the first pulse has a longer high time interval compared to later pulses. Moreover, the capacitor charges through both resistors but only discharges through <math>R_2</math>, thus the output high interval is longer than the low interval. This is shown in the following equations:

The output high time interval of each pulse is given by:<ref name="Signetics_1973_555-556_Databook"/>

: <math>t_\text{high} = \ln(2) \cdot (R_1 + R_2) \cdot C</math>

The output low time interval of each pulse is given by:<ref name="Signetics_1973_555-556_Databook"/>

: <math>t_\text{low} = \ln(2) \cdot R_2 \cdot C</math>

Hence, the [[frequency]] <math>f</math> of the pulse is given by:<ref name="Signetics_1973_555-556_Databook"/>

: <math>f = \frac{1}{t_\text{high} + t_\text{low}} = \frac{1}{\ln(2) \cdot (R_1 + 2 \, R_2) \cdot C}</math>

and the [[duty cycle]] <math>D</math> is given by:<ref name="Signetics_1973_555-556_Databook"/>

: <math>D~(\%) = \frac{t_\text{high}}{t_\text{high} + t_\text{low}} \cdot 100 = \frac{R_1 + R_2}{R_1 + 2 \, R_2} \cdot 100</math>

where <math>t</math> is the time in [[second]]s, <math>R</math> is the resistance in [[ohm]]s, <math>C</math> is the capacitance in [[farad]]s, and <math>\ln(2)</math> is the [[natural logarithm of 2|natural log of 2]] constant.{{Efn|[[natural logarithm of 2|ln(2)]] is a constant, approximately 0.693147 (rounded to 6 significant digits), or commonly rounded to fewer digits in 555 timer books and datasheets to 0.693, 0.69, or 0.7}}

[[File:555 Mk-sp Diagram.svg|thumb|right|Schematic of a 555 timer in astable mode with a 1N4148 diode to create a duty cycles less than 50%]]
Resistor <math>R_1</math> requirements:
* The maximum current through <math>R_1</math> must be lower than the maximum current rating of the internal transisor at the DISCHARGE pin, because this transistor "shorts" the DISCHARGE pin to the GND pin (per internal schematics above) to drain the capacitor.  This is the reason why <math>R_1</math> shouldn't be a very low resistance, such as when a variable [[Trimmer (electronics)|trimmer]] or [[potentiometer]] is used instead of a fixed value resistor.
* The maximum power rating of <math>R_1</math> must be greater than <math>\frac{{V_\text{CC}}^2}{R_1}</math>, per [[Ohm's law]].

==== Shorter duty cycle ====
To create an output high time shorter than the low time (i.e., a [[duty cycle]] less than 50%) a fast diode (i.e. [[1N4148 signal diode]]) can be placed in parallel with R<sub>2</sub>, with the cathode on the capacitor side.<ref name="Signetics_1973_555-556_Databook"/> This bypasses R<sub>2</sub> during the high part of the cycle, so that the high interval depends only on R<sub>1</sub> and C, with an adjustment based on the voltage drop across the diode. The low time is unaffected by the diode and so remains <math display="inline">\ln(2) \, R_2 \, C \, .</math> But the diode's forward [[voltage drop]] ''V''<sub>diode</sub> slows charging on the capacitor, so the high time is longer than the often-cited <math display="inline">\ln(2) \, R_1 \, C</math> to become:

: <math>t_\text{high} = \ln\left(\frac{2 \, V_\text{CC} - 3 \, V_\text{diode}}{V_\text{CC} - 3 \, V_\text{diode}}\right) \cdot R_1 \cdot C,</math>

where ''V''<sub>diode</sub> is when the diode's "on" current is {{Frac|1|2}} of ''V''<sub>CC</sub>/R<sub>1</sub> (which [[Diode forward voltage drop|depends on the type of diode]] and can be found in datasheets or measured). When V<sub>diode</sub> is small relative to ''V''<sub>cc</sub>, this charging is faster and approaches <math display="inline">\ln(2) \, R_1 \, C</math> but is slower the closer V<sub>diode</sub> is to ''V''<sub>cc</sub>:

<blockquote>As an extreme example, when ''V''<sub>CC</sub> = 5&nbsp;V, and V<sub>diode</sub> = 0.7&nbsp;V, high time is 1.00&nbsp;R<sub>1</sub>C, which is 45% longer than the "expected" 0.693&nbsp;R<sub>1</sub>C. At the other extreme, when ''V''<sub>cc</sub> = 15&nbsp;V, and V<sub>diode</sub> = 0.3&nbsp;V, the high time is 0.725&nbsp;R<sub>1</sub>C, which is closer to the expected 0.693&nbsp;R<sub>1</sub>C. The equation approaches 0.693&nbsp;R<sub>1</sub>C as ''V''<sub>diode</sub> approaches 0&nbsp;V.</blockquote>

==== Voltage-controlled pulse-width modulation ====
In the previous example schematics, the control pin was not used, thus it should connected to ground through a 10&nbsp;[[Farad|nF]] [[decoupling capacitor]] to shunt electrical noise. However, if a time-varying voltage source was applied to the control pin, then the pulse widths would be dependent on the control voltage.