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Cyrix 6x86
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===6x86MX / MII=== Another release of the 6x86, the '''6x86MX''', added [[MMX (instruction set)|MMX]] compatibility along with the [[Extended MMX|EMMI]] instruction set, improved compatibility with the Pentium and Pentium Pro by adding a [[Time Stamp Counter]] and CMOVcc instructions respectively, and quadrupled the primary cache size to 64 KB. The 256-byte instruction line cache can be turned into a [[Scratchpad memory|scratchpad cache]] to provide support for multimedia operations.<ref name=6x86MXDataSheet /> Later revisions of this chip were renamed '''MII''', to better compete with the Pentium II processor. 6x86MX / '''MII''' was late to market, and couldn't scale well in clock speed with the manufacturing processes used at the time. <gallery mode="nolines" heights="200" widths="200" perrow="1" style="margin-left: auto; margin-right: auto;"> File:Cyrix 6x86MX die.JPG|Cyrix 6x86MX (M2) die shot </gallery>
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