Editing Debugger (section)

==Hardware support for debugging==
Most modern microprocessors have at least one of these features in their [[CPU design]] to make debugging easier:
*Hardware support for single-stepping a program, such as the [[trap flag]].
*An instruction set that meets the [[Popek and Goldberg virtualization requirements]] makes it easier to write debugger software that runs on the same CPU as the software being debugged; such a CPU can execute the inner loops of the program under test at full speed, and still remain under debugger control.
*[[In-system programming]] allows an external hardware debugger to reprogram a system under test (for example, adding or removing instruction breakpoints). Many systems with such ISP support also have other hardware debug support.
*Hardware support for code and data [[breakpoint]]s, such as address comparators and data value comparators or, with considerably more work involved, [[page fault]] hardware.<ref>Aggarwal and Kumar 2003, pp. 299-301.</ref>
*[[JTAG]] access to hardware debug interfaces such as those on [[ARM architecture]] processors or using the [[Nexus (standard)|Nexus]] command set. Processors used in embedded systems typically have extensive JTAG debug support.
*Micro controllers with as few as six pins need to use low pin-count substitutes for JTAG, such as [[Background debug mode interface|BDM]], [[Spy-Bi-Wire]], or [[debugWIRE]] on the [[Atmel AVR]]. DebugWIRE, for example, uses bidirectional signaling on the RESET pin.