Editing Lisp machine (section)

===Developments of Lisp machines outside the United States===
In 1984–85 a UK firm, Racal-Norsk, a joint subsidiary of [[Racal]] and [[Norsk Data]], attempted to repurpose Norsk Data's [[ND-500]] supermini as a microcoded Lisp machine, running CADR software: the Knowledge Processing System (KPS).<ref>{{cite journal |title= Computer Algebra in Norway, Racal-Norsk KPS-5 and KPS-10 Multi-User Lisp Machines |publisher=Springer link |doi= 10.1007/3-540-15984-3_297 }}</ref>

There were several attempts by Japanese manufacturers to enter the Lisp machine market: the [[Fujitsu]] [[Facom-alpha]]<ref>{{cite web |url= http://museum.ipsj.or.jp/en/computer/other/0006.html |work= Computer Museum |title= Facom Alpha |publisher= IPSJ |access-date= 12 November 2011}}</ref> mainframe co-processor, NTT's Elis,<ref>{{cite web|url= http://museum.ipsj.or.jp/en/computer/other/0004.html |publisher= IPSJ |work= Computer Museum |title= NTT ELIS |date=9 September 1983 |access-date=12 November 2011}}</ref><ref>{{cite journal|url=http://ci.nii.ac.jp/naid/110002673521/en |title= A 32-bit LISP Processor for the Al Workstation ELIS with a Multiple Programming Paradigm Language, TAO |journal= Journal of Information Processing |publisher= NII |date= 25 August 1990 |volume= 13 |issue= 2 |pages= 156–164 |access-date=12 November 2011|last1= Yasushi |first1= Hibino }}</ref> Toshiba's AI processor (AIP)<ref>{{cite journal|url= http://ci.nii.ac.jp/naid/110002673519 |title= Architecture of an AI Processor Chip (IP1704) |journal= Journal of Information Processing |publisher= NII |date=25 August 1990 |volume= 13 |issue= 2 |pages= 144–149 |access-date= 12 November 2011|last1= Mitsuo |first1= Saito }}</ref> and NEC's LIME.<ref>{{cite web|url= http://museum.ipsj.or.jp/en/computer/other/0008.html |publisher= IPSJ |work= Computer Museum |title= NEC LIME Lisp Machine |access-date= 12 November 2011}}</ref> Several university research efforts produced working prototypes, among them are Kobe University's TAKITAC-7,<ref>{{cite web |url= http://museum.ipsj.or.jp/en/computer/other/0001.html |publisher= IPSJ |work= Computer Museum |title= Kobe University Lisp Machine |date= 10 February 1979 |access-date= 12 November 2011}}</ref> RIKEN's FLATS,<ref>{{cite web |url= http://museum.ipsj.or.jp/en/computer/other/0005.html |publisher= IPSJ |work= Computer Museum |title= RIKEN FLATS Numerical Processing Computer |access-date=12 November 2011}}</ref> and Osaka University's EVLIS.<ref>{{cite web|url= http://museum.ipsj.or.jp/en/computer/other/0003.html |publisher= IPSJ |work= Computer Museum |title= EVLIS Machine |access-date=12 November 2011}}</ref>

In France, two Lisp Machine projects arose: M3L<ref>{{cite web |url= http://www.limsi.fr/~jps/actions/m3l/m3l.htm |title= M3L, A Lisp-machine |publisher= Limsi |access-date= 12 November 2011}}</ref> at Toulouse Paul Sabatier University and later MAIA.<ref>{{cite web |url= http://www.limsi.fr/~jps/actions/maia/maia.htm |title= MAIA, Machine for Artificial Intelligence |publisher=Limsi |access-date= 12 November 2011}}</ref>

In Germany Siemens designed the RISC-based Lisp co-processor COLIBRI.<ref>{{Citation |first1= Christian |last1= Hafer |first2= Josef |last2= Plankl |first3= Franz Josef |last3= Schmidt | title= COLIBRI: A Coprocessor for LISP based on RISC |language= en |journal= VLSI for Artificial Intelligence and Neural Networks |publisher= Springer |date= 1991 |pages= 47–56 |doi= 10.1007/978-1-4615-3752-6_5 |isbn= 978-1-4613-6671-3 |place= Boston, MA}}</ref><ref>{{Citation |last= Müller-Schloer |contribution= Bewertung der RISC-Methodik am Beispiel COLIBRI |language= de |title= RISC-Architekturen |editor-first= A |editor-last= Bode |trans-title=Risc architectures |publisher= BI |year= 1988}}</ref><ref>{{Citation |first1= Christian |last1= Hafer |first2= Josef |last2= Plankl |first3= FJ |last3= Schmitt |trans-title=Colibri: a RISC, Lisp system |title= COLIBRI: Ein RISC-LISP-System |language= de |journal= Architektur von Rechensystemen, Tagungsband |publisher= 11. ITG/GI-Fachtagung |date= 7–9 Mar 1990 |place= München, [[Germany|DE]]}}</ref><ref>{{Citation |first1= Christian |last1= Legutko |first2= Eberhard |last2= Schäfer |first3= Jürgen |last3= Tappe |trans-title=The instruction pipeline of the Colibri system |title= Die Befehlspipeline des Colibri-Systems |language= de |journal= Architektur und Betrieb von Rechensystemen, Tagungsband |series= Informatik-Fachberichte |publisher= 10. ITG/GI-Fachtagung |date= 9–11 Mar 1988 |volume= 168 |pages= 142–151 |doi= 10.1007/978-3-642-73451-9_12 |isbn= 978-3-540-18994-7 |place= Paderborn, [[Germany|DE]]}}</ref>