Editing MOSFET (section)

=== Modes of operation ===
[[file:MOSFET functioning.svg|thumb|upright=2|Source tied to the body to ensure no body bias:{{avoid wrap|top left: Subthreshold, top right: Ohmic mode,}} bottom left: Active mode at onset of pinch-off, bottom right: Active mode well into pinch-off&nbsp;– channel length modulation evident]]
[[file:mosfet n-ch circuit.svg|right|thumb|upright=1.2|Example application of an n-channel MOSFET. When the switch is pushed, the LED lights up.<ref name="brunningsoftware_co_uk-FET">{{cite web|title=Using a MOSFET as a Switch|url=http://brunningsoftware.co.uk/FET.htm|archive-url=https://web.archive.org/web/20180411173010/http://brunningsoftware.co.uk/FET.htm |archive-date=2018-04-11 }} 090507 brunningsoftware.co.uk</ref>]]

The operation of a MOSFET can be separated into three different modes, depending on the device's [[threshold voltage]] (<math>V_\text{th}</math>), gate-to-source voltage (<math>V_\text{GS}</math>), and drain-to-source voltage (<math>V_\text{DS}</math>). In the following discussion, a simplified algebraic model is used.<ref name=Hodges>{{cite journal|first1=H.|last1=Shichman |first2=D. A.|last2=Hodges |name-list-style=amp |title=Modeling and simulation of insulated-gate field-effect transistor switching circuits |journal=IEEE Journal of Solid-State Circuits |volume=SC-3 |issue=3 |pages=285–289 |year=1968 |doi=10.1109/JSSC.1968.1049902 |bibcode=1968IJSSC...3..285S |url=https://ieeexplore.ieee.org/document/1049902 |url-status=dead |archiveurl=https://web.archive.org/web/20130610140024/http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=1049902 |archivedate=June 10, 2013 }}</ref> Modern MOSFET characteristics are more complex than the algebraic model presented here.<ref name=Hu>For example, see {{cite book
 |title=MOSFET modeling & BSIM3 user's guide
 |url=https://books.google.com/books?id=R5DP56qUql4C
 |isbn=978-0-7923-8575-2 |year=1999 |publisher=Springer
 |first1=Yuhua|last1=Cheng
 |first2=Chenming|last2=Hu
}} The most recent version of the [[BSIM]] model is described in {{cite web
 |title=BSIM-CMG 106.1.0beta Multi-Gate MOSFET Compact Model
 |first1=Sriramkumar|last1=V.
 |first2=Navid|last2=Paydavosi
 |first3=Darsen|last3=Lu
 |first4=Chung-Hsun|last4=Lin
 |first5=Mohan|last5=Dunga
 |first6=Shijing|last6=Yao
 |first7=Tanvir|last7=Morshed
 |first8=Ali|last8=Niknejad
 |first9=Chenming|last9=Hu
 |name-list-style=amp
 |url=http://www-device.eecs.berkeley.edu/bsim/Files/BSIMCMG/BSIMCMG106.0.0/BSIMCMG106.0.0_TechnicalManual_20120313.pdf
 |year=2012
 |publisher=Department of Electronic Engineering and Computer Science, University of California Berkeley
 |access-date=2012-04-01
 |url-status=dead
 |archive-url=https://web.archive.org/web/20140727084407/http://www-device.eecs.berkeley.edu/bsim/Files/BSIMCMG/BSIMCMG106.0.0/BSIMCMG106.0.0_TechnicalManual_20120313.pdf
 |archive-date=2014-07-27
 }}</ref>

For an ''enhancement-mode, n-channel MOSFET'', the three operational modes are:

==== Cutoff, subthreshold, and weak-inversion mode====

Criterion: <math>V_\text{GS} < V_\text{th} .</math>

According to the basic threshold model, the transistor is turned off, and there is no conduction between drain and source. A more accurate model considers the effect of thermal energy on the [[Fermi–Dirac distribution]] of electron energies which allow some of the more energetic electrons at the source to enter the channel and flow to the drain. This results in a subthreshold current that is an exponential function of gate-source voltage. While the current between drain and source should ideally be zero when the transistor is being used as a turned-off switch, there is a weak-inversion current, sometimes called subthreshold leakage.

In weak inversion where the source is tied to bulk, the current varies exponentially with <math>V_\text{GS}</math> as given approximately by:<ref name=Gray-Meyer>
{{ cite book
 | first1 = P. R. | last1=Gray
 | first2=P. J. | last2=Hurst
 | first3=S. H. | last3=Lewis
 | first4=R. G. | last4=Meyer
 | name-list-style=amp
 | title=Analysis and Design of Analog Integrated Circuits
 | year = 2001
 | pages=66–67
 | edition=4th
 | publisher = Wiley
 | location=New York
 | isbn=978-0-471-32168-2
 | url = http://worldcat.org/isbn/0471321680
}}</ref><ref name=vanRoermund>
{{ cite book
 | first1 = P. R. | last1=van der Meer
 | first2=A. | last2=van Staveren
 | first3=A. H. M. | last3=van Roermund
 | title = Low-Power Deep Sub-Micron CMOS Logic: Subthreshold Current Reduction
 | year = 2004
 | page=78
 | publisher=Springer
 | location=Dordrecht
 | isbn = 978-1-4020-2848-9
 | url=https://books.google.com/books?id=nyken8ivkb8C&pg=PA78 
}}</ref>

<math display="block">I_\text{D} \approx I_\text{D0} e^\frac{V_\text{GS} - V_\text{th}}{nV_\text{T}}, </math>

where <math>I_\text{D0}</math> = current at <math>V_\text{GS} = V_\text{th}</math>, the thermal voltage <math>V_\text{T} = kT/q</math> and the slope factor ''n'' is given by:

<math display="block">n = 1 + \frac{C_\text{dep}}{C_\text{ox}},</math>

with <math>C_\text{dep}</math> = capacitance of the depletion layer and <math>C_\text{ox}</math> = capacitance of the oxide layer. This equation is generally used, but is only an adequate approximation for the source tied to the bulk. For the source not tied to the bulk, the subthreshold equation for drain current in saturation is<ref>{{cite web|last=Degnan|first=Brian|title=Wikipedia fails subvt|url=https://sites.google.com/site/degnan68k/semiconductors/wikipedia-fails-subvt}}</ref><ref>{{cite book|last=Mead|first=Carver|title=Analog VLSI and Neural Systems|year=1989|publisher=Addison-Wesley|location=Reading, Massachusetts|isbn=9780201059922|page=370}}</ref>

<math display="block">I_\text{D} \approx I_\text{D0} e^\frac{V_\text{G} - V_\text{th}}{nV_\text{T}} e^{-\frac{  V_\text{S}}{V_\text{T}}}. </math>

In a long-channel device, there is no drain voltage dependence of the current once <math>V_\text{DS} \gg V_\text{T}</math>, but as channel length is reduced [[drain-induced barrier lowering]] introduces drain voltage dependence that depends in a complex way upon the device geometry (for example, the channel doping, the junction doping and so on). Frequently, threshold voltage ''V''<sub>th</sub> for this mode is defined as the gate voltage at which a selected value of current ''I''<sub>D0</sub> occurs, for example, ''I''<sub>D0</sub> = 1{{nbsp}}μA, which may not be the same ''V''<sub>th</sub>-value used in the equations for the following modes.

Some micropower analog circuits are designed to take advantage of subthreshold conduction.<ref name="Smith-Hamilton">{{cite book |first1=Leslie S.|last1=Smith |first2=Alister|last2=Hamilton |title=Neuromorphic Systems: Engineering Silicon from Neurobiology |date=1998 |pages=52–56 |publisher=World Scientific |isbn=978-981-02-3377-8 | url=https://books.google.com/books?id=kWSXEHyQL9sC&pg=PA55 }}</ref><ref name="Kumar">{{cite book | first=Satish|last=Kumar | title=Neural Networks: A Classroom Approach |date=2004 |page=688 |publisher=Tata McGraw-Hill |isbn=978-0-07-048292-0 |url=https://books.google.com/books?id=GJQh-2p6TvgC&pg=PA688 }}</ref><ref name="Conference">{{cite book | first1 = Manfred|last1=Glesner |first2=Peter|last2=Zipf |first3=Michel|last3=Renovell |title=Field-programmable Logic and Applications: 12th International Conference |date=2002 |page=425 |location=Dordrecht |publisher=Springer |isbn=978-3-540-44108-3 | url = https://books.google.com/books?id=fneXs6IY2-oC&pg=PA425}}</ref> By working in the weak-inversion region, the MOSFETs in these circuits deliver the highest possible transconductance-to-current ratio, namely: <math>g_m/I_\text{D} = 1/\left(nV_\text{T}\right)</math>, almost that of a bipolar transistor.<ref>{{cite book |title=Circuits and systems tutorials |chapter=The Fundamentals of Analog Micropower Design |editor1-first=Chris |editor1-last=Toumazou |editor2-first=Nicholas C. |editor2-last=Battersby |editor3-first=Sonia |editor3-last=Porta |first=Eric A. |last=Vittoz | publisher = John Wiley and Sons |date=1996 |isbn=978-0-7803-1170-1 |pages=365–372 |chapter-url=https://books.google.com/books?id=WTInL9njOKAC&pg=PA367 }}</ref>

The subthreshold ''[[I–V curve]]'' depends exponentially upon threshold voltage, introducing a strong dependence on any manufacturing variation that affects threshold voltage; for example: variations in oxide thickness, junction depth, or body doping that change the degree of drain-induced barrier lowering. The resulting sensitivity to fabricational variations complicates optimization for leakage and performance.<ref name=Shukla>{{ cite book | first1 =Sandeep K.|last1=Shukla |first2=R. Iris|last2=Bahar |author2-link=R. Iris Bahar | title=Nano, Quantum and Molecular Computing | year = 2004 | at=p. 10 and Fig. 1.4, p. 11 | publisher = Springer | isbn=978-1-4020-8067-8 | url = https://books.google.com/books?id=lLvo1iMGhJgC&pg=PA10}}</ref><ref name=Srivasta>{{ cite book | first1 =Ashish|last1=Srivastava |first2=Dennis|last2=Sylvester |first3=David|last3=Blaauw | title=Statistical Analysis and Optimization For VLSI: Timing and Power | year = 2005 | page=135 | publisher=Springer | isbn = 978-0-387-25738-9 | url = https://books.google.com/books?id=WqsQTyOu5jwC&pg=PA9 }}</ref>

[[file:IvsV mosfet.svg|thumb|upright=1.2|MOSFET drain current vs. drain-to-source voltage for several values of <math>V_\text{GS} - V_\text{th}</math>; the boundary between ''linear'' (''Ohmic'') and ''saturation'' (''active'') modes is indicated by the upward curving parabola.]]
[[file:Mosfet linear.svg|thumb|upright=1.2|Cross section of a MOSFET operating in the linear (Ohmic) region; strong inversion region present even near drain.]]
[[file:Mosfet saturation.svg|thumb|upright=1.2|Cross section of a MOSFET operating in the saturation (active) region; channel exhibits [[channel length modulation|channel pinching]] near drain.]]

====Triode mode or linear region (also known as the ohmic mode){{anchor|Linear mode}}====

Criteria: <math>V_\text{GS} > V_\text{th}</math> and <math>V_\text{DS} < (V_\text{GS} - V_\text{th}) .</math>

The transistor is turned on, and a channel has been created which allows current between the drain and the source. The MOSFET operates like a resistor, controlled by the gate voltage relative to both the source and drain voltages. The current from drain to source is modeled as:

<math display="block">I_\text{D} = \mu_n C_\text{ox}\frac{W}{L} \left( \left(V_\text{GS} - V_{\rm th}\right)V_\text{DS} - \frac{{V_\text{DS}}^2}{2} \right) ,</math>

where <math>\mu_n</math> is the charge-carrier effective mobility, <math>W</math> is the gate width, <math>L</math> is the gate length and <math>C_\text{ox}</math> is the gate oxide capacitance per unit area. The transition from the exponential subthreshold region to the triode region is not as sharp as the equations suggest.<ref name=Schneider>{{ cite book | first1 =C. |last1=Galup-Montoro |last2=Schneider|first2=M. C. |name-list-style=amp | title=MOSFET modeling for circuit analysis and design | year = 2007 | page=83 | publisher=World Scientific | location = London/Singapore | isbn=978-981-256-810-6 | url = http://worldcat.org/isbn/981-256-810-7}}</ref><ref name=Malik>{{ cite book | first = Norbert R.|last= Malik | title = Electronic circuits: analysis, simulation, and design | year = 1995 | pages=315–316 | publisher=Prentice Hall | location = Englewood Cliffs, New Jersey | isbn=978-0-02-374910-0 | url = http://worldcat.org/isbn/0-02-374910-5 }}</ref>{{verify source|reason=Citations were unhelpfully attached to the heading. Please move to indicate which claims they support, or leave here if the whole section|date=January 2023}}

====Saturation or active mode====

Critera: <math>V_\text{GS} > V_\text{th}</math> and <math>V_\text{DS} \geq (V_\text{GS} - V_\text{th}) .</math>

The switch is turned on, and a channel has been created, which allows current between the drain and source. Since the drain voltage is higher than the source voltage, the electrons spread out, and conduction is not through a narrow channel but through a broader, two- or three-dimensional current distribution extending away from the interface and deeper in the substrate. The onset of this region is also known as [[channel length modulation|pinch-off]] to indicate the lack of channel region near the drain. Although the channel does not extend the full length of the device, the electric field between the drain and the channel is very high, and conduction continues. The drain current is now weakly dependent upon drain voltage and controlled primarily by the gate-source voltage, and modeled approximately as:

<math display="block">I_\text{D} = \frac{\mu_n C_\text{ox}}{2}\frac{W}{L}\left[V_\text{GS} - V_\text{th}\right]^2 \left[1 + \lambda V_\text{DS}\right].</math>

The additional factor involving λ, the channel-length modulation parameter, models current dependence on drain voltage due to the [[Early effect]], or [[channel length modulation]]. According to this equation, a key design parameter, the MOSFET transconductance is:

<math display="block">g_m = \frac{\partial I_D}{\partial V_\text{GS}} = \frac{2I_\text{D}}{V_\text{GS} - V_\text{th}} = \frac{2I_\text{D}}{V_\text{ov}} , </math>

where the combination ''V''<sub>ov</sub> = ''V''<sub>GS</sub>&nbsp;− ''V''<sub>th</sub> is called the [[overdrive voltage]],<ref name=Sedra2>{{cite book | first1 =A. S.|last1=Sedra |first2=K. C.|last2=Smith |name-list-style=amp |title=Microelectronic Circuits |edition=5th |at=p. 250, Eq. 4.14 |isbn = 978-0-19-514251-8 |url=http://worldcat.org/isbn/0-19-514251-9|year=2004|publisher=Oxford University Press }}</ref> and where ''V''<sub>DSsat</sub> = ''V''<sub>GS</sub>&nbsp;− ''V''<sub>th</sub> accounts for a small discontinuity in <math>I_\text{D}</math> which would otherwise appear at the transition between the triode and saturation regions.

Another key design parameter is the MOSFET output resistance ''r<sub>out</sub>'' given by:

<math display="block">r_\text{out} = \frac{1}{\lambda I_\text{D}} \, .</math>

Note: ''r''<sub>out</sub> is the inverse of ''g''<sub>DS</sub>, where <math>g_\text{DS} = \frac{\partial I_\text{DS}}{\partial V_\text{DS}}</math>. ''I''<sub>D</sub> is the expression in the saturation region.

If λ is taken as zero, an infinite output resistance of the device results that leads to unrealistic circuit predictions, particularly in analog circuits.

As the channel length becomes very short, these equations become quite inaccurate. New physical effects arise. For example, carrier transport in the active mode may become limited by [[velocity saturation]]. When velocity saturation dominates, the saturation drain current is more nearly linear than quadratic in ''V''<sub>GS</sub>. At even shorter lengths, carriers transport with near zero scattering, known as quasi-[[ballistic transport]]. In the ballistic regime, the carriers travel at an injection velocity that may exceed the saturation velocity and approaches the [[Fermi velocity]] at high inversion charge density. In addition, drain-induced barrier lowering increases off-state (cutoff) current and requires an increase in threshold voltage to compensate, which in turn reduces the saturation current.<ref name=Gray-Meyer2>{{cite book |first1=P. R.|last1=Gray |first2=P. J.|last2= Hurst |first3=S. H.|last3= Lewis |first4=R. G.|last4= Meyer | title=Analysis and design of analog integrated circuits |edition=4th |at = §1.5.2 p. 45 |location=New York |publisher=Wiley |isbn=978-0-471-32168-2 | url = http://worldcat.org/isbn/0-471-32168-0|year=2001 }}</ref><!--Credit only supported in linked web page for the first author (Gray), but cover image gives the other three surnames--><ref name=Sedra>{{cite book |first1=A. S.|last1=Sedra |first2=K. C.|last2=Smith |name-list-style=amp |title=Microelectronic circuits |date=2004 |edition=5th |page=552 |publisher=Oxford University Press |location=New York |isbn=978-0-19-514251-8 |url=http://worldcat.org/isbn/0-19-514251-9 }}</ref>{{verify source|reason=Citations were unhelpfully attached to the heading. Please move to indicate which claims they support, or leave here if the whole section|date=January 2023}}