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Magnetoresistive RAM
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===Endurance=== The endurance of MRAM is affected by write current, just like retention and speed, as well as read current. When the write current is sufficiently large for speed and retention, the probability of MTJ breakdown needs to be considered.<ref>{{Cite journal|title=Electric breakdown in ultra-thin MgO tunnel barrier junctions for spin-transfer torque switching|year=2009|doi=10.1063/1.3272268|arxiv=0907.3579|last1=Schäfers|first1=M.|last2=Drewello|first2=V.|last3=Reiss|first3=G.|last4=Thomas|first4=A.|last5=Thiel|first5=K.|last6=Eilers|first6=G.|last7=Münzenberg|first7=M.|last8=Schuhmann|first8=H.|last9=Seibt|first9=M.|journal=Applied Physics Letters|volume=95|issue=23|pages=232119|bibcode=2009ApPhL..95w2119S|s2cid=119251634}}</ref> If the read current/write current ratio is not small enough, read disturb becomes more likely, i.e., a read error occurs during one of the many switching cycles. The read disturb error rate is given by :<math>1-\exp\left(-\frac{t_{read}}{\tau \exp(\Delta(1-I_{read}/I_{crit})}\right)</math>, where τ is the relaxation time (1 ns) and I<sub>crit</sub> is the critical write current.<ref>{{cite book |first1=R. |last1=Bishnoi |first2=M. |last2=Ebrahimi |first3=F. |last3=Oboril |first4=M.B. |last4=Tahoori |chapter=Read disturb fault detection in STT-MRAM |title=2014 International Test Conference |year=2014 |isbn= 978-1-4799-4722-5|pages=1–7 |doi=10.1109/TEST.2014.7035342|s2cid=7957290 }}</ref> Higher endurance requires a sufficiently low <math>I_{read}/I_{crit}</math>. However, a lower I<sub>read</sub> also reduces read speed.<ref>{{cite journal |first1=M. |last1=Chang |first2=S. |last2=Shen |first3=C. |last3=Liu |first4=C. |last4=Wu |first5=Y. |last5=Lin |first6=Y. |last6=King |first7=C. |last7=Lin |first8=H. |last8=Liao |first9=Y. |last9=Chih |first10=H. |last10=Yamauchi |title=An Offset-Tolerant Fast-Random-Read Current-Sampling-Based Sense Amplifier for Small-Cell-Current Nonvolatile Memory |journal=IEEE Journal of Solid-State Circuits |volume=48 |issue=3 |pages=864–877 |date=March 2013 |doi=10.1109/JSSC.2012.2235013 |bibcode=2013IJSSC..48..864C |s2cid=23020634 |url=}}</ref> Endurance is mainly limited by the possible breakdown of the thin MgO layer.<ref>{{Cite web|url=https://www.linkedin.com/pulse/breakdown-limited-write-time-windows-stt-mram-frederick-chen|title=Breakdown-Limited Write Time Windows for STT-MRAM|website=www.linkedin.com}}</ref><ref>J. H. Lim et al., "Investigating the Statistical-Physical Nature of MgO Dielectric Breakdown in STT-MRAM at Different Operating Conditions," IEDM 2018.</ref>
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