Editing Processor design (section)

==Markets==
{{Update section|date=December 2023|reason=No update since 2010, the market has significantly evolved since then}}
There are several different markets in which CPUs are used. Since each of these markets differ in their requirements for CPUs, the devices designed for one market are in most cases inappropriate for the other markets.

===General-purpose computing===
{{As of|2010}}, in the general-purpose computing market, that is, desktop, laptop, and server computers commonly used in businesses and homes, the Intel [[IA-32]] and the 64-bit version [[x86-64]] architecture dominate the market, with its rivals [[PowerPC]] and [[SPARC]] maintaining much smaller customer bases. Yearly, hundreds of millions of IA-32 architecture CPUs are used by this market.  A growing percentage of these processors are for mobile implementations such as netbooks and laptops.<ref>Kerr, Justin. [http://www.maximumpc.com/article/news/amd_loses_market_share_mobile_cpu_sales_outsell_desktop_first_time "AMD Loses Market Share as Mobile CPU Sales Outsell Desktop for the First Time."]  Maximum PC.  Published 2010-10-26.</ref>

Since these devices are used to run countless different types of programs, these CPU designs are not specifically targeted at one type of application or one function. The demands of being able to run a wide range of programs efficiently has made these CPU designs among the more advanced technically, along with some disadvantages of being relatively costly, and having high power consumption.

====High-end processor economics====
In 1984, most high-performance CPUs required four to five years to develop.<ref>
"New system manages hundreds of transactions per second" article
by Robert Horst and Sandra Metz, of Tandem Computers Inc.,
"Electronics" magazine, 1984 April 19:
"While most high-performance CPUs require four to five years to develop,
The [[NonStop (server computers)|NonStop]] TXP processor took just 2+1/2 years --
six months to develop a complete written specification,
one year to construct a working prototype,
and another year to reach volume production."
</ref>

===Scientific computing===
{{Main|Supercomputer}}
Scientific computing is a much smaller niche market (in revenue and units shipped).  It is used in government research labs and universities. Before 1990, CPU design was often done for this market, but mass market CPUs organized into large clusters have proven to be more affordable. The main remaining area of active hardware design and research for scientific computing is for high-speed data transmission systems to connect mass market CPUs.

===Embedded design===
{{Main|Embedded system}}
As measured by units shipped, most CPUs are embedded in other machinery, such as telephones, clocks, appliances, vehicles, and infrastructure. Embedded processors sell in the volume of many billions of units per year, however, mostly at much lower price points than that of the general purpose processors.

These single-function devices differ from the more familiar general-purpose CPUs in several ways:
* Low cost is of high importance.
* It is important to maintain a low power dissipation as embedded devices often have a limited battery life and it is often impractical to include cooling fans.
* To give lower system cost, peripherals are integrated with the processor on the same silicon chip.
* Keeping peripherals on-chip also reduces power consumption as external GPIO ports typically require buffering so that they can source or sink the relatively high current loads that are required to maintain a strong signal outside of the chip.
** Many embedded applications have a limited amount of physical space for circuitry; keeping peripherals on-chip will reduce the space required for the circuit board.
** The program and data memories are often integrated on the same chip. When the only allowed program memory is [[Read-only memory|ROM]], the device is known as a [[microcontroller]].
* For many embedded applications, interrupt latency will be more critical than in some general-purpose processors.

====Embedded processor economics====
The embedded CPU family with the largest number of total units shipped is the [[8051]], averaging nearly a billion units per year.<ref>{{cite web |url=http://people.wallawalla.edu/~curt.nelson/engr355/lecture/8051_overview.pdf |title=8051 Overview |author=Curtis A. Nelson |access-date=2011-07-10 |url-status=dead |archive-url=https://web.archive.org/web/20111009101426/http://people.wallawalla.edu/~curt.nelson/engr355/lecture/8051_overview.pdf |archive-date=2011-10-09 }}</ref>  The 8051 is widely used because it is very inexpensive.  The design time is now roughly zero, because it is widely available as commercial intellectual property.  It is now often embedded as a small part of a larger system on a chip.  The silicon cost of an 8051 is now as low as US$0.001, because some implementations use as few as 2,200 logic gates and take 0.4730 square millimeters of silicon.<ref>
{{cite web| url = http://www.keil.com/dd/docs/datashts/evatronix/t8051_ds.pdf| title = T8051 Tiny 8051-compatible Microcontroller| archive-url = https://web.archive.org/web/20110929033902/https://www.keil.com/dd/docs/datashts/evatronix/t8051_ds.pdf| archive-date = 2011-09-29}}</ref><ref>To figure dollars per square millimeter, see [http://www.overclockers.com/forums/showthread.php?t=550542], and note that an SOC component has no pin or packaging costs.</ref>

As of 2009, more CPUs are produced using the [[ARM architecture family]] instruction sets than any other 32-bit instruction set.<ref>
[http://www.extremetech.com/extreme/52180-arm-cores-climb-into-3g-territory "ARM Cores Climb Into 3G Territory"] by Mark Hachman, 2002.
</ref><ref>
[http://www.embedded.com/electronics-blogs/significant-bits/4024488/The-Two-Percent-Solution "The Two Percent Solution"] by Jim Turley 2002.
</ref>
The ARM architecture and the first ARM chip were designed in about one and a half years and 5 human years of work time.<ref>[https://web.archive.org/web/20090606152116/http://atterer.net/acorn/arm.html "ARM's way"] 1998</ref>

The 32-bit [[Parallax Propeller]] microcontroller architecture and the first chip were designed by two people in about 10 human years of work time.<ref>{{Cite web
| first=Chip | last=Gracey
| title = Why the Propeller Works
| url = http://www.parallax.com/Portals/0/Downloads/docs/article/WhythePropellerWorks.pdf
| archive-url = https://web.archive.org/web/20090419060820/http://www.parallax.com/Portals/0/Downloads/docs/article/WhythePropellerWorks.pdf
| archive-date = 2009-04-19
}}</ref>

The 8-bit [[Atmel AVR|AVR architecture]] and first AVR microcontroller was conceived and designed by two students at the Norwegian Institute of Technology.

The 8-bit 6502 architecture and the first [[MOS Technology 6502]] chip were designed in 13 months by a group of about 9 people.<ref>{{Cite web |url=http://silicongenesis.stanford.edu/transcripts/mensch.htm |title=Interview with William Mensch |access-date=2009-02-01 |archive-url=https://web.archive.org/web/20160304091031/http://silicongenesis.stanford.edu/transcripts/mensch.htm |archive-date=2016-03-04 |url-status=dead }}</ref>

====Research and educational CPU design====
The 32-bit [[Berkeley RISC]] I and RISC II processors were mostly designed by a series of students as part of a four quarter sequence of graduate courses.<ref>{{cite web|url=http://www.eecs.berkeley.edu/Pubs/TechRpts/1982/CSD-82-106.pdf |archive-url=https://web.archive.org/web/20060305132258/http://www.eecs.berkeley.edu/Pubs/TechRpts/1982/CSD-82-106.pdf |archive-date=2006-03-05 |url-status=live|title=Design and Implementation of RISC I|author1=C.H. Séquin|author-link1=Carlo H. Sequin|author2=D.A. Patterson|author-link2=David A. Patterson (scientist)}}</ref>
This design became the basis of the commercial [[SPARC]] processor design.

For about a decade, every student taking the 6.004 class at MIT was part of a team—each team had one semester to design and build a simple 8 bit CPU out of [[7400 series]] [[integrated circuit]]s.
One team of 4 students designed and built a simple 32 bit CPU during that semester.<ref>{{cite web|url=http://sub-zero.mit.edu/fbyte/hacks/vhs/|title=the VHS|archive-url=https://web.archive.org/web/20100227055013/http://sub-zero.mit.edu/fbyte/hacks/vhs/|archive-date=2010-02-27}}
</ref>

Some undergraduate courses require a team of 2 to 5 students to design, implement, and test a simple CPU in a FPGA in a single 15-week semester.<ref>{{cite web|url=http://www.fpgacpu.org/teaching.html|title=Teaching Computer Design with FPGAs|author=Jan Gray}}</ref>

The MultiTitan CPU was designed with 2.5 man years of effort, which was considered "relatively little design effort" at the time.<ref>{{cite journal |last1=Jouppi |first1=N.P. |last2=Tang |first2=J.Y.-F. |title=A 20-MIPS sustained 32-bit CMOS microprocessor with high ratio of sustained to peak performance |journal=IEEE Journal of Solid-State Circuits |date=October 1989 |volume=24 |issue=5 |pages=1348–1359 |doi=10.1109/JSSC.1989.572612 |bibcode=1989IJSSC..24.1348J }}</ref>
24 people contributed to the 3.5 year MultiTitan research project, which included designing and building a prototype CPU.<ref>{{cite web|url=http://www.hpl.hp.com/techreports/Compaq-DEC/WRL-87-8.pdf |archive-url=https://web.archive.org/web/20040825183403/http://www.hpl.hp.com/techreports/Compaq-DEC/WRL-87-8.pdf |archive-date=2004-08-25 |url-status=live|title=MultiTitan: Four Architecture Papers|year=1988|pages=4–5}}</ref>

==== Soft microprocessor cores ====
{{Main|Soft microprocessor}}
For embedded systems, the highest performance levels are often not needed or desired due to the power consumption requirements. This allows for the use of processors which can be totally implemented by [[logic synthesis]] techniques. These synthesized processors can be implemented in a much shorter amount of time, giving quicker [[time-to-market]].