Editing Reconfigurable computing (section)

== Current systems ==

===Computer emulation ===
[[File:FPGARetrocomputing.jpg|An FPGA board is being used to recreate the Vector-06C computer|thumb]]
With the advent of affordable FPGA boards, students' and hobbyists' projects seek to recreate [[vintage computer]]s or implement more novel architectures.<ref name="apple">{{cite web|url=https://www.cs.columbia.edu/~sedwards/apple2fpga/|title=Apple2 FPGA|access-date=6 Sep 2012
}}</ref><ref name="risc">{{cite web|url=http://www.inf.ethz.ch/personal/wirth/Articles/Miscellaneous/RISC.pdf |title=The Design of a RISC Architecture and its Implementation with an FPGA |author=Niklaus Wirth |access-date=6 Sep 2012 }}{{dead link|date=June 2016|bot=medic}}{{cbignore|bot=medic}}</ref><ref name="soc">{{cite web|author=Jan Gray
|url=http://www.fpgacpu.org/papers/soc-gr0040-paper.pdf|title=Designing a Simple FPGA-Optimized RISC CPU and System-on-a-Chip|access-date=6 Sep 2012
}}</ref> Such projects are built with reconfigurable hardware (FPGAs), and some devices support emulation of multiple vintage computers using a single reconfigurable hardware ([[C-One]]).

=== COPACOBANA ===
A fully FPGA-based computer is the COPACOBANA, the Cost Optimized Codebreaker and Analyzer and its successor RIVYERA. A spin-off company [[SciEngines GmbH]] of the COPACOBANA-Project of the Universities of Bochum and Kiel in Germany continues the development of fully FPGA-based computers.

=== Mitrionics ===

[[Mitrionics]] has developed a SDK that enables software written using a [[single assignment]] language to be compiled and executed on FPGA-based computers. The Mitrion-C software language and Mitrion processor enable software developers to write and execute applications on FPGA-based computers in the same manner as with other computing technologies, such as graphical processing units ("GPUs"), cell-based processors, parallel processing units ("PPUs"), multi-core CPUs, and traditional single-core CPU clusters. (out of business)

=== National Instruments ===

[[National Instruments]] have developed a hybrid embedded computing system called [[CompactRIO]]. It consists of reconfigurable chassis housing the user-programmable FPGA, hot swappable I/O modules, real-time controller for deterministic communication and processing, and graphical LabVIEW software for rapid RT and FPGA programming.

=== Xilinx ===
[[Xilinx]] has developed two styles of partial reconfiguration of FPGA devices: ''module-based'' and ''difference-based''. ''Module-based partial reconfiguration'' permits to reconfigure distinct modular parts of the design, while ''difference-based partial reconfiguration'' can be used when a small change is made to a design.

=== Intel ===
[[Intel]]<ref name="intel_altera">{{cite web |url=https://newsroom.intel.com/news-releases/intel-completes-acquisition-of-altera/ |title=Intel completes acquisition of Altera |work=Intel Newsroom |access-date=15 November 2016}}</ref> supports partial reconfiguration of their FPGA devices on 28&nbsp;nm devices such as Stratix V,<ref name="stratixv_pr">{{cite web |url=https://www.altera.com/products/fpga/features/stxv-part-reconfig.html |title=Stratix V FPGAs: Ultimate Flexibility Through Partial and Dynamic Reconfiguration |access-date=15 November 2016}}</ref> and on the 20&nbsp;nm Arria 10 devices.<ref name="arria10_pr">{{cite web |url=https://www.altera.com/products/design-software/fpga-design/quartus-prime/features.html |title=Intel Quartus Prime Software Productivity Tools and Features |access-date=15 November 2016}}</ref> The Intel FPGA partial reconfiguration flow for Arria 10 is based on the hierarchical design methodology in the Quartus Prime Pro software where users create physical partitions of the FPGA that can be reconfigured<ref name="arria10_pr_docs">{{cite web |url=https://www.altera.com/en_US/pdfs/literature/hb/qts/qts-qps-5v1.pdf |title=Quartus Prime Standard Edition Handbook Volume 1: Design and Synthesis |publisher=Intel |access-date=15 November 2016 |pages=4–1}}</ref> at runtime while the remainder of the design continues to operate. The Quartus Prime Pro software also support hierarchical partial reconfiguration and simulation of partial reconfiguration.