Editing WinChip (section)

== Data ==
===Winchip C6 (0.35 μm)===
[[File:KL IDT WinChip C6.jpg|thumb|IDT WinChip C6]]
[[File:IDT WinChip C6 die.JPG|thumb|IDT WinChip C6 [[die shot]]]]
* All models supported [[MMX (instruction set)|MMX]]<ref name=SandpileWinChipC6>{{cite web |url=http://www.sandpile.org/impl/c6.htm |title=IA-32 implementation: Centaur WinChip |work=Sandpile |accessdate=13 May 2007}}</ref>
* The 88&nbsp;mm{{sup|2}} die was made using a 0.35 micron 4-layer metal CMOS technology.<ref name=SandpileWinChipC6 />
* The 64 Kib L1 Cache of the WinChip C6 used a 32 KB 2-way set associative code cache and a 32 KB 2-way set associative data cache.<ref name=SandpileWinChipC6 />
{| class="wikitable" style="text-align:center"
! Processor<br />model !! Frequency !! [[front side bus|FSB]] !! [[CPU multiplier|Mult.]] !! [[CPU Cache|L1 cache]] !! [[Thermal Design Power|TDP]] !! [[CPU core voltage]] !! [[CPU socket|Socket]] !! Release date !! Part number(s) !! Introduction price
|-
| WinChip 180 || 180&nbsp;MHz || 60 [[Transfer (computing)|MT/s]] || 3 || 64 [[Kibibyte|KiB]] || 9.4 W || 3.45—3.6 V || {{ubl|[[Socket 5]]|[[Socket 7]]|[[Super Socket 7]]|[[Ceramic pin grid array|CPGA]] 296}} || 13 October 1997 || DS180GAEM || $90
|-
| WinChip 200 || 200&nbsp;MHz || 66 MT/s || 3 || 64 KiB || 10.4 W || 3.45—3.6 V || {{ubl|Socket 5|Socket 7|Super Socket 7|CPGA 296}} || 13 October 1997 || DS200GAEM || $135
|-
| WinChip 225 || 225&nbsp;MHz || 75 MT/s || 3 || 64 KiB || 12.3 W || 3.45—3.6 V || {{ubl|Socket 7|Super Socket 7|CPGA 296}} || 13 October 1997 || PSME225GA ||
|-
| WinChip 240 || 240&nbsp;MHz || 60 MT/s || 4 || 64 KiB || 13.1 W || 3.45—3.6 V || {{ubl|Socket 5|Socket 7|Super Socket 7|CPGA 296}} || November 1997? || PSME240GA ||
|}

===WinChip 2 (0.35 μm)===
[[File:KL IDT WinChip2.jpg|thumb|IDT WinChip2]]
* All models supported [[MMX (instruction set)|MMX]]<ref name=WinChipSandpile /> and [[3DNow!]]<ref name=WinChipSandpile />
* The 95&nbsp;mm{{sup|2}} die was made using a 0.35 micron 5-layer metal CMOS technology.<ref name=WinChipSandpile />
* The 64 Kib L1 Cache of the WinChip 2 used a 32 KB 2-way set associative code cache and a 32 KB 4-way set associative data cache.
{| class="wikitable" style="text-align:center"
! Processor<br />model !! Frequency !! [[front side bus|FSB]] !! [[CPU multiplier|Mult.]] !! [[CPU cache|L1 cache]] !! [[Thermal Design Power|TDP]] !! [[CPU core voltage]] !! [[CPU socket|Socket]] !! Release date !! Part number(s) !! Introduction price
|-
| WinChip 2-200 || 200&nbsp;MHz || 66 [[Transfer (computing)|MT/s]] || 3 || 64 [[Kibibyte|KiB]] || 8.8 W || 3.45—3.6 V || {{ubl|[[Socket 5]]|[[Socket 7]]|[[Super Socket 7]]|[[Ceramic pin grid array|CPGA]] 296}} ||  || 3DEE200GSA<br />3DFF200GSA ||
|-
| WinChip 2-225 || 225&nbsp;MHz || 75 MT/s || 3 || 64 KiB || 10.0 W || 3.45—3.6 V || {{ubl|Socket 7|Super Socket 7|CPGA 296}} ||  || 3DEE225GSA ||
|-
| WinChip 2-240 || 240&nbsp;MHz || 60 MT/s || 4 || 64 KiB || 10.5 W || 3.45—3.6 V || {{ubl|Socket 5|Socket 7|Super Socket 7|CPGA 296}} ||  || 3DEE240GSA || 
|-
| WinChip 2-250 || 250&nbsp;MHz || 83 MT/s || 3 || 64 KiB || 10.9 W || 3.45—3.6 V || {{ubl|Super Socket 7|CPGA 296}} || ? ||  ||
|}

===WinChip 2A (0.35 μm)===
[[File:KL IDT WinChip2A.jpg|thumb|IDT WinChip2A]]
[[File:IDT_WinChip_2A_die.JPG|thumb|IDT WinChip2A die shot]] 
* All models supported [[MMX (instruction set)|MMX]]<ref name="WinChip2DataSheet">{{cite web |title=PROCESSOR Version A Data Sheet|url=http://www.centtech.com/wc_2_datasheet_a2.pdf |archive-url=https://web.archive.org/web/20030322001250/http://www.centtech.com/wc_2_datasheet_a2.pdf |url-status=usurped |archive-date=March 22, 2003 |date=January 1999 |accessdate=2 November 2011}}</ref> and [[3DNow!]]<ref name="WinChip2DataSheet" />
* The 95&nbsp;mm{{sup|2}} die was made using a 0.35 micron 5-layer metal CMOS technology.<ref name=WinChipSandpile />
* The 64 Kib L1 Cache of the WinChip 2A used a 32 KB 2-way set associative code cache and a 32 KB 4-way set associative data cache.<ref name="WinChip2DataSheet" />
{| class="wikitable" style="text-align:center"
! Processor<br />model !! Frequency !! [[front side bus|FSB]] !! [[CPU multiplier|Mult.]] !! [[CPU cache|L1 cache]] !! [[Thermal Design Power|TDP]] !! [[CPU core voltage]] !! [[CPU socket|Socket]] !! Release date !! Part number(s) !! Introduction price
|-
| WinChip 2A-200 || 200&nbsp;MHz || 66 [[Transfer (computing)|MT/s]] || 3 || 64 [[Kibibyte|KiB]] || 12.0 W || 3.45—3.6 V || {{ubl|[[Socket 5]]|[[Socket 7]]|[[Super Socket 7]]|[[Ceramic pin grid array|CPGA]] 296}} || March 1999? || 3DEE200GTA ||
|-
| WinChip 2A-233 || 233&nbsp;MHz || 66 MT/s || 3.5 || 64 KiB || 13.0 W || 3.45—3.6 V || {{ubl|Socket 5|Socket 7|Super Socket 7|CPGA 296}} || March 1999? || 3DEE233GTA ||
|- align="center"
| WinChip 2A-266 || 233&nbsp;MHz || 100 MT/s || 2.33 || 64 KiB || 14.0 W || 3.45—3.6 V || {{ubl|Super Socket 7|CPGA 296}} || March 1999? || 3DEE266GSA ||
|-
| WinChip 2A-300 || 250&nbsp;MHz || 100 MT/s || 2.5 || 64 KiB || 16.0 W || 3.45—3.6 V || {{ubl|Super Socket 7|CPGA 296}} ||  || 3DEE300GSA ||
|}

===WinChip 2B (0.25 μm)===
[[File:KL IDT WinChip2 W2B.jpg|thumb|IDT WinChip2 W2B]]
* All models supported [[MMX (instruction set)|MMX]]<ref name="WinChip2bDataSheet">{{cite web |title=PROCESSOR Data Sheet for WinChip 2 version B |url=http://www.centtech.com/w2b_datasheet.pdf |archive-url=http://wayback.archive-it.org/all/20111013013103/http://www.centtech.com/w2b_datasheet.pdf |url-status=usurped |archive-date=October 13, 2011 |date=April 1999 |accessdate=2 November 2011}}</ref> and [[3DNow!]]<ref name="WinChip2bDataSheet" />
* The 58&nbsp;mm{{sup|2}} die was made using a 0.25 micron 5-layer metal CMOS technology.<ref name=WinChipSandpile />
* The 64&nbsp;Kib L1 Cache of the WinChip 2B used a 32&nbsp;KB 2-way set associative code cache and a 32 KB 4-way set associative data cache.<ref name="WinChip2bDataSheet" />
* [[Dual-voltage CPU]]: while the processor core operates at 2.8&nbsp;V, the external [[input/output]] ('''I/O''') voltages remain 3.3&nbsp;V for backwards compatibility.
{| class="wikitable" style="text-align:center"
! Processor<br />model !! Frequency !! [[front side bus|FSB]] !! [[CPU multiplier|Mult.]] !! [[CPU cache|L1 cache]] !! [[Thermal Design Power|TDP]] !! [[CPU core voltage]] !! [[CPU socket|Socket]] !! Release date !! Part number(s) !! Introduction price
|-
|WinChip 2B-200 || 200&nbsp;MHz || 66 [[Transfer (computing)|MT/s]] || 3 || 64 [[Kibibyte|KiB]] || 6.3 W || 2.7—2.9 V || {{ubl|[[Socket 7]]|[[Super Socket 7]]|PPGA 296}} || || 3DFK200BTA ||
|-
|WinChip 2B-233 || 200&nbsp;MHz || 100 MT/s || 2 || 64 KiB || 6.3 W || 2.7—2.9 V || {{ubl|Super Socket 7|PPGA 296}} || || ||
|}

===WinChip 3 (0.25 μm)===
* All models supported [[MMX (instruction set)|MMX]]<ref name="WinChip3DataSheet">{{cite web |title=PROCESSOR Data Sheet |url=http://www.centtech.com/winchip_3_datasheet.pdf |archive-url=https://web.archive.org/web/20010614031153/http://www.centtech.com/winchip_3_datasheet.pdf |url-status=usurped |archive-date=June 14, 2001 |date=April 1999 |accessdate=2 November 2011}}</ref> and [[3DNow!]]<ref name="WinChip3DataSheet" />
* The 75&nbsp;mm{{sup|2}} die was made using a 0.25 micron 5-layer metal CMOS technology.<ref name=WinChipSandpile />
* The 128 Kib L1 Cache of the WinChip 3 used a 64 KB 2-way set associative code cache and a 64 KB 4-way set associative data cache.<ref name="WinChip3DataSheet" />
* [[Dual-voltage CPU]]: while the processor core operates at 2.8 volts, the external [[input/output]] (I/O) voltages remain 3.3 volts for backwards compatibility.
{| class="wikitable" style="text-align:center"
! Processor<br />model !! Frequency !! [[front side bus|FSB]] !! [[CPU multiplier|Mult.]] !! [[CPU Cache|L1 cache]] !! [[Thermal Design Power|TDP]] !! [[CPU core voltage]] !! [[CPU socket|Socket]] !! Release date !! Part number(s) !! Introduction price
|-
| WinChip 3-233 || 200&nbsp;MHz || 66 [[Transfer (computing)|MT/s]] || 3 || 128 [[Kibibyte|KiB]] || ? W || 2.7—2.9 V || {{ubl|[[Socket 7]]|[[Super Socket 7]]|[[Ceramic pin grid array|CPGA]] 296}} ||  ||  ||
|-
| WinChip 3-266 || 233&nbsp;MHz || 66 MT/s || 3.5  || 128  KiB || 8.4 W || 2.7—2.9 V || {{ubl|Socket 7|Super Socket 7|CPGA 296}} || Samples only || FK233GDA ||
|-
| WinChip 3-300 || 233&nbsp;MHz || 100 MT/s || 2.33 || 128  KiB || 8.4 W || 2.7—2.9 V || {{ubl|Super Socket 7|CPGA 296}} || Samples only || FK300GDA ||
|-
| WinChip 3-300 || 266&nbsp;MHz || 66 MT/s || 4 || 128  KiB || 9.3 W || 2.7—2.9 V || {{ubl|Socket 7|Super Socket 7|CPGA 296}} ||  ||  ||
|-
| WinChip 3-333 || 250&nbsp;MHz || 100 MT/s || 2.5 || 128  KiB || 8.8 W || 2.7—2.9 V || {{ubl|Super Socket 7|CPGA 296}} ||  ||  ||
|-
| WinChip 3-333 || 266&nbsp;MHz || 100 MT/s || 2.66 || 128  KiB || 9.3 W || 2.7—2.9 V || {{ubl|Super Socket 7|CPGA 296}} ||  ||  ||
|}