Editing Apollo Guidance Computer (section)

===Other registers===
[[File:ApolloGuidanceComputerwithDSKY.dwt.jpg|thumb|DSKY and AGC prototypes on display at the [[Computer History Museum]]. The AGC is opened up, showing its logic modules.]]
[[File:AGClogicmodule.agr.jpg|thumb|Prototype logic module from Block I AGC]]
[[File:Agc mount.jpg|thumb|Block II logic module, with flat-pack ICs]]
The AGC had additional registers that were used internally in the course of operation:
* '''S''': 12-bit memory address register, the lower portion of the memory address
* '''Bank/Fbank''': 4-bit ROM bank register, to select the 1&nbsp;[[kiloword]] ROM bank when addressing in the fixed-switchable mode
*'''Ebank''': 3-bit RAM bank register, to select the 256-word RAM bank when addressing in the erasable-switchable mode
* '''Sbank''' (super-bank): 1-bit extension to Fbank, required because the last 4&nbsp;kilowords of the 36-kiloword ROM was not reachable using Fbank alone
*'''SQ''': 4-bit sequence register; the current instruction
*'''G''': 16-bit memory buffer register, to hold data words moving to and from memory
*'''X''': The 'x' input to the ''adder'' (the adder was used to perform all [[ones' complement|1's complement]] arithmetic) or the increment to the program counter ('''Z''' register)
* '''Y''': The other ('y') input to the adder
*'''U''': Not really a register, but the output of the adder (the [[ones' complement]] sum of the contents of registers '''X''' and '''Y''')
*'''B''': General-purpose buffer register, also used to pre-fetch the next instruction. At the start of the next instruction, the upper bits of '''B''' (containing the next op. code) were copied to '''SQ''', and the lower bits (the address) were copied to '''S'''.
*'''C''': Not a separate register, but the ones' complement of the '''B''' register
* '''IN''': Four 16-bit input registers
* '''OUT''': Five 16-bit output registers