Editing Consistency model (section)

=== Pipelined RAM consistency, or FIFO consistency ===

[[PRAM consistency|Pipelined RAM consistency]] (PRAM consistency) was presented by Lipton and Sandberg in 1988<ref name="pram_lipton">{{cite tech report|first=R.J.|last=Lipton|author2=J.S. Sandberg.|title=PRAM: A scalable shared memory|number=CS-TR-180-88|institution=Princeton University|year=1988}}</ref>  as one of the first described consistency models. Due to its informal definition, there are in fact at least two subtly different implementations,<ref name="senftleben13">{{cite thesis|degree=M.Sc.|last=Senftleben|first=Maximilian|date=2013|title=Operational Characterization of Weak Memory Consistency Models|publisher=University of Kaiserslautern|url=https://es.cs.uni-kl.de/publications/datarsg/Senf13.pdf}}</ref> one by Ahamad et al. and one by Mosberger.

In PRAM consistency, all processes view the operations of a single process in the same order that they were issued by that process, while operations issued by different processes can be viewed in different order from different processes. PRAM consistency is weaker than processor consistency. PRAM relaxes the need to maintain coherence to a location across all its processors. Here, reads to any variable can be executed before writes in a processor. Read before write, read after read and write before write ordering is still preserved in this model.  
{| class="wikitable"
|-
! Sequence
! {{abbr|P|Processor}}1
! {{abbr|P|Processor}}2
! {{abbr|P|Processor}}3
! {{abbr|P|Processor}}4
|-
! 1 
| W(x)1
|
|
|
|-
! 2
|
| R(x)1
|
|
|-
! 3
|
| W(x)2
|
|
|-
! 4
|
|
| R(x)1
| R(x)2
|-
! 5
|
|
| R(x)2
| R(x)1
|}