Editing MOSFET (section)

==== Cutoff, subthreshold, and weak-inversion mode====

Criterion: <math>V_\text{GS} < V_\text{th} .</math>

According to the basic threshold model, the transistor is turned off, and there is no conduction between drain and source. A more accurate model considers the effect of thermal energy on the [[Fermi–Dirac distribution]] of electron energies which allow some of the more energetic electrons at the source to enter the channel and flow to the drain. This results in a subthreshold current that is an exponential function of gate-source voltage. While the current between drain and source should ideally be zero when the transistor is being used as a turned-off switch, there is a weak-inversion current, sometimes called subthreshold leakage.

In weak inversion where the source is tied to bulk, the current varies exponentially with <math>V_\text{GS}</math> as given approximately by:<ref name=Gray-Meyer>
{{ cite book
 | first1 = P. R. | last1=Gray
 | first2=P. J. | last2=Hurst
 | first3=S. H. | last3=Lewis
 | first4=R. G. | last4=Meyer
 | name-list-style=amp
 | title=Analysis and Design of Analog Integrated Circuits
 | year = 2001
 | pages=66–67
 | edition=4th
 | publisher = Wiley
 | location=New York
 | isbn=978-0-471-32168-2
 | url = http://worldcat.org/isbn/0471321680
}}</ref><ref name=vanRoermund>
{{ cite book
 | first1 = P. R. | last1=van der Meer
 | first2=A. | last2=van Staveren
 | first3=A. H. M. | last3=van Roermund
 | title = Low-Power Deep Sub-Micron CMOS Logic: Subthreshold Current Reduction
 | year = 2004
 | page=78
 | publisher=Springer
 | location=Dordrecht
 | isbn = 978-1-4020-2848-9
 | url=https://books.google.com/books?id=nyken8ivkb8C&pg=PA78 
}}</ref>

<math display="block">I_\text{D} \approx I_\text{D0} e^\frac{V_\text{GS} - V_\text{th}}{nV_\text{T}}, </math>

where <math>I_\text{D0}</math> = current at <math>V_\text{GS} = V_\text{th}</math>, the thermal voltage <math>V_\text{T} = kT/q</math> and the slope factor ''n'' is given by:

<math display="block">n = 1 + \frac{C_\text{dep}}{C_\text{ox}},</math>

with <math>C_\text{dep}</math> = capacitance of the depletion layer and <math>C_\text{ox}</math> = capacitance of the oxide layer. This equation is generally used, but is only an adequate approximation for the source tied to the bulk. For the source not tied to the bulk, the subthreshold equation for drain current in saturation is<ref>{{cite web|last=Degnan|first=Brian|title=Wikipedia fails subvt|url=https://sites.google.com/site/degnan68k/semiconductors/wikipedia-fails-subvt}}</ref><ref>{{cite book|last=Mead|first=Carver|title=Analog VLSI and Neural Systems|year=1989|publisher=Addison-Wesley|location=Reading, Massachusetts|isbn=9780201059922|page=370}}</ref>

<math display="block">I_\text{D} \approx I_\text{D0} e^\frac{V_\text{G} - V_\text{th}}{nV_\text{T}} e^{-\frac{  V_\text{S}}{V_\text{T}}}. </math>

In a long-channel device, there is no drain voltage dependence of the current once <math>V_\text{DS} \gg V_\text{T}</math>, but as channel length is reduced [[drain-induced barrier lowering]] introduces drain voltage dependence that depends in a complex way upon the device geometry (for example, the channel doping, the junction doping and so on). Frequently, threshold voltage ''V''<sub>th</sub> for this mode is defined as the gate voltage at which a selected value of current ''I''<sub>D0</sub> occurs, for example, ''I''<sub>D0</sub> = 1{{nbsp}}μA, which may not be the same ''V''<sub>th</sub>-value used in the equations for the following modes.

Some micropower analog circuits are designed to take advantage of subthreshold conduction.<ref name="Smith-Hamilton">{{cite book |first1=Leslie S.|last1=Smith |first2=Alister|last2=Hamilton |title=Neuromorphic Systems: Engineering Silicon from Neurobiology |date=1998 |pages=52–56 |publisher=World Scientific |isbn=978-981-02-3377-8 | url=https://books.google.com/books?id=kWSXEHyQL9sC&pg=PA55 }}</ref><ref name="Kumar">{{cite book | first=Satish|last=Kumar | title=Neural Networks: A Classroom Approach |date=2004 |page=688 |publisher=Tata McGraw-Hill |isbn=978-0-07-048292-0 |url=https://books.google.com/books?id=GJQh-2p6TvgC&pg=PA688 }}</ref><ref name="Conference">{{cite book | first1 = Manfred|last1=Glesner |first2=Peter|last2=Zipf |first3=Michel|last3=Renovell |title=Field-programmable Logic and Applications: 12th International Conference |date=2002 |page=425 |location=Dordrecht |publisher=Springer |isbn=978-3-540-44108-3 | url = https://books.google.com/books?id=fneXs6IY2-oC&pg=PA425}}</ref> By working in the weak-inversion region, the MOSFETs in these circuits deliver the highest possible transconductance-to-current ratio, namely: <math>g_m/I_\text{D} = 1/\left(nV_\text{T}\right)</math>, almost that of a bipolar transistor.<ref>{{cite book |title=Circuits and systems tutorials |chapter=The Fundamentals of Analog Micropower Design |editor1-first=Chris |editor1-last=Toumazou |editor2-first=Nicholas C. |editor2-last=Battersby |editor3-first=Sonia |editor3-last=Porta |first=Eric A. |last=Vittoz | publisher = John Wiley and Sons |date=1996 |isbn=978-0-7803-1170-1 |pages=365–372 |chapter-url=https://books.google.com/books?id=WTInL9njOKAC&pg=PA367 }}</ref>

The subthreshold ''[[I–V curve]]'' depends exponentially upon threshold voltage, introducing a strong dependence on any manufacturing variation that affects threshold voltage; for example: variations in oxide thickness, junction depth, or body doping that change the degree of drain-induced barrier lowering. The resulting sensitivity to fabricational variations complicates optimization for leakage and performance.<ref name=Shukla>{{ cite book | first1 =Sandeep K.|last1=Shukla |first2=R. Iris|last2=Bahar |author2-link=R. Iris Bahar | title=Nano, Quantum and Molecular Computing | year = 2004 | at=p. 10 and Fig. 1.4, p. 11 | publisher = Springer | isbn=978-1-4020-8067-8 | url = https://books.google.com/books?id=lLvo1iMGhJgC&pg=PA10}}</ref><ref name=Srivasta>{{ cite book | first1 =Ashish|last1=Srivastava |first2=Dennis|last2=Sylvester |first3=David|last3=Blaauw | title=Statistical Analysis and Optimization For VLSI: Timing and Power | year = 2005 | page=135 | publisher=Springer | isbn = 978-0-387-25738-9 | url = https://books.google.com/books?id=WqsQTyOu5jwC&pg=PA9 }}</ref>

[[file:IvsV mosfet.svg|thumb|upright=1.2|MOSFET drain current vs. drain-to-source voltage for several values of <math>V_\text{GS} - V_\text{th}</math>; the boundary between ''linear'' (''Ohmic'') and ''saturation'' (''active'') modes is indicated by the upward curving parabola.]]
[[file:Mosfet linear.svg|thumb|upright=1.2|Cross section of a MOSFET operating in the linear (Ohmic) region; strong inversion region present even near drain.]]
[[file:Mosfet saturation.svg|thumb|upright=1.2|Cross section of a MOSFET operating in the saturation (active) region; channel exhibits [[channel length modulation|channel pinching]] near drain.]]