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Nios II
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=== Nios II/s === Nios II/s core is designed to maintain a balance between performance and cost. This core implementation is not longer supported for Altera Quartus II v.17 and newer. Features of Nios II/s include: * Instruction cache * Up to 2 GB of external address space * Optional tightly coupled memory for instructions * Five-stage pipeline * Static branch prediction * Hardware multiply, divide, and shift options * Up to 256 custom instructions * [[JTAG]] debug module * Optional JTAG debug module enhancements, including hardware breakpoints, data triggers, and real-time trace
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