Editing Orthogonal instruction set (section)

===The VAX-11===
The [[VAX|VAX-11]] extended the PDP-11's orthogonality to all data types, including floating point numbers.<ref name=arch>{{cite book |title= Computer Architecture: A Quantitative Approach |first1= John |last1=Hennessy |first2=David |last2=Patterson |page=151 |url=https://books.google.com/books?id=XX69oNsazH4C&pg=PA151|isbn= 9780080502526 |date= 2002-05-29 |publisher= Elsevier }}</ref> Instructions such as 'ADD' were divided into data-size dependent variants such as ADDB, ADDW, ADDL, ADDP, ADDF for add byte, word, longword, packed BCD and single-precision floating point, respectively. Like the PDP-11, the Stack Pointer and Program Counter were in the general register file (R14 and R15).<ref name=another>{{cite web |title=Another Approach to Instruction Set Architecture—VAX |url=https://minnie.tuhs.org/CompArch/Resources/webext3.pdf}}</ref>

The general form of a VAX-11 instruction would be:

 [[opcode]] [ [[operand]] ] [ [[operand]] ]  ...

Each component being one [[byte]], the opcode a value in the range 0–255, and each operand consisting of two [[nibble]]s, the upper 4 bits specifying an addressing mode, and the lower 4 bits (usually) specifying a register number (R0–R15).<ref name=another/>

In contrast to the PDP-11's 3-bit fields, the VAX-11's 4-bit sub-bytes resulted in 16 [[Addressing mode|addressing modes]] (0–15).  However, addressing modes 0–3 were "short immediate" for immediate data of 6 bits or less (the 2 low-order bits of the addressing mode being the 2 high-order bits of the immediate data, when prepended to the remaining 4 bits in that data-addressing byte).  Since addressing modes 0-3 were identical, this made 13 (electronic) addressing modes, but as in the PDP-11, the use of the Stack Pointer (R14) and Program Counter (R15) created a total of over 15 conceptual addressing modes (with the assembler program translating the source code into the actual stack-pointer or program-counter based addressing mode needed).<ref name=another/>