Editing Oscillator sync (section)

==Digital Implementation Aspects==

Naive approaches to sync in digital oscillators will result in [[aliasing]]. To prevent this, [[band-limited]] methods such as [[additive synthesis]], BLIT (Band-Limited Impulse Train)<ref>http://www.music.mcgill.ca:[http://www.music.mcgill.ca/~gary/307/week5/bandlimited.html bandlimited]</ref> or BLEP (Band-Limited Step) must be adopted to avoid aliasing.<ref>http://www.cs.cmu.edu:[https://www.cs.cmu.edu/~eli/papers/icmc01-hardsync.pdf icmc01-hardsync.pdf]</ref>

In a digital oscillator, best practice is that the follower will not be reset to the identical phase each cycle, but to a phase advanced by an equivalent time to the phase of the leader at the reset. This prevents jitter in the follower frequency and provides truer synchronization.{{Citation needed|date=December 2023}}

For digital oscillators, Reversing Sync may less frequently generate [[aliasing]].{{Citation needed|date=August 2009}} This effect may be naively implemented by measuring the zero axis crossings of the leader oscillator and reversing the slope of the follower oscillator after every other crossing.

For digital implementation, note that none of the Threshold or Weak Sync methods actually synthesize the waveform in a way different from Hard Sync (rather, they selectively deactivate it).

Overlap sync is primarily a digital technique with simple implementation, such as used in FOF;<ref>http://www.gersic.com:[http://www.gersic.com/dspwiki/index.php?title=Physical_Modeling_Synthesis Physical Modeling Synthesis] {{webarchive|url=https://web.archive.org/web/20080226090119/http://www.gersic.com/dspwiki/index.php?title=Physical_Modeling_Synthesis |date=2008-02-26 }}</ref> an analog implementation could be a highly damped sine oscillator excited by the reset pulse.