Editing Phase-change memory (section)

===Multi-level cell===
In February 2008, Intel and STMicroelectronics revealed the first multilevel ([[Multi-level Cell|MLC]]) PRAM array prototype. The prototype stored two logical bits in each physical cell, in effect 256&nbsp;Mb of memory stored in a 128&nbsp;Mb physical array. This means that instead of the normal two states—fully [[Amorphous solid|amorphous]] and fully [[crystal]]line—an additional two distinct intermediate states represent different degrees of partial crystallization, allowing for twice as many bits to be stored in the same physical area.<ref name=review/> In June 2011,<ref name="engadget article">{{cite web|title=IBM develops 'instantaneous' memory, 100x faster than flash| publisher=engadget|date=2011-06-30|url=https://www.engadget.com/2011/06/30/embargo-ibm-develops-instantaneous-memory-100x-faster-than-fl/|access-date=2011-06-30}}</ref> IBM announced that they had created stable, reliable, multi-bit phase-change memory with high performance and stability. [[SK Hynix]] had a joint developmental agreement and a technology license agreement with IBM for the development of multi-level PRAM technology.<ref>{{Cite web|last=|title=SK hynix and IBM Sign Joint Development for PCRAM|url=https://news.skhynix.com/sk-hynix-and-ibm-sign-joint-development-for-pcram/|access-date=2022-02-05|website=SK hynix Newsroom|language=en-US}}</ref>