Editing Static random-access memory (section)

==Types of SRAM==

===Non-volatile SRAM===
[[Non-volatile SRAM]] (nvSRAM) has standard SRAM functionality, but they save the data when the power supply is lost, ensuring preservation of critical information. nvSRAMs are used in a wide range of situations{{snd}}networking, aerospace, and medical, among many others<ref>{{cite book|title=Computer organization.|url=https://archive.org/details/isbn_9780071143097|url-access=registration|publisher=McGraw-Hill|location=[S.l.]|isbn=978-0-07-114323-3|edition=4th|date=1996-07-01}}</ref>{{snd}}where the preservation of data is critical and where batteries are impractical.

==={{anchor|Pseudo SRAM}}Pseudostatic RAM===
[[Pseudostatic RAM]] (PSRAM) is DRAM combined with a self-refresh circuit.<ref>{{cite web |url=https://media.digikey.com/pdf/Data%20Sheets/Micron%20Technology%20Inc%20PDFs/MT45V256KW16PEGA.pdf |title=3.0V Core Async/Page PSRAM Memory |publisher=Micron |ref=MT45V256 |access-date=2019-05-04}}</ref> It appears externally as slower SRAM, albeit with a density and cost advantage over true SRAM, and without the access complexity of DRAM.

===By transistor type===
* [[Bipolar junction transistor]] (used in [[transistor-transistor logic|TTL]] and [[emitter coupled logic|ECL]]){{snd}} very fast but with high power consumption
* [[MOSFET]] (used in [[CMOS]]){{snd}} low power

=== By numeral system ===

* Binary
* [[Ternary numeral system|Ternary]]

===By function===
* [[Asynchronous circuit|Asynchronous]]{{snd}} independent of clock frequency; data in and data out are controlled by address transition. Examples include the ubiquitous 28-pin 8K&nbsp;×&nbsp;8 and 32K&nbsp;×&nbsp;8 chips (often but not always named something along the lines of [[6264]] and 62C256 respectively), as well as similar products up to 16&nbsp;Mbit per chip.
* [[Synchronous]]{{snd}} all timings are initiated by the clock edges. Address, data in and other control signals are associated with the clock signals.
In the 1990s, asynchronous SRAM used to be employed for fast access time. Asynchronous SRAM was used as [[main memory]] for small cache-less embedded processors used in everything from [[industrial electronics]] and [[measurement system]]s to [[hard disk]]s and networking equipment, among many other applications. Nowadays, synchronous SRAM (e.g. DDR SRAM) is rather employed similarly to synchronous DRAM{{snd}}[[DDR SDRAM]] memory is rather used than [[asynchronous DRAM]]. Synchronous memory interface is much faster as access time can be significantly reduced by employing [[pipeline (computing)|pipeline]] architecture. Furthermore, as DRAM is much cheaper than SRAM, SRAM is often replaced by DRAM, especially in the case when a large volume of data is required. SRAM memory is, however, much faster for random (not block / burst) access. Therefore, SRAM memory is mainly used for [[CPU cache]], small on-chip memory, [[FIFO (computing and electronics)|FIFO]]s or other small buffers.

===By feature===
* Zero bus turnaround (ZBT){{snd}} the turnaround is the number of clock cycles it takes to change access to SRAM from ''write'' to ''read'' and vice versa. The turnaround for ZBT SRAMs or the latency between read and write cycle is zero.
* syncBurst (syncBurst SRAM or synchronous-burst SRAM){{snd}} features synchronous burst write access to SRAM to increase write operation to SRAM.
* DDR SRAM{{snd}} synchronous, single read/write port, double data rate I/O.
* [[Quad Data Rate SRAM]]{{snd}} synchronous, separate read and write ports, quadruple data rate I/O.
===By stacks===
* Single-stack SRAM
* 2.5D SRAM{{snd}} {{as of|2025|lc=on}}, 3D SRAM technology is still expensive, so SRAM with [[2.5D integrated circuit]] technology may be used.
* 3D SRAM{{snd}} used by AMD Ryzen X3D series processor.<ref>{{cite web | url=https://www.tomshardware.com/pc-components/cpus/amd-ryzen-7-9800x3d-review-devastating-gaming-performance | title=AMD Ryzen 7 9800X3D Review: Devastating Gaming Performance | date=6 November 2024 }}</ref>