Editing X86 virtualization (section)

==== {{Anchor|INTERRUPT}}Interrupt virtualization (AMD AVIC and Intel APICv) ====
In 2012, AMD announced their ''Advanced Virtual Interrupt Controller'' (''AVIC'') targeting interrupt overhead reduction in virtualization environments.<ref>Wei Huang, [http://www.slideshare.net/xen_com_mgr/introduction-of-amd-virtual-interrupt-controller Introduction of AMD Advanced Virtual Interrupt Controller] {{webarchive |url=https://web.archive.org/web/20140714160016/http://www.slideshare.net/xen_com_mgr/introduction-of-amd-virtual-interrupt-controller |date=2014-07-14}}, XenSummit 2012</ref> This technology, as announced, does not support [[Advanced Programmable Interrupt Controller|x2APIC]].<ref>{{cite web
 |url         = http://www.linuxplumbersconf.org/2012/wp-content/uploads/2012/09/2012-lpc-virt-interrupt-virt-kvm-roedel.pdf
 |title       = Next-generation Interrupt Virtualization for KVM
 |date        = August 2012
 |access-date  = 2014-07-12
 |author      = Jörg Rödel
 |publisher   = AMD
 |url-status     = live
 |archive-url  = https://web.archive.org/web/20160304203744/http://www.linuxplumbersconf.org/2012/wp-content/uploads/2012/09/2012-lpc-virt-interrupt-virt-kvm-roedel.pdf
 |archive-date = 2016-03-04
}}</ref>
In 2016, AVIC is available on the AMD family 15h models 6Xh
(Carrizo) processors and newer.<ref>{{cite web |url=http://www.mail-archive.com/xen-devel@lists.xen.org/msg81719.html |title=[Xen-devel] [RFC PATCH 0/9] Introduce AMD SVM AVIC |website=www.mail-archive.com |access-date=4 May 2018 |url-status=live |archive-url=https://web.archive.org/web/20170202040420/https://www.mail-archive.com/xen-devel@lists.xen.org/msg81719.html |archive-date=2 February 2017}}</ref>

Also in 2012, Intel announced a similar technology for interrupt and [[Advanced Programmable Interrupt Controller|APIC]] virtualization, which did not have a brand name at its announcement time.<ref>{{cite web
 |url         = http://www.linuxplumbersconf.org/2012/wp-content/uploads/2012/09/2012-lpc-virt-intel-vt-feat-nakajima.pdf
 |title       = Reviewing Unused and New Features for Interrupt/APIC Virtualization
 |date        = 2012-12-13
 |access-date  = 2014-07-12
 |author      = Jun Nakajimaa
 |publisher   = Intel
 |url-status     = live
 |archive-url  = https://web.archive.org/web/20150421073147/http://www.linuxplumbersconf.org/2012/wp-content/uploads/2012/09/2012-lpc-virt-intel-vt-feat-nakajima.pdf
 |archive-date = 2015-04-21
}}</ref>
Later, it was branded as ''APIC virtualization'' (''APICv'')<ref>{{cite web
 |url         = http://software.intel.com/en-us/blogs/2013/12/17/apic-virtualization-performance-testing-and-iozone
 |title       = APIC Virtualization Performance Testing and Iozone
 |date        = 2013-12-17
 |access-date  = 2014-07-12
 |author      = Khang Nguyen
 |website     = software.intel.com
 |url-status     = live
 |archive-url  = https://web.archive.org/web/20140714142551/https://software.intel.com/en-us/blogs/2013/12/17/apic-virtualization-performance-testing-and-iozone
 |archive-date = 2014-07-14
}}</ref>
and it became commercially available in the [[Ivy Bridge (microarchitecture)|Ivy Bridge EP]] series of Intel CPUs, which is sold as Xeon E5-26xx v2 (launched in late 2013) and as Xeon E5-46xx v2 (launched in early 2014).<ref>{{cite web
 |url         = http://www.intel.com/content/dam/www/public/us/en/documents/product-briefs/xeon-e5-4600-v2-brief.pdf
 |title       = Product Brief Intel Xeon Processor E5-4600 v2 Product Family
 |date        = 2014-03-14
 |access-date  = 2014-07-12
 |publisher   = Intel
 |url-status     = live
 |archive-url  = https://web.archive.org/web/20140714145052/http://www.intel.com/content/dam/www/public/us/en/documents/product-briefs/xeon-e5-4600-v2-brief.pdf
 |archive-date = 2014-07-14
}}</ref>