Editing Current mirror (section)

=== Basic MOSFET current mirror ===
The basic current mirror can also be implemented using MOSFET transistors, as shown in Figure 2. Transistor M<sub>1</sub> is operating in the [[MOSFET#Modes of operation|saturation or active]] mode, and so is M<sub>2</sub>. In this setup, the output current ''I''<sub>OUT</sub> is directly related to ''I''<sub>REF</sub>, as discussed next.

The drain current of a MOSFET ''I''<sub>D</sub> is a function of both the gate-source voltage and the drain-to-gate voltage of the MOSFET given by ''I''<sub>D</sub> = {{itco|''f''}}(''V''<sub>GS</sub>, ''V''<sub>DG</sub>), a relationship derived from the functionality of the [[MOSFET]] device. In the case of transistor M<sub>1</sub> of the mirror, ''I''<sub>D</sub> = ''I''<sub>REF</sub>. Reference current ''I''<sub>REF</sub> is a known current, and can be provided by a resistor as shown, or by a "threshold-referenced" or "[[biasing|self-biased]]" current source to ensure that it is constant, independent of voltage supply variations.<ref name=Gray-Meyer>{{Cite book  |author1=Paul R. Gray |author2=Paul J. Hurst |author3=Stephen H. Lewis |author4=Robert G. Meyer |title=Analysis and Design of Analog Integrated Circuits  |url=https://archive.org/details/analysisdesignan00gray |url-access=limited |year= 2001  |page=[https://archive.org/details/analysisdesignan00gray/page/n322 308]&ndash;309  |edition=Fourth  |publisher=Wiley  |location=New York  |isbn=0-471-32168-0}}</ref>

Using ''V''<sub>DG</sub> = 0 for transistor M<sub>1</sub>, the drain current in M<sub>1</sub> is ''I''<sub>D</sub> = {{itco|''f''}}(''V''<sub>GS</sub>, ''V''<sub>DG</sub>=0), so we find: {{itco|''f''}}(''V''<sub>GS</sub>, 0) = ''I''<sub>REF</sub>, implicitly determining the value of ''V''<sub>GS</sub>. Thus ''I''<sub>REF</sub> sets the value of ''V''<sub>GS</sub>. The circuit in the diagram forces the same ''V''<sub>GS</sub> to apply to transistor M<sub>2</sub>. If M<sub>2</sub> is also biased with zero ''V''<sub>DG</sub> and provided transistors M<sub>1</sub> and M<sub>2</sub> have good matching of their properties, such as channel length, width, threshold voltage, etc., the relationship ''I''<sub>OUT</sub> = {{itco|''f''}}(''V''<sub>GS</sub>, ''V''<sub>DG</sub> = 0) applies, thus setting ''I''<sub>OUT</sub> = ''I''<sub>REF</sub>; that is, the output current is the same as the reference current when ''V''<sub>DG</sub> = 0 for the output transistor, and both transistors are matched.

The drain-to-source voltage can be expressed as ''V''<sub>DS</sub> = ''V''<sub>DG</sub> + ''V''<sub>GS</sub>. With this substitution, the Shichman–Hodges model provides an approximate form for function {{itco|''f''}}(''V''<sub>GS</sub>, ''V''<sub>DG</sub>):<ref name=Gray-Meyer2>{{Cite book  |author=Gray  |title=Eq. 1.165, p. 44  |date=27 March 2001 |publisher=Wiley |isbn=0-471-32168-0  |display-authors=etal}}</ref>
: <math>\begin{align}
 I_\text{d} &= f(V_\text{GS}, V_\text{DG}) \\
 &= \frac{1}{2} K_\text{p} \left(\frac{W}{L}\right)\left(V_\text{GS} - V_\text{th}\right)^2 \left(1 + \lambda V_\text{DS}\right) \\
 &= \frac{1}{2} K_\text{p} \left[\frac{W}{L}\right]\left[V_\text{GS} - V_\text{th}\right]^2 \left[1 + \lambda (V_\text{DG} + V_\text{GS})\right] , \\
\end{align}</math>
where <math>K_\text{p}</math> is a technology-related constant associated with the transistor, ''W''/''L'' is the width to length ratio of the transistor, <math>V_\text{GS}</math> is the gate-source voltage, <math>V_\text{th}</math> is the threshold voltage, ''λ'' is the [[channel length modulation]] constant, and <math>V_{DS}</math> is the drain-source voltage.

==== Output resistance ====
Because of channel-length modulation, the mirror has a finite output (or Norton) resistance given by the ''r''<sub>o</sub> of the output transistor, namely (see [[channel length modulation]]):
: <math> R_\text{N} = r_\text{o} = \frac{1}{I_\text{D}}\left(\frac{1}{\lambda}r + V_\text{DS}\right) = \frac{1}{I_\text{D}}\left(V_\text{E} L + V_\text{DS}\right),</math>
where ''λ'' = channel-length modulation parameter and ''V''<sub>DS</sub> is the drain-to-source bias.

==== Compliance voltage ====
To keep the output transistor resistance high, ''V''<sub>DG</sub> ≥ 0&nbsp;V.<ref group="nb">Keeping the output resistance high means more than keeping the MOSFET in active mode, because the output resistance of real MOSFETs only begins to increase on entry into the active region, then rising to become close to maximum value only when ''V<sub>DG</sub>'' ≥ 0 V.</ref> (see Baker).<ref name=Baker>
{{cite book
 |author=R. Jacob Baker
 |title=CMOS Circuit Design, Layout and Simulation
 |url=https://archive.org/details/cmoscircuitdesig00bake_827
 |url-access=limited
 |edition=Third
 |year= 2010
 |pages=[https://archive.org/details/cmoscircuitdesig00bake_827/page/n333 297], §9.2.1 and Figure 20.28, p. 636
 |publisher=Wiley-IEEE
 |location=New York
 |isbn=978-0-470-88132-3
}}</ref> That means the lowest output voltage that results in correct mirror behavior, the compliance voltage, is ''V''<sub>OUT</sub> = ''V''<sub>CV</sub> = ''V''<sub>GS</sub> for the output transistor at the output current level with ''V''<sub>DG</sub> = 0&nbsp;V, or using the inverse of the ''f''-function, {{itco|''f''}}<sup>−1</sup>:
: <math>V_\text{CV} = V_\text{GS} (\text{for}\ I_\text{D}\ \text{at} \ V_\text{DG} = 0V) = f^{-1}(I_\text{D}) \ \text{with}\ V_\text{DG} = 0 \ .</math>

For the Shichman–Hodges model, {{itco|''f''}}<sup>−1</sup> is approximately a square-root function.

==== Extensions and reservations ====
A useful feature of this mirror is the linear dependence of ''f'' upon device width ''W'', a proportionality approximately satisfied even for models more accurate than the Shichman–Hodges model. Thus, by adjusting the ratio of widths of the two transistors, multiples of the reference current can be generated.

The Shichman–Hodges model<ref>{{usurped|1=[https://web.archive.org/web/20120617000000/http://www.nanodottek.com/NDT14_08_2007.pdf NanoDotTek Report NDT14-08-2007, 12 August 2007]}}</ref> is accurate only for rather dated{{when|date=March 2013}} technology, although it often is used simply for convenience even today. Any quantitative design based upon new{{when|date=March 2013}} technology uses computer models for the devices that account for the changed current-voltage characteristics. Among the differences that must be accounted for in an accurate design is the failure of the square law in ''V''<sub>gs</sub> for voltage dependence and the very poor modeling of ''V''<sub>ds</sub> drain voltage dependence provided by ''λV''<sub>ds</sub>. Another failure of the equations that proves very significant is the inaccurate dependence upon the channel length ''L''. A significant source of ''L''-dependence stems from λ, as noted by Gray and Meyer, who also note that ''λ'' usually must be taken from experimental data.<ref name=Gray-Meyer3>
{{cite book
 |author=Gray
 |title=p. 44
 |date=27 March 2001
 |publisher=Wiley
 |isbn=0-471-32168-0
 |display-authors=etal
}}</ref>

Due to the wide variation of ''V''<sub>th</sub> even within a particular device number discrete versions are problematic. Although the variation can be somewhat compensated for by using a Source degenerate resistor its value becomes so large that the output resistance suffers (i.e. reduces). This variation relegates the MOSFET version to the IC/monolithic arena.