Editing PIC microcontrollers (section)

===PIC24 and dsPIC===
{{Further|topic=these families of microcontrollers|PIC instruction listings#PIC24 and dsPIC 16-bit microcontrollers}}
In 2001, Microchip introduced the dsPIC series of chips,<ref>{{Cite web |url=http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=2018&mcparam=en013529 |title=MICROCHIP TECHNOLOGY DEBUTS WORLD'S HIGHEST PERFORMING 16-BIT MICROCONTROLLERS |publisher=Microchip |date=2001-10-01 |archive-url=https://web.archive.org/web/20040611032643/http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=2018&mcparam=en013529 |archive-date=2004-06-11 |access-date=2022-12-14}}</ref> which entered mass production in late 2004. They are Microchip's first inherently 16-bit microcontrollers. PIC24 devices are designed as general purpose microcontrollers. dsPIC devices include [[digital signal processing]] capabilities in addition.

Although still similar to earlier PIC architectures, there are significant enhancements:<ref>{{cite web |title= PIC24H Family Overview |url=http://ww1.microchip.com/downloads/en/DeviceDoc/70166A.pdf |access-date=23 September 2007}}</ref>

* All registers are 16 bits wide
* [[Program counter]] is 22 bits (bits 22:1; bit 0 is always 0)
* Instructions are 24 bits wide
* Data address space expanded to 64&nbsp;[[Kibibyte|KiB]]
* First 2&nbsp;KiB is reserved for peripheral control registers
* Data bank switching is not required unless RAM exceeds 62&nbsp;KiB
* "f operand" direct addressing extended to 13 bits (8&nbsp;KiB)
* 16 W registers available for register-register operations.<br />(But operations on f operands always reference W0.)
* Instructions come in byte and (16-bit) word forms
* Stack is in RAM (with W15 as stack pointer); there is no hardware stack
* W14 is the [[frame pointer]]
* Data stored in ROM may be accessed directly ("Program Space Visibility")
* [[Vectored Interrupt|Vectored interrupt]]s for different interrupt sources

Some features are:

* (16×16)-bit single-cycle multiplication and other [[digital signal processing]] operations
* hardware [[multiply–accumulate]] (MAC)
* hardware divide assist (19 cycles for 32/16-bit divide)
* [[barrel shifter|barrel shifting]] - for both accumulators and general purpose registers
* bit reversal
* hardware support for loop indexing
* peripheral [[direct memory access]]

dsPICs can be programmed in [[C (programming language)|C]] using Microchip's XC16 compiler (formerly called C30), which is a variant of [[GNU Compiler Collection|GCC]].

Instruction ROM is 24 bits wide. Software can access ROM in 16-bit words, where even words hold the least significant 16 bits of each instruction, and odd words hold the most significant 8 bits. The high half of odd words reads as zero. The program counter is 23 bits wide, but the least significant bit is always 0, so there are 22 modifiable bits.

Instructions come in two main varieties, with most important operations (add, xor, shifts, etc.) allowing both forms:

* The first is like the classic PIC instructions, with an operation between a specified f register (i.e. the first 8K of RAM) and a single accumulator W0, with a destination select bit selecting which is updated with the result. (The W registers are memory-mapped. so the f operand may be any W register.)
* The second form is more conventional, allowing three operands, which may be any of 16 W registers. The destination and one of the sources also support addressing modes, allowing the operand to be in memory pointed to by a W register.