Editing Programmable logic device (section)

== How PLDs retain their configuration ==
A PLD is a combination of a logic device and a [[computer memory|memory]] device. The memory is used to store the pattern that was given to the chip during programming. Most of the methods for storing data in an integrated circuit have been adapted for use in PLDs. These include:

*[[Silicon]] [[antifuse]]s
*[[Static random access memory|SRAM]]
*[[EPROM]] or [[EEPROM]] [[memory cell (computing)|memory cells]]
*[[Flash memory]]

Silicon antifuses are connections that are made by applying a voltage across a modified area of silicon inside the chip. They are called ''antifuses'' because they work in the opposite way to normal fuses, which begin life as connections until they are broken by an electric current.

SRAM, or static RAM, is a volatile type of memory, meaning that its contents are lost each time the power is switched off. SRAM-based PLDs therefore have to be programmed every time the circuit is switched on. This is usually done automatically by another part of the circuit.

An EPROM memory cell is a [[MOSFET]] (metal-oxide-semiconductor field-effect transistor, or MOS transistor) that can be switched on by trapping an electric charge permanently on its gate electrode. This is done by a PAL programmer. The charge remains for many years and can only be removed by exposing the chip to strong [[ultraviolet]] light in a device called an EPROM eraser.

Flash memory is non-volatile, retaining its contents even when the power is switched off. It is stored on [[floating-gate MOSFET]] memory cells, and can be erased and reprogrammed as required. This makes it useful in PLDs that may be reprogrammed frequently, such as PLDs used in prototypes. Flash memory is a kind of EEPROM that holds information using trapped electric charges similar to EPROM. Consequently, flash memory can hold information for years, but possibly not as many years as EPROM.

As of 2005, most CPLDs are electrically programmable and erasable, and non-volatile. This is because they are too small to justify the inconvenience of programming internal SRAM cells every time they start up, and EPROM cells are more expensive due to their ceramic package with a quartz window.