Editing Register renaming (section)

== References ==
<references>
<ref name="cyrix">{{cite web
| url             = http://www.fermimn.edu.it/inform/materiali/evarchi/cyrix.dir/6x86.htm|title=Cyrix 6x86 Processor
| archive-url     = https://web.archive.org/web/20230109162937/http://www.fermimn.edu.it/inform/materiali/evarchi/cyrix.dir/6x86.htm
| archive-date    = 2023-01-09
| url-status=dead
}}</ref>
<ref name="nx686">{{cite press release
| title           = NexGen Details Sixth Generation Nx686 Processor Technology
| url             = http://www.cpushack.com/CIC/announce/1995/NexGenNx686PressRelease.html
}}</ref>
<ref name="barr">
{{cite journal
| title           = 100 MHz and Beyond
| journal         = PC Magazine
| volume          = 13
| issue           = 21
| page            = 172
| url             = https://books.google.com/books?id=PITtFPwTaWwC&pg=PA172
| publisher             = Ziff Davis
| issn             = 0888-8507
| date             = 1994-12-06
}}</ref>
<ref name="simu">
{{cite journal |url=http://www.eecs.umich.edu/eecs/courses/eecs470/papers/RegisterRenaming_Sima.pdf |title=The design space of register renaming techniques |first=D. |last=Simu |journal=[[IEEE Micro]] |volume=20 |issue=5 |date=September–October 2000 |pages=70–83 |publisher=IEEE |doi=10.1109/40.877952}}</ref>
</references>
* {{Cite journal
| title             = Implementation of precise interrupts in pipelined processors
| last1             = Smith
| first1            = J. E.
| author1-link      = James E. Smith (engineer)
| last2             = Pleszkun
| first2            = A. R.
| journal           = ACM SIGARCH Computer Architecture News
| volume            = 13
| issue             = 3
| pages             = 36–44
| date              = June 1985
| doi               = 10.1145/327070.327125
| s2cid = 6616701
}}
* {{Cite journal
| title             = Implementing precise interrupts in pipelined processors
| last1             = Smith
| first1            = J. E.
| author1-link      = James E. Smith (engineer)
| last2             = Pleszkun
| first2            = A. R.
| journal           = [[IEEE Transactions on Computers|IEEE Trans. Comput.]]
| volume            = 37
| issue             = 5
| pages             = 562–573
| date              = May 1988
| doi               = 10.1109/12.4607
}}
* {{Cite conference |book-title        = 25 years of the international symposia on Computer architecture (selected papers) - ISCA '98
 |title        = Implementation of precise interrupts in pipelined processors
 |last1        = Smith
 |first1       = J. E.
 |author1-link = James E. Smith (engineer)
 |last2        = Pleszkun
 |first2       = A. R.
 |pages        = [https://archive.org/details/25yearsofinterna0000unse/page/291 291–299]
 |year         = 1998
 |isbn         = 1581130589
 |doi          = 10.1145/285930.285988
 |url          = https://archive.org/details/25yearsofinterna0000unse/page/291
|doi-access= free
 }}

{{CPU technologies}}

{{DEFAULTSORT:Register Renaming}}
[[Category:Computer architecture]]