Editing WinChip (section)

===WinChip 2 (0.35 μm)===
[[File:KL IDT WinChip2.jpg|thumb|IDT WinChip2]]
* All models supported [[MMX (instruction set)|MMX]]<ref name=WinChipSandpile /> and [[3DNow!]]<ref name=WinChipSandpile />
* The 95&nbsp;mm{{sup|2}} die was made using a 0.35 micron 5-layer metal CMOS technology.<ref name=WinChipSandpile />
* The 64 Kib L1 Cache of the WinChip 2 used a 32 KB 2-way set associative code cache and a 32 KB 4-way set associative data cache.
{| class="wikitable" style="text-align:center"
! Processor<br />model !! Frequency !! [[front side bus|FSB]] !! [[CPU multiplier|Mult.]] !! [[CPU cache|L1 cache]] !! [[Thermal Design Power|TDP]] !! [[CPU core voltage]] !! [[CPU socket|Socket]] !! Release date !! Part number(s) !! Introduction price
|-
| WinChip 2-200 || 200&nbsp;MHz || 66 [[Transfer (computing)|MT/s]] || 3 || 64 [[Kibibyte|KiB]] || 8.8 W || 3.45—3.6 V || {{ubl|[[Socket 5]]|[[Socket 7]]|[[Super Socket 7]]|[[Ceramic pin grid array|CPGA]] 296}} ||  || 3DEE200GSA<br />3DFF200GSA ||
|-
| WinChip 2-225 || 225&nbsp;MHz || 75 MT/s || 3 || 64 KiB || 10.0 W || 3.45—3.6 V || {{ubl|Socket 7|Super Socket 7|CPGA 296}} ||  || 3DEE225GSA ||
|-
| WinChip 2-240 || 240&nbsp;MHz || 60 MT/s || 4 || 64 KiB || 10.5 W || 3.45—3.6 V || {{ubl|Socket 5|Socket 7|Super Socket 7|CPGA 296}} ||  || 3DEE240GSA || 
|-
| WinChip 2-250 || 250&nbsp;MHz || 83 MT/s || 3 || 64 KiB || 10.9 W || 3.45—3.6 V || {{ubl|Super Socket 7|CPGA 296}} || ? ||  ||
|}