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Zilog Z80
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==== Registers ==== {| class="floatright" style="font-size:88%; border: 1px solid #a2a9b1;" |+ '''Zilog Z80 registers''' |- | {| style="font-size:88%;" |- | style="width:10px; text-align:center;"| <sup>1</sup><sub>5</sub> | style="width:10px; text-align:center;"| <sup>1</sup><sub>4</sub> | style="width:10px; text-align:center;"| <sup>1</sup><sub>3</sub> | style="width:10px; text-align:center;"| <sup>1</sup><sub>2</sub> | style="width:10px; text-align:center;"| <sup>1</sup><sub>1</sub> | style="width:10px; text-align:center;"| <sup>1</sup><sub>0</sub> | style="width:10px; text-align:center;"| <sup>0</sup><sub>9</sub> | style="width:10px; text-align:center;"| <sup>0</sup><sub>8</sub> | style="width:10px; text-align:center;"| <sup>0</sup><sub>7</sub> | style="width:10px; text-align:center;"| <sup>0</sup><sub>6</sub> | style="width:10px; text-align:center;"| <sup>0</sup><sub>5</sub> | style="width:10px; text-align:center;"| <sup>0</sup><sub>4</sub> | style="width:10px; text-align:center;"| <sup>0</sup><sub>3</sub> | style="width:10px; text-align:center;"| <sup>0</sup><sub>2</sub> | style="width:10px; text-align:center;"| <sup>0</sup><sub>1</sub> | style="width:10px; text-align:center;"| <sup>0</sup><sub>0</sub> | style="width:auto;" | ''(bit position)'' |- |colspan="17" | '''Main registers''' |- style="background:silver;color:black" | style="text-align:center;" colspan="8"| Accumulator (A) | style="text-align:center;background:#DDD" colspan="8"| Flags (F) | style="background:white; color:black;"| '''AF''' |- style="background:silver;color:black" | style="text-align:center;" colspan="8"| B | style="text-align:center;" colspan="8"| C | style="background:white; color:black;"| '''BC''' |- style="background:silver;color:black" | style="text-align:center;" colspan="8"| D | style="text-align:center;" colspan="8"| E | style="background:white; color:black;"| '''DE''' |- style="background:silver;color:black" | style="text-align:center;" colspan="8"| H | style="text-align:center;" colspan="8"| L | style="background:white; color:black;"| '''HL''' |- |colspan="17" | '''Alternate (shadow) registers''' |- style="background:silver;color:black" | style="text-align:center;" colspan="8"| Accumulator' (A') | style="text-align:center;background:#DDD" colspan="8"| Flags' (F') | style="background:white; color:black;"| '''AF{{'}}''' |- style="background:silver;color:black" | style="text-align:center;" colspan="8"| B' | style="text-align:center;" colspan="8"| C' | style="background:white; color:black;"| '''BC{{'}}''' |- style="background:silver;color:black" | style="text-align:center;" colspan="8"| D' | style="text-align:center;" colspan="8"| E' | style="background:white; color:black;"| '''DE{{'}}''' |- style="background:silver;color:black" | style="text-align:center;" colspan="8"| H' | style="text-align:center;" colspan="8"| L' | style="background:white; color:black;"| '''HL{{'}}''' |- |colspan="17" | '''Index registers''' |- style="background:silver;color:black" | style="text-align:center;" colspan="16"| Index X | style="background:white; color:black;"| '''IX''' |- style="background:silver;color:black" | style="text-align:center;" colspan="16"| Index Y | style="background:white; color:black;"| '''IY''' |- style="background:silver;color:black" | style="text-align:center;" colspan="16"| Stack Pointer | style="background:white; color:black;"| '''SP''' |- |colspan="17" | '''Other registers''' |- style="background:silver;color:black" | style="text-align:center;" colspan="8"| Interrupt vector | style="text-align:center;" colspan="8"| Refresh counter | style="background:white; color:black;"| '''I/R''' |- |colspan="17" | '''Program counter''' |- style="background:silver;color:black" | style="text-align:center;" colspan="16"| Program Counter | style="background:white; color:black;"| '''PC''' |- |colspan="17" | '''Status register''' |- style="background:silver;color:black" | style="background:white; color:black;" colspan="8"| <!--NEED TO ADD INTERRUPT STATUS/MODE BITS--> | style="text-align:center;"| [[Sign flag|S]] | style="text-align:center;"| [[Zero flag|Z]] | style="text-align:center;"| - | style="text-align:center;"| [[Adjust flag|H]] | style="text-align:center;"| - | style="text-align:center;"| [[Parity flag|P]]/[[Overflow flag|V]] | style="text-align:center;"| N | style="text-align:center;"| [[Carry flag|C]] | style="background:white; color:black" | '''F'''lags |} |} As on the 8080, 8-bit registers are typically paired to provide 16-bit versions. The 8080 compatible registers<ref name="Heath 2003">{{Cite book |last=Heath |first=Steve |url=https://archive.org/details/embeddedsystemsd0000heat |title=Embedded systems design |date=2003 |publisher=Newnes |isbn=978-0-7506-5546-0 |location=Oxford |page=21 |url-access=registration}}</ref> are: * <code>AF</code>: 8-bit [[Accumulator (computing)|accumulator]] (A) and flag bits (F) carry, zero, minus, parity/overflow, half-carry (used for [[Binary-coded decimal|BCD]]), and an Add/Subtract flag (usually called N) also for BCD * <code>BC</code>: 16-bit data/address register or two 8-bit registers * <code>DE</code>: 16-bit data/address register or two 8-bit registers * <code>HL</code>: 16-bit accumulator/address register or two 8-bit registers * <code>SP</code>: [[stack pointer]], 16 bits * <code>PC</code>: program counter, 16 bits The new registers introduced with the Z80 are: * <code>IX</code>: 16-bit index or base register for 8-bit immediate offsets * <code>IY</code>: 16-bit index or base register for 8-bit immediate offsets * <code>I</code>: interrupt vector base register, 8 bits * <code>R</code>: DRAM refresh counter, 8 bits ([[Most significant bit|msb]] does not count) * <code>AF'</code>: alternate (or shadow) accumulator and flags (''toggled in and out with EX AF,AF' '') * <code>BC'</code>, <code>DE'</code> and <code>HL'</code>: alternate (or shadow) registers (''toggled in and out with EXX'') * Four bits of interrupt status and interrupt mode status The ''refresh register'', <code>R</code>, increments each time the CPU fetches an opcode (or an opcode prefix, which internally executes like a 1-byte instruction) and has no simple relationship with program execution. This has sometimes been used to generate [[pseudorandom]] numbers in games, and also in software protection schemes.{{Citation needed|date=February 2012}} It has also been employed as a "hardware" counter in some designs; an example of this is the [[ZX81]], which lets it keep track of character positions on the TV screen by triggering an interrupt at [[integer overflow|wrap around]] (by connecting INT to A6). The ''interrupt vector register'', <code>I</code>, is used for the Z80 specific mode 2 interrupts (selected by the <code>IM 2</code> instruction). It supplies the high byte of the base address for a 128-entry table of [[interrupt service routine|service routine]] addresses which are selected via an index sent to the CPU during an [[interrupt]] acknowledge cycle; this index is simply the low byte part of the pointer to the tabulated indirect address pointing to the service routine.<ref name="Wai-Kai 2002" /> The pointer identifies a particular peripheral chip or peripheral function or event, where the chips are normally connected in a so-called [[Daisy chain (electrical engineering)|daisy chain]] for priority resolution. Like the refresh register, this register has also sometimes been used creatively; in interrupt modes 0 and 1 (or in a system not using interrupts) it can be used as simply another 8-bit data register. The instructions <code>LD A,R</code> and <code>LD A,I</code> affect the Z80 flags register, unlike all the other <code>LD</code> (load) instructions. The Sign (bit 7) and Zero (bit 6) flags are set according to the data loaded from the Refresh or Interrupt source registers. For both instructions, the Parity/Overflow flag (bit 2) is set according to the current state of the IFF2 flip-flop.<ref>{{Cite web |last=Rison |first=Mark |editor-last=Young |editor-first=Sean |title=Z80 Flag Affection |url=http://www.z80.info/z80sflag.htm |url-status=live |archive-url=https://web.archive.org/web/20231223185036/http://z80.info/z80sflag.htm |archive-date=December 23, 2023 |access-date=June 14, 2016 |website=z80.info |publisher=Thomas Scherrer}}</ref>
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