Editing Cache-only memory architecture

{{Short description|Computer memory organization}}
{{More citations needed|date=July 2021}}

'''Cache only memory architecture''' ('''COMA''') is a [[computer memory]] organization for use in [[multiprocessor]]s in which the local memories (typically [[DRAM]]) at each node are used as cache.  This is in contrast to using the local memories as actual main memory, as in [[Non-Uniform Memory Access|NUMA]] organizations.

In NUMA, each address in the global address space is typically assigned a fixed home node.  When processors access some data, a copy is made in their local cache, but space remains allocated in the home node.  Instead, with COMA, there is no home.  An access from a remote node may cause that data to migrate.  Compared to NUMA, this reduces the number of redundant copies and may allow more efficient use of the memory resources.  On the other hand, it raises problems of how to find a particular data (there is no longer a home node) and what to do if a local memory fills up (migrating some data into the local memory then needs to evict some other data, which doesn't have a home to go to).  Hardware [[memory coherence]] mechanisms are typically used to implement the migration.

A huge body of research has explored these issues.  Various forms of directories, policies for maintaining free space in the local memories, migration policies, and policies for read-only copies have been developed.  Hybrid NUMA-COMA organizations have also been proposed, such as Reactive NUMA, which allows pages to start in NUMA mode and switch to COMA mode if appropriate and is implemented in the Sun Microsystems's WildFire.<ref>{{Cite conference |title=WildFire: A Scalable Path for SMPs |url=http://www.cs.utah.edu/~rajeev/cs7820/papers/hpca99.pdf}}</ref><ref>{{Cite book |last1=Noordergraaf |first1=Lisa |title=Proceedings of the 1999 ACM/IEEE conference on Supercomputing |last2=van der Pas |first2=Ruud |date=1999 |isbn=1581130910 |pages=38–es |chapter=Performance experiences on Sun's Wildfire prototype |citeseerx=10.1.1.22.6994 |doi=10.1145/331532.331570 |s2cid=17739}}</ref> A software-based Hybrid NUMA-COMA implementation was proposed and implemented by ScaleMP,<ref>{{Cite web |title=United States Patent: Cluster-based operating system-agnostic virtual computing system |url=http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8544004 |access-date=2014-04-10 |archive-date=2019-02-24 |archive-url=https://web.archive.org/web/20190224174023/http://patft1.uspto.gov/netacgi/nph-Parser?patentnumber=8544004 |url-status=dead }}</ref> allowing for the creation of a shared-memory multiprocessor system out of a cluster of commodity nodes.

==See also==
* [[Non-uniform memory access]]
* [[Uniform memory access]]

== References ==
{{reflist}}
* {{Cite journal |last1=Dahlgren |first1=F. |last2=Torrellas |first2=J. |date=June 1999 |title=Cache-only memory architectures |url=https://ieeexplore.ieee.org/document/769448 |journal=Computer |volume=32 |issue=6 |pages=72–79 |citeseerx=10.1.1.34.7679 |doi=10.1109/2.769448}}
* {{Cite journal |last1=Hagersten |first1=E. |last2=Landin |first2=A. |last3=Haridi |first3=S. |date=September 1992 |title=DDM-a cache-only memory architecture |url=https://ieeexplore.ieee.org/document/156381 |journal=Computer |volume=25 |issue=9 |pages=44–54 |doi=10.1109/2.156381}}
* {{Cite conference |last1=Falsafi |first1=Babak |last2=Wood |first2=David A. |date=June 1997 |title=Reactive NUMA: a design for unifying S-COMA and CC-NUMA |pages=229&ndash;40 |book-title=Proceedings of the 24th Annual [[International Symposium on Computer Architecture]] (ISCA)}}
{{Parallel_computing}}

[[Category:Parallel computing]]
[[Category:Computer memory]]


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