Editing Cray X-MP

{{Short description|Supercomputer manufactured by Cray Research}}
{{Infobox supercomputer
| name         = Cray X-MP
| image        = CRAY X-MP IMG 9135.jpg
| caption      = The CERN Cray X-MP/48 displayed at the [[École Polytechnique Fédérale de Lausanne|EPFL]] in [[Switzerland]].
| manufacturer = [[Cray Research]]
| designer     = [[Steve Chen (computer engineer)|Steve Chen]]
| release date = {{Start date|1982}}
| units sold   = 
| price        = $15 million<ref name=extremetech>[https://www.extremetech.com/extreme/125271-the-history-of-supercomputers/3 The history of supercomputers, ExtremTech.com]</ref>
| dimensions   = {{convert|2.62|m|ft|abbr=on}} x {{convert|1.96|m|ft|abbr=on}}
| weight       = {{convert|5.12|MT|lb|abbr=on}}<ref name=manual86>[http://www.bitsavers.org/pdf/cray/CRAY_X-MP/HR-0097B_Cray_X-MP_Four-Processor_Mainframe_Reference_Manual_Aug86.pdf Cray X-MP Four-Processor Mainframe Reference Manual Aug 86]</ref>
| power        = 345 kW<ref>3-5 times the Cray-1 power, according to Cray X-MP 1985 brochure</ref>
| voltage      = 
| front-end    = Most minicomputers of the time
| os           = COS, UNICOS
| cpu          = 4x Vector processor 64 bits
| frequency    = 105 - 117 MHz
| memory       = 128 [[megabytes]]
| storage      = 38.4 [[gigabytes]] (32 disks)
| mips         = 400 MIPS (4 CPU)
| flops        = 800 [[MFLOPS]] (4 CPU)
| successor    = [[Cray Y-MP]]
| predecessor  = [[Cray-1]]
}}
The '''Cray X-MP''' was a [[supercomputer]] designed, built and sold by [[Cray|Cray Research]]. It was announced in 1982 as the "cleaned up" successor to the 1975 [[Cray-1]], and was the world's fastest computer from 1983 to 1985 with a quad-processor system performance of 800 [[MFLOPS]].<ref>{{cite book |last=Steinhauser |first=Martin Oliver |title=Computational Multiscale Modeling of Fluids and Solids: Theory and Applications |url=https://books.google.com/books?id=Ilzans7dWTQC&dq=Cray+X-MP+world%27s+fastest+computer&pg=PA20 |year=2008 |publisher=Springer |isbn=9783540751168 |page=21}}</ref> The principal designer was [[Steve Chen (computer engineer)|Steve Chen]].

==Description==
The X-MP's main improvement over the Cray-1 was that it was a shared-memory [[Parallel computing|parallel]] [[vector processor]], the first such computer from Cray Research. It housed up to four CPUs in a mainframe that was nearly identical in outside appearance to the Cray-1.

The X-MP CPU had a faster 9.5&nbsp;[[nanosecond]] clock cycle (105&nbsp;MHz), compared to 12.5&nbsp;ns for the Cray-1A. It was built from [[Bipolar junction transistor|bipolar]] [[gate-array]] [[integrated circuit]]s containing 16 [[emitter-coupled logic]] [[Logic gate|gate]]s each. The CPU was very similar to the Cray-1 CPU in architecture, but had better memory bandwidth (with two read ports and one write port to the main memory instead of only one read/write port) and improved chaining support. Each CPU had a theoretical peak performance of 200&nbsp;MFLOPS.<ref name=brochure>Cray Research, Inc. (1985). [http://archive.computerhistory.org/resources/text/Cray/Cray.X-MP.1985.102646183.pdf "The Cray X-MP Series of Computer Systems"].</ref>

The X-MP initially supported 2 million 64-bit [[Word (data type)|word]]s (16 MB) of main memory in 16 banks, respectively.{{citation needed|date=November 2015}} The main memory was built from 4&nbsp;Kbit bipolar SRAM ICs.{{citation needed|date=November 2015}} CMOS memory versions of the Cray-1M were renamed Cray X-MP/1s. This configuration was first used for Cray Research's UNIX port.

In 1984, improved models of the X-MP were announced, consisting of one, two, and four-processor systems with 4 and 8 million word configurations. The top-end system was the X-MP/48, which contained four CPUs with a theoretical peak system performance of over 800&nbsp;MFLOPS and 8 million words of memory.<ref name=brochure /> The CPUs in these models introduced vector [[Gather-scatter (vector addressing)|gather/scatter]] memory reference instructions to the product line. The amount of main memory supported was increased to a maximum of 16 million words, depending on the model. The main memory was built from bipolar or MOS SRAM ICs, depending on the model.

The system initially ran the proprietary [[Cray Operating System]] (COS) and was object-code compatible with the Cray-1. A [[UNIX System V]] derivative initially named CX-OS and finally renamed [[UNICOS]] ran through a guest [[operating system]] facility. UNICOS became the main OS from 1986 onwards. The [[United States Department of Energy|DOE]] ran the [[Cray Time Sharing System]] and the [[NLTSS]] operating systems instead. See the Software section for the [[Cray-1]] for a more detailed elaboration of software (language compiler, assembler, operating systems, and applications) as X-MPs and Cray-1s were mostly compatible.

==Extended Architecture series==
Cray Research announced the X-MP Extended Architecture series in 1986. The EA series CPU had an 8.5&nbsp;ns clock cycle (117&nbsp;MHz), and was built from [[macrocell array]] and gate array ICs. The EA series extended the width of the A and B registers to 32 bits and performed 32-bit address arithmetic, increasing the amount of memory theoretically addressable to 2 billion words. The largest configuration produced was 64 million words of MOS SRAM in 64 banks. For compatibility with existing software written for the Cray-1 and older X-MP models, 24-bit addressing was also supported. Each EA series CPU's peak performance was 234&nbsp;MFLOPS. For a four-processor system, the peak performance was 942&nbsp;MFLOPS.{{citation needed|date=April 2009}}

==I/O subsystem==
[[File:Cray DD49 - Musée des arts et métiers.jpg|upright|thumb|Cray DD-49]]
The [[Input/Output]] (I/O) subsystem could have two to four I/O processors with a total of 2 to 32 disk storage units.  The DD-39 and DD-49 hard drives made by [[Ibis (company)|Ibis]] with a raw transfer rate of 13.3&nbsp;MB/s each stored 1200&nbsp;megabyte (blocked and formatted) with 5.9&nbsp;MB/s and 9.8&nbsp;MB/s transfer rates (unstriped), respectively. Optional [[solid-state drive]]s were available with 256, 512 or 1024&nbsp;MB capacities with transfer rates of 100 to 1,000&nbsp;MB/s per channel. Up to 38 gigabytes of data storage was possible.<ref name=brochure /><ref name=brochure86>Cray Research, Inc. (1986). [http://www.craysupercomputers.com/downloads/CrayXMP/CrayXMP_Brochure001.pdf "The Cray X-MP Series of Computer Systems"].</ref>

For [[magnetic tape]] I/O, the system could interface with [[IBM 3420]] and [[IBM 3480|3480]] tape units directly without a lot of CPU processing.<ref name=brochure86 />

==Pricing==
A 1984 X-MP/48 cost about [[United States dollar|US$]]15&nbsp;million plus the cost of [[hard disk|disks]]. In 1985 [[Bell Labs]] purchased a Cray X-MP/24 for $10.5 million along with eight DD-49 1.2&nbsp;GB drives for an additional $1 million. They received $1.5 million of trade-in credit for their Cray-1.<ref>{{cite web
| url = http://cm.bell-labs.com/cm/cs/who/dmr/cray.html
| title = Two Cray X/MP papers
| author = Dennis Ritchie
| author-link = Dennis Ritchie
| accessdate = 2009-04-02
| date = September 2000
| archive-url = https://web.archive.org/web/20130317154318/http://cm.bell-labs.com/cm/cs/who/dmr/cray.html
| archive-date = 2013-03-17
| url-status = dead
}}</ref>

==Successors==
The [[Cray-2]], a completely new design, was introduced in 1985. A very different compact four-processor design with from 64&nbsp;MW (megaword) to 512&nbsp;MW (512&nbsp;MB to 4&nbsp;GB) of main memory, it was specified to 500&nbsp;MFLOPS but was slower than the X-MP on certain calculations due to its high memory latency<!--Do not link to "RAM latency", which pertains to the latency of SDRAM, which the CRAY-2 did not use-->.

The [[Cray Y-MP]] upgrade of the X-MP series was announced in 1988; it also had a new design, replacing the 16-gate ECL [[gate array]]s with a more compact [[VLSI]] gate array with larger circuit boards. It was a major improvement of the X-MP supporting up to eight processors.

==Usage==
* The short film ''[[The Adventures of André & Wally B.]]'', released in 1984 by The Graphics Group, a then-Lucasfilm subsidiary which would later become Pixar, used an X-MP/48 for much of its rendering. Special thanks is given to Cray Research in the short's credits for use of the machine.<ref>{{cite web |title=André and Wally B. (1984) Company Credits |url=https://www.imdb.com/title/tt0086855/companycredits |website=IMDb |accessdate=12 May 2020}}</ref>
* The 1984 film ''[[The Last Starfighter]]'' depended heavily on high polygon count (for the time) models with complex lighting effects, the rendering of which was made possible by the use of the X-MP.<ref>[http://design.osu.edu/carlson/history/lesson6.html#dp Ohio State University CG history page]</ref>
* The animation for the 1986 [[Marvel Productions]] logo, which featured an animated silver-colored [[Spider-Man]], was rendered using this supercomputer.
* [[Mick Jagger]]'s single version of "Hard Woman" extensively utilised the X-MP for rendering its [[music video]] animation.

==Image gallery==
<gallery>
Image:EPFL CRAY-I 2.jpg|Control panel of the CRAY X-MP/48
Image:EPFL CRAY-I 3.jpg|Logic boards of the CRAY X-MP/48
Image:EPFL CRAY-I 4.jpg|Cooling system of the CRAY X-MP/48
Image:BSC-CRAY-X-MP-EA-A.JPG|CRAY X-MP/24 at [[Barcelona Supercomputing Center]]
Image:BSC-CRAY-X-MP-EA-B.JPG|CRAY X-MP/24 at Barcelona Supercomputing Center
</gallery>

==References==
{{Reflist}}

==Further reading==
* Keith Robbins and S. Robbins (1989) ''Lecture Notes in Computer Science: The Cray X-MP/Model 24'' Springer {{ISBN|3-540-97089-4}}

==External links==
*{{Commons category-inline|Cray-XMP48}}

{{S-start}}
{{S-ach|rec}}
{{S-bef|before=[[Cray-1]]<br />136 megaflops}}
{{S-ttl
 | title = [[LINPACK|World's most powerful supercomputer]]
 | years = 1983–1985
}}
{{s-aft|after=[[Cray-2]]<br />1.95 gigaflops (peak)}}
{{S-end}}

{{Cray computers}}
{{Authority control}}

[[Category:Products introduced in 1982]]
[[Category:Cray products|Xmp]]
[[Category:Vector supercomputers]]
[[Category:64-bit computers]]