Editing Crossbar latch

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The '''Crossbar latch''' is a technology published by Phillip Kuekes of [[HP Labs]] in 2001 and granted a US patent in 2003,<ref>{{Cite web|date=2005-04-21|title=Researchers Find that the 'Crossbar Latch' Can Replace Transistors and Improve Processing Power|url=https://www.azonano.com/article.aspx?ArticleID=1206|access-date=2021-12-23|website=AZoNano.com|language=en}}</ref> with the goal of eventually replacing [[transistor]]s in various applications.<ref> {{cite journal |last1=Kuekes |first1=Philip J. |last2=Stewart |first2=Duncan R. |last3=Williams |first3=R. Stanley |date=1 September 2005 |title=The crossbar latch: Logic value storage, restoration, and inversion in crossbar circuits |journal=Journal of Applied Physics | volume=97 |issue=3 |pages=034301–034301–5 | doi=10.1063/1.1823026|bibcode=2005JAP....97c4301K }} </ref> This would enable the creation of [[integrated circuit]]s composed solely of [[memristor]]s, which, according to the patent, might be easier and less expensive to create. In 2005, Phillip Kuekes stated that the crossbar latch "could someday replace transistors in computers, just as transistors replaced [[vacuum tube]]s and vacuum tubes replaced electromagnetic relays before them."<ref>{{cite web |last1=Singer |first1=Michael |date=2005-02-02 |title=HP's "Crossbar Latch' to Replace Transistors? |url=http://www.internetnews.com/ent-news/article.php/3467491 |url-status=dead |archive-url=https://web.archive.org/web/20210511074624/https://www.internetnews.com/ent-news/article.php/3467491 |archive-date=2021-05-11 |accessdate=8 May 2015 |website=InternetNews.com}}</ref>

==Details==
The crossbar latch was introduced by HP Labs scientists in the [[Journal of Applied Physics]], which provides a basis for constructing [[logic gate]]s using memristors. The crossbar latch consists of a signal line crossed by two control lines.  Depending on the [[voltage]]s sent down the various lines, it can simulate the action of the three major [[logic gate]]s: [[AND gate|AND]], [[OR gate|OR]] and [[NOT gate|NOT]].

The abstract of the patent is as follows: {{Quotation|"A [[molecular]] crossbar latch is provided, comprising two [[Control system|control]] [[wire]]s and a [[signal (information theory)|signal]] wire that crosses the two control wires at a non-zero angle to thereby form a junction with each control wire. Each junction forms a switch and the junction has a functional [[dimension]] in [[nanometers]]. The signal wire selectively has at least two different [[voltage]] states, ranging from a 0 state to a 1 state, wherein there is an [[asymmetry]] with respect to the direction of [[current (electricity)|current]] flow from the signal wire through one junction compared to another junction such that current flowing through one junction into (out of) the signal wire can open (close) while current flowing through the other junction out of (into) the signal wire can close (open) the switch, and wherein there is a voltage [[Threshold voltage|threshold]] for switching between an open switch and a closed switch. Further, methods are provided for latching [[logic]] values onto [[nanowires]] in a logic array, for inverting a logic value, and for restoring a voltage value of a signal in a nano-scale wire. Invented by Phillip J Kuekes."|U.S. patent 6,586,965<ref>{{cite web|url=https://patents.google.com/patent/US6586965?oq=6%2C586%2C965%2C|title=U.S. Patent 6,586,965}}</ref>}}
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==Applications in arithmetic processing==
[[Image:Crossmath1a.JPG|thumb|500px|right|Fig. 1 Crossbar latches configured as a half-adder]]

Greg Snider of [[Hewlett-Packard]] created this application, which uses crossbar latches to imitate the functionality of a half adder, which is the foundation of modern computing systems. <ref>{{cite web|url=http://www.google.com/patents?id=zrB_AAAAEBAJ&dq=7203789,|title=U.S. Patent 7,203,789}}{{dead link|date=June 2024|bot=medic}}{{cbignore|bot=medic}}</ref> A crossbar tile is created in this application from a layer of horizontal row wires and a layer of vertical column wires, with [[memristor]] or similar materials sandwiched between the horizontal and vertical wire layers. Each crossbar tile intersection or junction can be configured to be in a high-resistance state with little or no current flowing between the horizontal and vertical wires, or in a low-resistance state with current flowing. Fig. 1 illustrates the configuration of a half-adder using a crossbar tile, as taught by Snider, with the nodes identifying junctions of the crossbar tile configured as low-resistance states. By setting different logic inputs A, NOT A, B, and NOT B to different row wires this configuration produces the sum and carry outputs typical for a half-adder. Connections between multiple half-adders may then be used to form full adders in accordance with conventional arithmetic architectures.

==Applications of crossbar latch in Neuromorphic==

Crossbar latches have been suggested as components of [[neuromorphic]] computing systems.<ref>{{Cite journal |last=Xu |first=Qi |last2=Geng |first2=Hao |last3=Chen |first3=Song |last4=Yu |first4=Bei |last5=Wu |first5=Feng |date=2019-11-25 |title=Memristive Crossbar Mapping for Neuromorphic Computing Systems on 3D IC |url=https://dl.acm.org/doi/10.1145/3365576 |journal=ACM Trans. Des. Autom. Electron. Syst. |volume=25 |issue=1 |pages=8:1–8:19 |doi=10.1145/3365576 |issn=1084-4309|url-access=subscription }}</ref> One implementation of this is in the form of a [[neural network]] formed from [[nanowire]]s as discussed in a patent by Greg Snider of [[Hewlett-Packard]].{{cn|date=October 2024}}

==See also==
* [[Memristor]]

==References==
{{Reflist}}

==External links==
* {{US patent|6586965}}
* [http://www.hp.com/hpinfo/newsroom/press/2005/050201a.html Research could send transistors the way of the vacuum tube] (HP Press Release)
* [http://www.computerworld.com/hardwaretopics/hardware/story/0,10801,99419,00.html?source=NLT_AM&nid=99419 HP claims molecular computing breakthrough] (ComputerWorld)

[[Category:Electrical components]]


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