Editing Electromigration

{{Short description|Movement of ions in an electrical field}}
[[File:Electromigration.png|thumb|Electromigration (red arrow) is due to the momentum transfer from the electrons moving in a wire]]
'''Electromigration''' is the transport of material caused by the gradual movement of the [[ion]]s in a [[Conductor (material)|conductor]] due to the [[momentum]] transfer between conducting [[electron]]s and diffusing metal [[atom]]s.  The effect is important in applications where high direct current densities are used, such as in [[microelectronics]] and related structures. As the structure size in [[electronics]] such as [[integrated circuit]]s (ICs) decreases, the practical significance of this effect increases.

== History ==
The phenomenon of electromigration has been known for over 100 years, having been discovered by the French scientist Gerardin.<ref>{{cite book|title= 2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual|pages=iii–iv|doi=10.1109/RELPHY.2005.1493049|chapter= Preface|year=2005|isbn=978-0-7803-8803-1}}</ref> The topic first became of practical interest during the late 1960s when packaged ICs first appeared. The earliest commercially available ICs failed in a mere three weeks of use from runaway electromigration, which led to a major industry effort to correct this problem. The first observation of electromigration in thin films was made by I. Blech.<ref name="Blech" >I. Blech: ''Electromigration in Thin Aluminum Films on Titanium Nitride.'' Journal of Applied Physics, Vol 47, pp. 1203-1208, April 1976.</ref> Research in this field was pioneered by a number of investigators throughout the fledgling [[semiconductor]] industry. One of the most important engineering studies was performed by Jim Black of [[Motorola]], after whom [[Black's equation]] is named.<ref name="Black" >J.R. Black: ''Electromigration - A Brief Survey and Some Recent Results.'' IEEE Trans. Electron Devices, Vol. ED-16 (No. 4), pp. 338-347, April 1969.</ref> At the time, the metal [[Interconnects (integrated circuits)|interconnect]]s in ICs were still about 10 [[micrometre]]s wide. Currently interconnects are only hundreds to tens of [[nanometer]]s in width, making research in electromigration increasingly important.

== Practical implications of electromigration ==
[[File:In situ electromigration.gif|Top visualization of electromigration under scanning electron microscope of a nanoconstriction (60 nm width) on silicon oxide substrate.<ref>{{Cite journal|last1=Lombardo|first1=Joseph|last2=Baumans|first2=Xavier D. A.|last3=Željko|first3=Jelić L.|last4=Scheerder|first4=Jeroen E.|last5=Zharinov|first5=Vyacheslav S.|last6=Kramer|first6=Roman|last7=Van de Vondel|first7=Joris|last8=Silhanek|first8=Alejandro V.|date=2018-03-07|title=Healing effect of controlled anti-electromigration on conventional and high-Tc superconducting nanowires|hdl=2268/214980|journal=Small|language=en|volume=13|issue=26|pages=1700384|pmid=28544388|doi=10.1002/smll.201700384|url=http://orbi.ulg.ac.be/handle/2268/212130}}</ref>|thumb]]
[[File:leiterbahn ausfallort elektromigration.jpg|thumb|right|[[scanning electron microscope|SEM]] image of a failure caused by electromigration in a [[copper interconnect]]. The [[Passivation (chemistry)|passivation]] has been removed by [[reactive ion etching]] and [[hydrofluoric acid]]]]

Electromigration decreases the reliability of [[integrated circuits]] (ICs). It can cause the eventual loss of connections or failure of a circuit. Since reliability is critically important for [[Space exploration|space travel]], [[Armed force|military purposes]], [[anti-lock braking system]]s, medical equipment like [[Automated External Defibrillator]]s and is even important for personal computers or home entertainment systems, the reliability of chips [[integrated circuits|(ICs)]] is a major focus of research efforts.

Due to the difficulty of testing under real-world conditions, [[Black's equation]] is used to predict the life span of integrated circuits.
To use [[Black's equation]], the component is put through [[high temperature operating life]] (HTOL) testing. The component's expected life span under real conditions is [[Extrapolation|extrapolated]] from data gathered during this testing.<ref name="Black" />

Although damage from electromigration ultimately results in the failure of the affected IC, the first symptoms are intermittent glitches, which are quite challenging to diagnose. As some interconnects fail before others, the circuit exhibits seemingly random errors, which may be indistinguishable from other failure mechanisms (such as [[electrostatic discharge]] damage). In a laboratory setting, electromigration failure is readily imaged with an electron microscope, as interconnect erosion leaves telltale visual markers on the metal layers of the IC.

With increasing miniaturization, the probability of failure due to electromigration increases in [[Very-large-scale integration|VLSI]] and [[Ultra Large Scale Integration|ULSI]] circuits because both the power density and the current density increase.<ref name="EM_book">{{Cite book|author=J. Lienig, M. Thiele|title=Fundamentals of Electromigration-Aware Integrated Circuit Design|url=https://link.springer.com/book/10.1007/978-3-319-73558-0|pages=1–12|chapter=Introduction|chapter-url=https://link.springer.com/chapter/10.1007/978-3-319-73558-0_1|publisher=Springer|date=2018|isbn=978-3-319-73557-3|doi=10.1007/978-3-319-73558-0}}</ref> Specifically, line widths will continue to decrease over time, as will wire cross-sectional areas. Currents are also reduced due to lower supply voltages and shrinking gate capacitances.<ref name="EM_book" /> However, as current reduction is constrained by increasing frequencies, the more marked decrease in cross-sectional areas (compared to current reduction) will give rise to increased current densities  in ICs going forward.<ref name="Lienig2" >J. Lienig, M. Thiele: "The Pressing Need for Electromigration-Aware Physical Design  " [https://www.ifte.de/mitarbeiter/lienig/ispd_2018_pp144_151.pdf (Download paper)], ''Proc. of the Int. Symposium on Physical Design (ISPD) 2018'', pp. 144–151, March 2018</ref>

In advanced [[semiconductor manufacturing]] processes, [[Copper interconnects|copper]] has replaced [[Aluminum interconnects|aluminium]] as the [[Interconnects (integrated circuit)|interconnect]] material of choice. Despite its greater fragility in the fabrication process, copper is preferred for its superior conductivity. It is also intrinsically less susceptible to electromigration. However, electromigration (EM) continues to be an ever-present challenge to device fabrication, and therefore the EM research for copper interconnects is ongoing (though a relatively new field).<ref name="Lienig2" />

In modern consumer electronic devices, ICs rarely fail due to electromigration effects.  This is because proper semiconductor design practices incorporate the effects of electromigration into the IC's layout.<ref name="Lienig2" />  Nearly all IC design houses use automated [[Electronic design automation|EDA]] tools to check and correct electromigration problems at the transistor layout-level.  When operated within the manufacturer's specified temperature and voltage range, a properly designed IC device is more likely to fail from other (environmental) causes, such as cumulative damage from [[gamma ray|gamma-ray]] bombardment.

Nevertheless, there have been documented cases of product failures due to electromigration.  In the late 1980s, one line of [[Western Digital]]'s desktop drives suffered widespread, predictable failure after 12–18 months of field usage.  Using forensic analysis of the returned bad units, engineers identified improper design-rules in a third-party supplier's IC controller.  By replacing the bad component with that of a different supplier, WD was able to correct the flaw, but not before significant damage was done to the company's reputation.

Electromigration can be a cause of degradation in some [[power semiconductor device]]s such as low voltage [[power MOSFET]]s, in which the lateral current through the source contact metallisation (often aluminium) can reach the critical current densities during overload conditions.  The degradation of the aluminium layer causes an increase in on-state resistance, and can eventually lead to complete failure.

== Fundamentals ==
The material properties of the metal interconnects have a strong influence on their life span. The characteristics are predominantly the composition of the metal alloy and the dimensions of the conductor. The shape of the conductor, the crystallographic orientation of the grains in the metal, procedures for the layer deposition, heat treatment or [[Annealing (metallurgy)|annealing]], characteristics of the [[Passivation (chemistry)|passivation]], and the interface to other materials also affect the durability of the interconnects. There are also important differences with time dependent current:  [[direct current]] or different [[alternating current]] waveforms cause different effects.

=== Forces on ions in an electrical field ===
Two [[force]]s affect ionized [[atom]]s in a conductor: 1) The direct [[Electrostatics|electrostatic]] force ''F<sub>e</sub>'', as a result of the electric field <math>E</math>, which has the same direction as the electric field, and 2) The force from the exchange of momentum with other [[charge carrier]]s ''F<sub>p</sub>'', toward the flow of charge carriers, is in the opposite direction of the electric field. In metallic conductors ''F<sub>p</sub>'' is caused by a so-called "electron wind" or "[[ion wind]]".

The resulting force ''F<sub>res</sub>'' on an activated ion in the electrical field can be written as

:<math>F_{res}=F_e-F_p=q\cdot (Z_e-Z_p) \cdot  E = q\cdot Z^*\cdot E=q\cdot Z^*\cdot j\cdot \rho
</math>
<!-- I am trying to join the two articles from here -->
<!-- and not succeeding very well. But fixed anyway -->

where <math>q</math> is the [[electric charge]] of the ions,<math>Z_e</math> and <math>Z_p</math> the valences corresponding to the electrostatic and wind force respectively, <math>Z^*</math> the so-called effective valence of the material, <math>j</math> the current density, and <math>\rho</math> the resistivity of the material
.<ref>{{cite journal
| last1      = Lodder
| first1     = A.
| last2      = Dekker
| first2     = J. P.
| date       = 1998
| title      = The electromigration force in metallic bulk 
| url        = https://aip.scitation.org/doi/abs/10.1063/1.54652
| journal    = AIP Conference Proceedings
| volume     = 418
| issue      = 1
| pages      = 315–328
| doi        =  10.1063/1.54652
| access-date = 2021-01-15
| arxiv= cond-mat/9803172
| bibcode = 1998AIPC..418..315L
| s2cid = 18376825
}}</ref>
Electromigration occurs when some of the [[momentum]] of a moving electron is transferred to a nearby activated ion. This causes the ion to move from its original position. Over time this force knocks a significant number of atoms far from their original positions. A break or gap can develop in the conducting material, preventing the flow of electricity. In narrow interconnect conductors, such as those linking transistors and other components in integrated circuits, this is known as a ''void'' or ''internal'' ''failure'' ([[Electric circuit|open circuit]]). Electromigration can also cause the atoms of a conductor to pile up and drift toward other nearby conductors, creating an unintended electrical connection known as a '''hillock failure''' or '''whisker failure''' ([[short circuit]]).  Both of these situations can lead to a malfunction of the circuit.


== Step Bunching due to Electromigration ==  
Step bunching on DC-heated sublimating vicinal crystal surfaces of Si(111) was observed by A. Latyshev et al. in 1989.<ref name="Latyshev1989">A. V. Latyshev, A. L. Aseev, A. B. Krasilnikov, and S. I. Stenin, "Transformations on clean Si(111) stepped surface during sublimation," Surface Science '''213''', 157 (1989).</ref> Soon after, Stoyan Stoyanov advanced a model in which as the reason for step bunching is identified the biased diffusion of the adatoms.<ref name="Stoyanov1991">S. Stoyanov, "Electromigration induced step bunching on Si surfaces—how does it depend on the temperature and heating current direction?", Japanese Journal of Applied Physics '''30''', 1 (1991).</ref> In 1998, Stoyanov and Tonchev extended Stoyanov’s model by incorporating step-step repulsions<ref name="Stoyanov1998">S. Stoyanov and V. Tonchev, "Properties and dynamic interaction of step density waves at a crystal surface during electromigration-affected sublimation," Physical Review B '''58''', 1590 (1998). DOI: [10.1103/PhysRevB.58.1590](https://doi.org/10.1103/PhysRevB.58.1590)</ref> and derived a scaling relation for the minimal step-step distance in a bunch under diffusion-limited sublimation, non-transparent steps, and step-down current conditions:

<math> l_{\min} \sim N^{-2/3} </math>

where <math> N </math> is the number of steps in the bunch, and the proportionality coefficient has the dimension of length. This scaling law has been confirmed by numerous experimental studies.<ref name="Fujita1999">K. Fujita, M. Ichikawa, and S. S. Stoyanov, "Size-scaling exponents of current-induced step bunching on silicon surfaces," *Physical Review B* '''60''', 16006 (1999). DOI: [10.1103/PhysRevB.60.16006](https://doi.org/10.1103/PhysRevB.60.16006)</ref><ref name="Homma2000">Y. Homma and N. Aizawa, "Electric-current-induced step bunching on Si(111)," Physical Review B '''62''', 8323 (2000). DOI: [10.1103/PhysRevB.62.8323](https://doi.org/10.1103/PhysRevB.62.8323)</ref><ref name="Gibbons2006">B. J. Gibbons, S. Schaepe, and J. P. Pelz, "Evidence for diffusion-limited kinetics during electromigration-induced step bunching on Si(111)," Surface Science '''600''', 2417 (2006). DOI: [10.1016/j.susc.2006.02.025](https://doi.org/10.1016/j.susc.2006.02.025)</ref><ref name="Usov2011">V. Usov, C. O. Coileain, and I. V. Shvets, "Experimental quantitative study into the effects of electromigration field moderation on step bunching instability development on Si(111)," Physical Review B '''83''' (2011). DOI: [10.1103/PhysRevB.83.245429](https://doi.org/10.1103/PhysRevB.83.245429)</ref> In 2018, Toktarbaiuly et al. reported electromigration-induced step bunching on vicinal W(110) surfaces. Their study revealed that step bunching occurred for both step-up and step-down current directions at the same temperature, T = 1500°C, with distinct size-scaling exponents depending on the current direction.<ref name="Toktarbaiuly2018">O. Toktarbaiuly et al., "Electromigration-induced step bunching on tungsten (110) surfaces," Physical Review B '''97''', 035436 (2018). DOI: [10.1103/PhysRevB.97.035436](https://journals.aps.org/prb/abstract/10.1103/PhysRevB.97.035436)</ref>  
More recently, Usov et al. (2020) demonstrated that electromigration-induced step bunching is not limited to silicon surfaces but can also occur on dielectric surfaces, such as sapphire (Al₂O₃(0001)).<ref name="Usov2020">V. Usov et al., "Revealing electromigration on dielectrics and metals through the step-bunching instability," Physical Review B '''102''', 035407 (2020). DOI: [10.1103/PhysRevB.102.035407](https://journals.aps.org/prb/abstract/10.1103/PhysRevB.102.035407)</ref>  
This study suggests that the fundamental mechanism of step bunching on W(110), Al₂O₃(0001), and Si(111) follows similar principles. Moreover, annealing W(110) offcut in the [001] direction with an up-step current produced a morphology where the bunch edges formed zigzag segments meeting at right angles.

== Failure mechanisms ==

=== Diffusion mechanisms ===
{{More citations needed section|date=August 2022}}
In a homogeneous crystalline structure, because of the uniform lattice structure of the metal ions, there is hardly any momentum transfer between the conduction electrons and the metal ions. However, this symmetry does not exist at the grain boundaries and material interfaces, and so here momentum is transferred much more vigorously. Since the metal ions in these regions are bonded more weakly than in a regular crystal lattice, once the electron wind has reached a certain strength, atoms become separated from the grain boundaries and are transported in the direction of the current. This direction is also influenced by the grain boundary itself, because atoms tend to move along grain boundaries.

Diffusion processes caused by electromigration can be divided into grain boundary diffusion, bulk diffusion and surface diffusion. In general, grain boundary diffusion is the major electromigration process in aluminum wires, whereas surface diffusion is dominant in copper interconnects.

=== Thermal effects ===
{{More citations needed section|date=August 2022}}
In an ideal conductor, where atoms are arranged in a perfect [[crystal structure|lattice]] structure, the electrons moving through it would experience no collisions and electromigration would not occur.  In real conductors, defects in the lattice structure and the random thermal vibration of the atoms about their positions causes electrons to collide with the atoms and [[scattering|scatter]], which is the source of electrical resistance (at least in metals; see [[electrical conduction]]).  Normally, the amount of momentum imparted by the relatively low-[[mass]] electrons is not enough to permanently displace the atoms.  However, in high-power situations (such as with the increasing current draw and decreasing wire sizes in modern [[VLSI]] [[microprocessor]]s), if many electrons bombard the atoms with enough force to become significant, this will accelerate the process of electromigration by causing the atoms of the conductor to vibrate further from their ideal lattice positions, increasing the amount of electron [[scattering]].  High [[Current (electricity)|current density]] increases the number of electrons scattering against the atoms of the conductor, and hence the rate at which those atoms are displaced.

In integrated circuits, electromigration does not occur in [[semiconductor]]s directly, but in the metal interconnects deposited onto them (see [[Fabrication (semiconductor)|semiconductor device fabrication]]).

Electromigration is exacerbated by high current densities and the [[Joule heating]] of the conductor (see [[electrical resistance]]), and can lead to eventual failure of electrical components. Localized increase of current density is known as [[current crowding]].

=== Balance of atom concentration ===
A governing equation which describes the atom concentration evolution throughout some interconnect segment, is the conventional mass balance (continuity) equation

:<math>\frac{\partial N}{\partial t} + \nabla\cdot\vec J = 0</math>

where <math>N(\vec x, t)</math> is the atom concentration at the point with a coordinates <math>\vec x=(x, y, z)</math> at the moment of time <math>t</math>, and <math>J</math> is the total atomic flux at this location. The total atomic flux <math>J</math> is a combination of the fluxes caused by the different atom migration forces. The major forces are induced by the [[electric current]], and by the gradients of temperature, [[stress (physics)|mechanical stress]] and concentration. <math>\vec J = \vec J_c + \vec J_T + \vec J_\sigma + \vec J_N</math>.

To define the fluxes mentioned above:

: <math>\vec J_c = \frac{NeZD\rho}{kT}\,\vec j</math>. 
Here <math>e</math> is the [[electron]] charge, <math>eZ</math> is the effective charge of the migrating atom, <math>\rho</math> the [[resistivity]] of the conductor where atom migration takes place, <math>\vec j</math> is the local current density, <math>k</math> is the [[Boltzmann constant]], <math>T</math> is the [[absolute temperature]]. <math>D(\vec x, t)</math> is the time and position dependent atom diffusivity.

: <math>\vec J_T = -\frac{NDQ}{kT^2}\nabla T</math>. &nbsp;We use <math>Q</math> the heat of thermal diffusion.

: <math>\vec J_\sigma = \frac{ND\Omega}{kT}\nabla\! H</math>, 
here <math>\Omega=1/N_0</math> is the atomic volume and <math>N_0</math> is initial atomic [[concentration]], <math>H=(\sigma_{11}+\sigma_{22}+\sigma_{33})/3</math> is the [[hydrostatic stress]] and <math>\sigma_{11},\sigma_{22},\sigma_{33}</math> are the components of principal stress.

: <math>\vec J_N = -D\,\nabla\! N</math>.

Assuming a vacancy mechanism for atom [[diffusion]] we can express <math>
D</math> as a function of the hydrostatic stress <math>D = D_0\exp\left(\tfrac{\Omega H - E_A}{kT}\right)</math> where <math>E_A</math> is the effective [[activation energy]] of the thermal diffusion of metal atoms. The vacancy concentration represents availability of empty lattice sites, which might be occupied by a migrating atom.

== Electromigration-aware design ==

=== Electromigration reliability of a wire (Black's equation) ===
{{main | Black's equation }}

At the end of the 1960s J. R. Black developed an empirical model to estimate the [[MTTF]] (mean time to failure) of a wire, taking electromigration into consideration. Since then, the formula has gained popularity in the semiconductor industry:<ref name="Black" /><ref>{{cite book |title=Handbook of multilevel metallization for integrated circuits: materials, technology, and applications |first1=Syd R. |last1=Wilson |first2=Clarence J. |last2=Tracy |first3=John L. |last3=Freeman |publisher=William Andrew |year=1993 |isbn=978-0-8155-1340-7 |page=607 |url=https://books.google.com/books?id=jHeN7KYkj28C}}, [https://books.google.com/books?id=jHeN7KYkj28C&pg=PA607 Page 607, equation 24]</ref>

:<math>\text{MTTF} = \frac{A}{J^n} \exp{\left(\frac{E_\text{a}}{k T}\right)}</math>.

Here <math>A</math> is a constant based on the cross-sectional area of the interconnect, <math>J</math> is the current density, <math>E_\text{a}</math> is the [[activation energy]] (e.g. 0.7 eV for grain boundary diffusion in aluminum), <math>k</math> is the [[Boltzmann constant]], <math>T</math> is the temperature in [[kelvin]]s, and <math>n</math> a scaling factor (usually set to 2 according to Black).<ref name="Black" /> The temperature of the conductor appears in the exponent, i.e. it strongly affects the MTTF of the interconnect. For an interconnect of a given construction to remain reliable as the temperature rises, the current density within the conductor must be reduced. However, as interconnect technology advances at the nanometer scale, the validity of Black's equation becomes increasingly questionable.

=== Wire material ===
Historically, aluminium has been used as conductor in integrated circuits, due to its good adherence to substrate, good conductivity, and ability to form [[ohmic contact]]s with silicon.<ref name="EM_book" /> However, pure aluminium is susceptible to electromigration. Research shows that adding 2-4% of copper to aluminium increases resistance to electromigration about 50 times. The effect is attributed to the grain boundary segregation of copper, which greatly inhibits the diffusion of aluminium atoms across grain boundaries.<ref name="contact_book">{{Cite book|author=M. Braunovic, N. K. Myshkin, V. V. Konchits|title=Electrical Contacts: Fundamentals, Applications and Technology|url=https://www.crcpress.com/Electrical-Contacts-Fundamentals-Applications-and-Technology/Braunovic-Myshkin-Konchits/p/book/9781574447279|publisher=CRC Press|date=2006|isbn=978-1-5744-47279}}</ref>

Pure copper wires can withstand approximately five times more current density than aluminum wires while maintaining similar reliability requirements.<ref name="Lienig" >J. Lienig: "Introduction to Electromigration-Aware Physical Design" [http://www.ifte.de/mitarbeiter/lienig/ispd06_emPaper_lienig.pdf (Download paper)], ''Proc. of the Int. Symposium on Physical Design (ISPD) 2006'', pp. 39–46, April 2006.</ref> This is mainly due to the higher electromigration activation energy levels of copper, caused by its superior electrical and thermal conductivity as well as its higher melting point. Further improvements can be achieved by alloying copper with about 1% [[palladium]] which inhibits diffusion of copper atoms along grain boundaries in the same way as the addition of copper to aluminium interconnect.

=== Bamboo structure and metal slotting ===
A wider wire results in smaller current density and, hence, less likelihood of electromigration. Also, the metal grain size has influence; the smaller grains, the more grain boundaries and the higher likelihood of electromigration effects. However, if you reduce wire width to below the average grain size of the wire material, grain boundaries become "crosswise", more or less perpendicular to the length of the wire. The resulting structure resembles the joints in a stalk of bamboo. With such a structure, the resistance to electromigration increases, despite an increase in current density. This apparent contradiction is caused by the perpendicular position of the grain boundaries; the boundary diffusion factor is excluded, and material transport is correspondingly reduced.<ref name="Lienig" /><ref name="Zamri">M. Zamri ''et al'' "In Situ TEM Observation of Fe-Included Carbon Nanofiber: Evolution of Structural and Electrical Properties in Field Emission Process", ACS Nano, 2012, 6 (11), pp 9567–9573. [Link http://pubs.acs.org/doi/abs/10.1021/nn302889e]</ref>

However, the maximum wire width possible for a bamboo structure is usually too narrow for signal lines of large-magnitude currents in analog circuits or for power supply lines. In these circumstances, slotted wires are often used, whereby rectangular holes are carved in the wires. Here, the widths of the individual metal structures in between the slots lie within the area of a bamboo structure, while the resulting total width of all the metal structures meets power requirements.<ref name="Lienig" /><ref name="Zamri"/>

=== Blech length ===
There is a lower limit for the length of the interconnect that will allow higher current carrying capability. It is known as "Blech length".<ref name="Blech" /> Any wire that has a length below this limit will have a stretched limit for electromigration. Here, a mechanical stress buildup causes an atom back flow process which reduces or even compensates the effective material flow towards the anode. The Blech length must be considered when designing test structures to evaluate electromigration. This minimum length is typically some tens of microns for chip traces, and interconnections shorter than this are sometimes referred to as 'electromigration immortal'.

=== Via arrangements and corner bends ===
Particular attention must be paid to [[Via (electronics)|vias]] and contact holes. The current carrying capacity of a via is much less than a metallic wire of same length. Hence multiple vias are often used, whereby the geometry of the via array is very significant: multiple vias must be organized such that the resulting current is distributed as evenly as possible through all the vias.

Attention must also be paid to bends in interconnects. In particular, 90-degree corner bends must be avoided, since the current density in such bends is significantly higher than that in oblique angles (e.g., 135 degrees).<ref name="Lienig" />

=== Electromigration in solder joints ===
The typical current density at which electromigration occurs in Cu or Al interconnects is 10<sup>6</sup> to 10<sup>7</sup> A/cm<sup>2</sup>. For solder joints (SnPb or SnAgCu lead-free) used in IC chips, however, electromigration occurs at much lower current densities, e.g. 10<sup>4</sup> A/cm<sup>2</sup>.
It causes a net atom transport along the direction of electron flow. The atoms accumulate at the anode, while voids are generated at the cathode and back stress is induced during electromigration. The typical failure of a solder joint due to electromigration will occur at the cathode side. Due to the current crowding effect, voids form first at the corners of the solder joint. Then the voids extend and join to cause a failure. Electromigration also influences formation of [[intermetallic compound]]s, as the migration rates are a function of atomic mass.

=== Electromigration and technology computer aided design ===
The complete mathematical model describing electromigration consists of several partial differential equations (PDEs) <ref name="Basaran_Lin03" >C. Basaran, M. Lin, and H. Ye : ''A Thermodynamic Model for Electrical Current Induced Damage.'' International Journal of Solids and Structures, Vol 40, pp. 7315-7327, 2003.</ref> which need to be solved for three-dimensional geometrical domains representing segments of an interconnect structure. Such a mathematical model forms the basis for simulation of electromigration in modern technology computer aided design (TCAD) tools.<ref name="Ceric_Selberherr11" >{{cite journal|last1=Ceric|first1=H.|last2=Selberherr|first2=S.|title=Electromigration in submicron interconnect features of integrated circuits|journal=Materials Science and Engineering: R: Reports|volume=71|issue=5–6|year=2011|pages=53–86|issn=0927-796X|doi=10.1016/j.mser.2010.09.001}}</ref>
Use of TCAD tools for detailed investigations of electromigration induced interconnect degradation is gaining importance. Results of TCAD studies in combination with reliability tests lead to modification of design rules improving the interconnect resistance to electromigration.<ref name="Orio_Ceric12" >{{cite journal|last1=de Orio|first1=R.L.|last2=Ceric|first2=H.|last3=Selberherr|first3=S.|title=Electromigration failure in a copper dual-damascene structure with a through silicon via|journal=Microelectronics Reliability|volume=52|issue=9–10|year=2012|pages=1981–1986|issn=0026-2714|doi=10.1016/j.microrel.2012.07.021|pmid=23564974|pmc=3608028|bibcode=2012MiRe...52.1981D }}</ref>

=== Electromigration due to IR drop noise of the on-chip power grid network/interconnect ===
{{Confusing section|date=February 2022}}
The electromigration degradation of the on-chip power grid network/interconnect depends on the IR drop noise of the power grid interconnect.
The electromigration-aware lifetime of the power grid interconnects as well as the chip decreases if the chip suffers from a high value of the IR drop noise.<ref>{{Cite book |doi = 10.1109/ISVLSI.2018.00018|chapter = PGIREM: Reliability-Constrained IR Drop Minimization and Electromigration Assessment of VLSI Power Grid Networks Using Cooperative Coevolution|title = 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)|pages = 40–45|year = 2018|last1 = Dey|first1 = Sukanta|last2 = Dash|first2 = Satyabrata|last3 = Nandi|first3 = Sukumar|last4 = Trivedi|first4 = Gaurav|isbn = 978-1-5386-7099-6|s2cid = 51984331}}</ref>

=== Machine Learning Model for Electromigration-aware MTTF Prediction===
{{Confusing section|date=February 2022}}
Recent work demonstrates MTTF prediction using a machine learning model. The work uses a neural network-based supervised learning approach with current density, interconnect length, interconnect temperature as input features to the model.<ref>{{Cite journal |doi = 10.1145/3399677 |pages = 1–29|year = 2020|last1 = Dey|first1 = Sukanta|last2 = Nandi|first2 = Sukumar|last3 = Trivedi|first3 = Gaurav | title=Machine Learning Approach for Fast Electromigration Aware Aging Prediction in Incremental Design of Large Scale On-chip Power Grid Network | journal=ACM Transactions on Design Automation of Electronic Systems |volume = 25|issue = 5|s2cid = 222110488}}</ref><ref>{{Cite journal|url=https://dl.acm.org/doi/10.1145/3399677?cid=99659544720|doi=10.1145/3399677 |year=2020|last1=Dey|first1=Sukanta|last2=Nandi|first2=Sukumar|last3=Trivedi|first3=Gaurav |title=Machine Learning Approach for Fast Electromigration Aware Aging Prediction in Incremental Design of Large Scale On-chip Power Grid Network |journal=ACM Transactions on Design Automation of Electronic Systems |volume=25|issue=5|pages=1–29|s2cid=222110488|url-access=subscription}}</ref>

==Electromigrated nanogaps ==
'''Electromigrated nanogaps''' are gaps formed in metallic bridges formed by the process of electromigration. A nanosized contact formed by electromigration acts like a waveguide for electrons. The nanocontact essentially acts like a one-dimensional wire with a conductance of <math>G = 2\,e^2\!/h</math>. The current in a wire is the velocity of the electrons multiplied by the charge and number per unit length, <math>\,I = veN/L\ </math>  or <math>\ G=veN/LV</math>. This gives a conductance of <math>G=ve^2\!N/LE</math>. In nanoscale bridges the conductance falls in discrete steps of multiples of the quantum conductance <math>G = 2\,e^2\!/h</math>.

Electromigrated nanogaps have been proposed for use as electrodes in molecular scale electronics and as quantum tunneling sensors.<ref>{{Cite journal |last1=Raja |first1=Shyamprasad N. |last2=Jain |first2=Saumey |last3=Kipen |first3=Javier |last4=Jaldén |first4=Joakim |last5=Stemme |first5=Göran |last6=Herland |first6=Anna |last7=Niklaus |first7=Frank |date=2024-07-17 |title=Electromigrated Gold Nanogap Tunnel Junction Arrays: Fabrication and Electrical Behavior in Liquid and Gaseous Media |journal=ACS Applied Materials & Interfaces |language=en |volume=16 |issue=28 |pages=37131–37146 |doi=10.1021/acsami.4c03282 |issn=1944-8244 |pmc=11261569 |pmid=38954436}}</ref><ref name=Shores1>{{cite journal | author = Liang | title =Kondo resonance in a single-molecule transistor | journal = Nature | volume = 417  | year = 2002   |doi=10.1038/nature00790 | issue=6890 | pmid=12066180 | pages=725–9|display-authors=etal| bibcode =2002Natur.417..725L | s2cid =4405025 }}</ref> Researchers have used [[feedback controlled electromigration]] to investigate the [[magnetoresistance]] of a [[quantum spin valve]].{{citation needed|date=December 2018}}

== Reference standards ==
* [[Electronic Industries Alliance|EIA]]/[[JEDEC]] Standard ''EIA/JESD61'': Isothermal Electromigration Test Procedure.
* [[Electronic Industries Alliance|EIA]]/[[JEDEC]] Standard ''EIA/JESD63'': Standard method for calculating the electromigration model parameters for current density and temperature.
* [https://www.ifte.de/books/em/em_chap2.pdf Fundamentals of electromigration, Chapter 2]

==See also==
*[[Kirkendall effect]]
* [[Sealing current]]

==References==
{{reflist}}
 


== Further reading ==
{{refbegin}}
* {{cite journal |author-last=Black |author-first=J. R. |s2cid=109036679 |title=Electromigration - A Brief Survey and Some Recent Results |journal= IEEE Transactions on Electron Devices|volume=16 |issue=4 |pages=338–347 |date=April 1969 |doi=10.1109/T-ED.1969.16754|bibcode = 1969ITED...16..338B }}
* {{cite journal |author-last=Black |author-first=J. R. |s2cid=49732804 |title=Electromigration Failure Modes in Aluminium Metallization for Semiconductor Devices |journal= Proceedings of the IEEE|volume=57 |issue=9 |pages=1587–94 |date=September 1969 |doi=10.1109/PROC.1969.7340}}
* {{cite book |author-last=Ho |author-first=P. S. |chapter=Basic problems for Electromigration in VLSI applications |pages=288–291 |date=1982 |doi=10.1109/IRPS.1982.361947|title=20th International Reliability Physics Symposium |s2cid=26418320 }}
* {{cite journal |author-last1=Ho |author-first1=P. S. |author-last2=Kwok |author-first2=T. |title=Electromigration in metals |journal= Reports on Progress in Physics|volume=52 |issue= 3|pages=301–348 |date=1989 |doi=10.1088/0034-4885/52/3/002 |bibcode = 1989RPPh...52..301H|s2cid=250876558 }}
* {{cite journal |author-last1=Gardner |author-first1=D. S. |author-last2=Meindl |author-first2=J. D. |author-last3=Saraswat |author-first3=K. C. |title=Interconnection and Electromigration Scaling Theory |journal=  IEEE Transactions on Electron Devices|volume=34 |issue=3 |pages=633–643 |date=March 1987 |doi=10.1109/T-ED.1987.22974 |bibcode=1987ITED...34..633G|s2cid=317983 }}
* Ghate, P. B.: [https://ieeexplore.ieee.org/search/wrapper.jsp?arnumber=4208466 Electromigration-Induced Failures in VLSI Interconnects]{{dead link|date=January 2025|bot=medic}}{{cbignore|bot=medic}}, ''IEEE Conf. Publication'', Vol. 20:p 292 299, March 1982.
* {{cite journal |author-first1=G. |author-last1=Jerke |author-first2=J. |author-last2=Lienig |title=Hierarchical Current Density Verification in Arbitrarily Shaped Metallization Patterns of Analog Circuits |journal= IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems|volume=23 |issue=1 |pages=80–90 |date=January 2004 |doi=10.1109/TCAD.2003.819899|s2cid=2586433 }}
* {{cite journal |author-first1=B. D. |author-last1=Knowlton |author-first2=C. V. |author-last2=Thompson |title=Simulation of temperature and current density scaling of the electromigration-limited reliability of near-bamboo interconnects |journal= Journal of Materials Research|volume=13  |issue=5 |pages= 1164–1170|date=1998|bibcode=1998JMatR..13.1164K |doi=10.1557/JMR.1998.0166 |doi-broken-date=2024-11-24 }}
* Lienig, J.: {{doi-inline|10.1145/1123008.1123017|"Introduction to Electromigration-Aware Physical Design"}}, [https://www.ifte.de/mitarbeiter/lienig/ispd06_emPaper_lienig.pdf (Download paper)] ''Proc. of the Int. Symposium on Physical Design (ISPD) 2006'', pp.&nbsp;39–46, April 2006.
* Lienig, J., Thiele, M.: {{doi-inline|10.1145/3177540.3177560|"The Pressing Need for Electromigration-Aware Physical Design"}}, [https://www.ifte.de/mitarbeiter/lienig/ispd_2018_pp144_151.pdf (Download paper)], ''Proc. of the Int. Symposium on Physical Design (ISPD) 2018'', pp.&nbsp;144–151, March 2018.
* Louie Liu, H.C., Murarka, S.: "Modeling of Temperature Increase Due to Joule Heating During Elektromigration Measurements. Center for Integrated Electronics and Electronics Manufacturing", ''Materials Research Society Symposium Proceedings'' Vol. 427:p.&nbsp;113 119.
* {{cite journal |author-first1=Tarik Omer |author-last1=Ogurtani |author-first2=Ersin Emre |author-last2=Oren |title=Irreversible thermodynamics of triple junctions during the intergranular void motion under the electromigration forces |journal= International Journal of Solids and Structures|volume=42 |issue=13 |pages=3918–52 |date=June 2005 |doi=10.1016/j.ijsolstr.2004.11.013}}
* {{cite journal |author-first1=Fei |author-last1=Ren |author-first2=Woong |author-last2=Nah |author-first3=K. N. |author-last3=Tu |author-first4=Bingshou |author-last4=Xiong |author-first5=Luhua |author-last5=Xu |author-first6=John H. L. |author-last6=Pang |title=Electromigration induced ductile-to-brittle transition in lead-free solder joints |journal=Applied Physics Letters  |volume=89 |issue= 14|page=141914  |date=2006 |doi=10.1063/1.2358113 |bibcode=2006ApPhL..89n1914R}}
* {{cite journal |author-first1=Arijit |author-last1=Roy |author-first2=Cher Ming |author-last2=Tan |title=Very High Current Density Package Level Electromigration Test for Copper Interconnects |journal= Journal of Applied Physics|volume=103 |issue= 9|pages=093707–093707–7 |date=2008 |doi=10.1063/1.2917065 |bibcode=2008JAP...103i3707R}}
* {{cite journal |author-first1=Cher Ming |author-last1=Tan |author-first2=Arijit |author-last2=Roy |title=Electromigration in ULSI interconnects |journal=Materials Science and Engineering: R: Reports |volume=58 |issue= 1–2|pages=1–75 |date=2007 |doi=10.1016/j.mser.2007.04.002}}
* {{cite journal |author-first=K. N. |author-last=Tu |title=Recent advances on electromigration in very-large-scale-integration of interconnects |journal=Journal of Applied Physics |volume=94 |issue=9 |pages=5451–5473 |date=2003 |doi=10.1063/1.1611263 |bibcode=2003JAP....94.5451T}}
* {{cite journal |author-first1=Luhua |author-last1=Xu |author-first2=John H. L. |author-last2=Pang |author-first3=K. N. |author-last3=Tu |title=Effect of electromigration-induced back stress gradient on nano-indentation marker movement in SnAgCu solder joints |journal=Applied Physics Letters |volume=89 |issue= 22|page=221909 |date=2006 |doi=10.1063/1.2397549 |bibcode=2006ApPhL..89v1909X}}
{{refend}}

=== Books ===
* {{Cite book|author=Christou, A|title=Electromigration and Electronic Device Degradation|url=https://www.wiley.com/en-us/Electromigration+and+Electronic+Device+Degradation-p-9780471584896|publisher=Wiley|date=1993|isbn=978-0-471-58489-6}}
* {{Cite book|author=Lienig, J., Thiele, M.|title=Fundamentals of Electromigration-Aware Integrated Circuit Design|url=https://www.ifte.de/books/em/index.html|publisher=Springer|date=2018|doi=10.1007/978-3-319-73558-0|isbn=978-3-319-73557-3}}

== External links ==
{{Commons category}}
* [http://www.csl.mete.metu.edu.tr/Electromigration/emig.htm] ''What is Electromigration?'', Computer Simulation Laboratory, Middle East Technical University.
* [http://www.eetimes.com/design/eda-design/4017969/Electromigration-for-Designers-An-Introduction-for-the-Non-Specialist] ''Electromigration for Designers: An Introduction for the Non-Specialist'', J.R. Lloyd, EETimes.
* [http://www.dwpg.com/content.php?contid=2&artid=68 Semiconductor electromigration in-depth at DWPG.Com]
* [http://em.unipro.ru/?q=em/statement Modeling of electromigration process with void formation at UniPro R&D site]
* [http://www.doitpoms.ac.uk/tlplib/electromigration/index.php DoITPoMS Teaching and Learning Package- "Electromigration"]

{{Authority control}}

[[Category:Electric and magnetic fields in matter]]
[[Category:Electronic design automation]]
[[Category:Semiconductor device defects]]
[[Category:Transport phenomena]]
[[Category:Electrochemistry]]