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{{short description|Mathematical model of computation}} {{redirect|State machine|infinite-state machines|Transition system|fault-tolerance methodology|State machine replication}} {{redirect|SFSM|the Italian railway company|Circumvesuviana}} {{redirect|Finite automata|the electro-industrial group|Finite Automata (band)}} {{use dmy dates|date=January 2020|cs1-dates=y}} {{Automata theory}} A '''finite-state machine''' ('''FSM''') or '''finite-state automaton''' ('''FSA''', plural: ''automata''), '''finite automaton''', or simply a '''state machine''', is a mathematical [[model of computation]]. It is an [[abstract machine]] that can be in exactly one of a finite number of ''[[State (computer science)|states]]'' at any given time. The FSM can change from one state to another in response to some [[Input (computer science)|inputs]]; the change from one state to another is called a ''transition''.<ref>{{Cite book|title=Formal Methods in Computer Science|last=Wang|first=Jiacun|publisher=CRC Press|year=2019|isbn=978-1-4987-7532-8|pages=34}}</ref> An FSM is defined by a list of its states, its initial state, and the inputs that trigger each transition. Finite-state machines are of two typesβ[[Deterministic finite automaton|deterministic finite-state machines]] and [[Nondeterministic finite automaton|non-deterministic finite-state machines]].<ref>{{cite web|url=https://brilliant.org/wiki/finite-state-machines/|title=Finite State Machines β Brilliant Math & Science Wiki|website=brilliant.org|access-date=14 April 2018}}</ref> For any non-deterministic finite-state machine, an equivalent deterministic one can be constructed. The behavior of state machines can be observed in many devices in modern society that perform a predetermined sequence of actions depending on a sequence of events with which they are presented. Simple examples are: [[vending machine]]s, which dispense products when the proper combination of coins is deposited; [[elevator]]s, whose sequence of stops is determined by the floors requested by riders; [[traffic light]]s, which change sequence when cars are waiting; [[combination lock]]s, which require the input of a sequence of numbers in the proper order. The finite-state machine has less computational power than some other models of computation such as the [[Turing machine]].<ref name="Belzer">{{cite book | last1 = Belzer | first1 = Jack | first2=Albert George |last2=Holzman |first3=Allen |last3=Kent | title = Encyclopedia of Computer Science and Technology |volume=25 | publisher = CRC Press | year = 1975 | location = USA | pages = 73 | url = https://books.google.com/books?id=W2YLBIdeLIEC | isbn = 978-0-8247-2275-3}}</ref> The computational power distinction means there are computational tasks that a Turing machine can do but an FSM cannot. This is because an FSM's [[Computer memory|memory]] is limited by the number of states it has. A finite-state machine has the same computational power as a Turing machine that is restricted such that its head may only perform "read" operations, and always has to move from left to right. FSMs are studied in the more general field of [[automata theory]]. == Example: coin-operated turnstile == [[File:Turnstile state machine colored.svg|thumb|upright=1.5|State diagram for a turnstile]] [[File:Tornelli.jpg|thumb|200x200px|A turnstile]] An example of a simple mechanism that can be modeled by a state machine is a [[turnstile]].<ref name="Koshy">{{cite book | last = Koshy | first = Thomas | title = Discrete Mathematics With Applications | publisher = Academic Press | year = 2004 | pages = 762 | url = https://books.google.com/books?id=90KApidK5NwC&pg=PA762 | isbn = 978-0-12-421180-3}}</ref><ref name="βββ?">{{cite web |last = Wright |first = David R. |title = Finite State Machines |work = CSC215 Class Notes |publisher = David R. Wright website, N. Carolina State Univ. |year = 2005 |url = http://www4.ncsu.edu/~drwrigh3/docs/courses/csc216/fsm-notes.pdf |archive-url = https://web.archive.org/web/20140327131120/http://www4.ncsu.edu/~drwrigh3/docs/courses/csc216/fsm-notes.pdf |url-status = dead |archive-date = 27 March 2014 |access-date = 14 July 2012 }}</ref> A turnstile, used to control access to subways and amusement park rides, is a gate with three rotating arms at waist height, one across the entryway. Initially the arms are locked, blocking the entry, preventing patrons from passing through. Depositing a coin or [[Token coin|token]] in a slot on the turnstile unlocks the arms, allowing a single customer to push through. After the customer passes through, the arms are locked again until another coin is inserted. Considered as a state machine, the turnstile has two possible states: ''Locked'' and ''Unlocked''.<ref name="Koshy" /> There are two possible inputs that affect its state: putting a coin in the slot (''coin'') and pushing the arm (''push''). In the locked state, pushing on the arm has no effect; no matter how many times the input ''push'' is given, it stays in the locked state. Putting a coin in β that is, giving the machine a ''coin'' input β shifts the state from ''Locked'' to ''Unlocked''. In the unlocked state, putting additional coins in has no effect; that is, giving additional ''coin'' inputs does not change the state. A customer pushing through the arms gives a ''push'' input and resets the state to ''Locked''. The turnstile state machine can be represented by a [[state-transition table]], showing for each possible state, the transitions between them (based upon the inputs given to the machine) and the outputs resulting from each input: ::{| class="wikitable" ! Current State ! Input ! Next State ! Output |- ! rowspan="2"|Locked | coin || Unlocked || Unlocks the turnstile so that the customer can push through. |- | push || Locked || None |- ! rowspan="2"|Unlocked | coin || Unlocked || None |- | push || Locked || When the customer has pushed through, locks the turnstile. |} The turnstile state machine can also be represented by a [[directed graph]] called a [[state diagram]] ''(above)''. Each state is represented by a [[node (graph theory)|node]] (''circle''). Edges (''arrows'') show the transitions from one state to another. Each arrow is labeled with the input that triggers that transition. An input that doesn't cause a change of state (such as a ''coin'' input in the ''Unlocked'' state) is represented by a circular arrow returning to the original state. The arrow into the ''Locked'' node from the black dot indicates it is the initial state. == Concepts and terminology == A ''state'' is a description of the status of a system that is waiting to execute a ''transition''. A transition is a set of actions to be executed when a condition is fulfilled or when an event is received. For example, when using an audio system to listen to the radio (the system is in the "radio" state), receiving a "next" stimulus results in moving to the next station. When the system is in the "CD" state, the "next" stimulus results in moving to the next track. Identical stimuli trigger different actions depending on the current state. In some finite-state machine representations, it is also possible to associate actions with a state: * an entry action: performed ''when entering'' the state, and * an exit action: performed ''when exiting'' the state. == Representations == [[File:UML state machine Fig5.png|thumb|Fig. 1 UML state chart example (a toaster oven)]] [[File:SdlStateMachine.png|thumb|Fig. 2 SDL state machine example]] [[File:Finite state machine example with comments.svg|thumb|Fig. 3 Example of a simple finite-state machine]] {{hatnote|For an introduction, see [[State diagram]].}} === State/Event table === Several [[state-transition table]] types are used. The most common representation is shown below: the combination of current state (e.g. B) and input (e.g. Y) shows the next state (e.g. C). By itself, the table cannot completely describe the action, so it is common to use footnotes. Other related representations may not have this limitation. For example, an FSM definition including the full action's information is possible using [[Virtual finite state machine#State Table|state tables]] (see also [[virtual finite-state machine]]). {| class="wikitable" style="text-align:center; margin-left:auto; margin-right:auto;" |+ State-transition table |- ! {{diagonal split header|Input| Current<br />state}} || State A || State B || State C |- ! Input X | ... || ... || ... |- ! Input Y | ... || State C || ... |- ! Input Z | ... || ... || ... |} === UML state machines === The [[Unified Modeling Language]] has a notation for describing state machines. [[UML state machine]]s overcome the limitations{{citation needed|date=March 2021}} of traditional finite-state machines while retaining their main benefits. UML state machines introduce the new concepts of [[UML state machine#Hierarchically nested states|hierarchically nested states]] and [[UML state machine#Orthogonal regions|orthogonal regions]], while extending the notion of [[UML state machine#Actions and transitions|actions]]. UML state machines have the characteristics of both [[Mealy machine]]s and [[Moore machine]]s. They support [[UML state machine#Actions and transitions|actions]] that depend on both the state of the system and the triggering [[UML state machine#Events|event]], as in Mealy machines, as well as [[UML state machine#Entry and exit actions|entry and exit actions]], which are associated with states rather than transitions, as in Moore machines.{{citation needed|date=January 2017}} === SDL state machines === The [[Specification and Description Language]] is a standard from [[ITU]] that includes graphical symbols to describe actions in the transition: * send an event * receive an event * start a timer * cancel a timer * start another concurrent state machine * decision SDL embeds basic data types called "Abstract Data Types", an action language, and an execution semantic in order to make the finite-state machine executable.{{citation needed|date=January 2017}} === Other state diagrams === There are a large number of variants to represent an FSM such as the one in figure 3. == Usage == In addition to their use in modeling reactive systems presented here, finite-state machines are significant in many different areas, including [[electrical engineering]], [[linguistics]], [[computer science]], [[philosophy]], [[biology]], [[mathematic]]s, [[video game programming]], and [[logic]]. Finite-state machines are a class of automata studied in [[automata theory]] and the [[theory of computation]]. In computer science, finite-state machines are widely used in modeling of application behavior ([[control theory]]), design of [[Digital electronics|hardware digital systems]], [[software engineering]], [[compiler]]s, [[network protocol]]s, and [[computational linguistics]]. == Classification == Finite-state machines can be subdivided into acceptors, classifiers, transducers and sequencers.<ref name="Keller2001">{{cite book |last=Keller |first= Robert M. |title=Computer Science: Abstraction to Implementation |url=http://www.cs.hmc.edu/~keller/cs60book/%20%20%20All.pdf |year=2001 |publisher=Harvey Mudd College |page= 480| chapter=Classifiers, Acceptors, Transducers, and Sequencers| chapter-url =http://www.cs.hmc.edu/~keller/cs60book/12%20Finite-State%20Machines.pdf}}</ref> === Acceptors === [[File:Fsm parsing word nice.svg|thumb|Fig. 4: Acceptor FSM: parsing the string "nice".]] [[File:DFAexample.svg|thumb|Fig. 5: Representation of an acceptor; this example shows one that determines whether a binary number has an even number of 0s, where ''S''<sub>1</sub> is an ''accepting state'' and ''S''<sub>2</sub> is a ''non accepting state''.]] '''Acceptors''' (also called ''detectors'' or '''recognizers''') produce binary output, indicating whether or not the received input is accepted. Each state of an acceptor is either ''accepting'' or ''non accepting''. Once all input has been received, if the current state is an accepting state, the input is accepted; otherwise it is rejected. As a rule, input is a [[string (computer science)|sequence of symbols]] (characters); actions are not used. The start state can also be an accepting state, in which case the acceptor accepts the empty string. The example in figure 4 shows an acceptor that accepts the string "nice". In this acceptor, the only accepting state is state 7. A (possibly infinite) set of symbol sequences, called a [[formal language]], is a [[regular language]] if there is some acceptor that accepts ''exactly'' that set.{{sfn|Hopcroft|Ullman|1979|pp=18}} For example, the set of binary strings with an even number of zeroes is a regular language (cf. Fig. 5), while the set of all strings whose length is a prime number is not.{{sfn|Hopcroft|Motwani|Ullman|2006|pp=130-1}} An acceptor could also be described as defining a language that would contain every string accepted by the acceptor but none of the rejected ones; that language is ''accepted'' by the acceptor. By definition, the languages accepted by acceptors are the [[regular language]]s. The problem of determining the language accepted by a given acceptor is an instance of the [[algebraic path problem]]βitself a generalization of the [[shortest path problem]] to graphs with edges weighted by the elements of an (arbitrary) [[semiring]].<ref name="PoulyKohlas2012">{{cite book|first1=Marc |last1=Pouly |first2=JΓΌrg |last2=Kohlas |title=Generic Inference: A Unifying Theory for Automated Reasoning|year=2011|publisher=John Wiley & Sons|isbn=978-1-118-01086-0|at=Chapter 6. Valuation Algebras for Path Problems, p. 223 in particular}}</ref><ref>{{cite web |url=http://www.iam.unibe.ch/~run/talks/2008-06-05-Bern-Jonczy.pdf |title=Algebraic path problems |author=Jacek Jonczy |date=Jun 2008 |access-date=20 August 2014 |url-status=dead |archive-url=https://web.archive.org/web/20140821054702/http://www.iam.unibe.ch/~run/talks/2008-06-05-Bern-Jonczy.pdf |archive-date=21 August 2014 }}, p. 34</ref>{{Technical inline|date=January 2017}} An example of an accepting state appears in Fig. 5: a [[deterministic finite automaton]] (DFA) that detects whether the [[Binary numeral system|binary]] input string contains an even number of 0s. ''S''<sub>1</sub> (which is also the start state) indicates the state at which an even number of 0s has been input. S<sub>1</sub> is therefore an accepting state. This acceptor will finish in an accept state, if the binary string contains an even number of 0s (including any binary string containing no 0s). Examples of strings accepted by this acceptor are [[Ξ΅]] (the [[empty string]]), 1, 11, 11..., 00, 010, 1010, 10110, etc. === Classifiers === '''Classifiers''' are a generalization of acceptors that produce ''n''-ary output where ''n'' is strictly greater than two.<ref>{{Cite book|last=Felkin|first=M.|title=Quality Measures in Data Mining - Studies in Computational Intelligence|publisher=Springer, Berlin, Heidelberg|year=2007|isbn=978-3-540-44911-9|editor-last=Guillet|editor-first=Fabrice|volume=43|pages=277β278|doi=10.1007/978-3-540-44918-8_12|editor-last2=Hamilton|editor-first2=Howard J.}}</ref> === Transducers === {{Main|Finite-state transducer}} [[File:Fsm Moore model door control.svg|thumb|Fig. 6 Transducer FSM: Moore model example]] [[File:Fsm mealy model door control.svg|thumb|Fig. 7 Transducer FSM: Mealy model example]] ''Transducers'' produce output based on a given input and/or a state using actions. They are used for control applications and in the field of [[computational linguistics]]. In control applications, two types are distinguished: ;[[Moore machine]]: The FSM uses only entry actions, i.e., output depends only on state. The advantage of the Moore model is a simplification of the behaviour. Consider an elevator door. The state machine recognizes two commands: "command_open" and "command_close", which trigger state changes. The entry action (E:) in state "Opening" starts a motor opening the door, the entry action in state "Closing" starts a motor in the other direction closing the door. States "Opened" and "Closed" stop the motor when fully opened or closed. They signal to the outside world (e.g., to other state machines) the situation: "door is open" or "door is closed". ;[[Mealy machine]]: The FSM also uses input actions, i.e., output depends on input and state. The use of a Mealy FSM leads often to a reduction of the number of states. The example in figure 7 shows a Mealy FSM implementing the same behaviour as in the Moore example (the behaviour depends on the implemented FSM execution model and will work, e.g., for [[Virtual finite-state machine|virtual FSM]] but not for [[event-driven finite-state machine|event-driven FSM]]). There are two input actions (I:): "start motor to close the door if command_close arrives" and "start motor in the other direction to open the door if command_open arrives". The "opening" and "closing" intermediate states are not shown. === Sequencers === ''Sequencers'' (also called ''generators'') are a subclass of acceptors and transducers that have a single-letter input alphabet. They produce only one sequence, which can be seen as an output sequence of acceptor or transducer outputs.<ref name="Keller2001" /> === Determinism === A further distinction is between ''deterministic'' ([[Deterministic finite automaton|DFA]]) and ''non-deterministic'' ([[Nondeterministic finite automaton|NFA]], [[Generalized nondeterministic finite automaton|GNFA]]) automata. In a deterministic automaton, every state has exactly one transition for each possible input. In a non-deterministic automaton, an input can lead to one, more than one, or no transition for a given state. The [[powerset construction]] algorithm can transform any nondeterministic automaton into a (usually more complex) deterministic automaton with identical functionality. A finite-state machine with only one state is called a "combinatorial FSM". It only allows actions upon transition ''into'' a state. This concept is useful in cases where a number of finite-state machines are required to work together, and when it is convenient to consider a purely combinatorial part as a form of FSM to suit the design tools.<ref>Brutscheck, M., Berger, S., Franke, M., Schwarzbacher, A., Becker, S.: Structural Division Procedure for Efficient IC Analysis. IET Irish Signals and Systems Conference, (ISSC 2008), pp.18β23. Galway, Ireland, 18β19 June 2008. [http://arrow.dit.ie/engschececon/2/]</ref> == Alternative semantics == There are other sets of semantics available to represent state machines. For example, there are tools for modeling and designing logic for embedded controllers.<ref>{{cite web|url=http://www.csl.sri.com/users/tiwari/papers/stateflow.pdf|title=Tiwari, A. (2002). Formal Semantics and Analysis Methods for Simulink Stateflow Models.|website=sri.com|access-date=14 April 2018}}</ref> They combine [[UML state machine#Hierarchically nested states|hierarchical state machines]] (which usually have more than one current state), flow graphs, and [[truth table]]s into one language, resulting in a different formalism and set of semantics.<ref>{{cite conference | citeseerx = 10.1.1.89.8817 | last = Hamon | first = G. | year = 2005 | title = A Denotational Semantics for Stateflow | conference = International Conference on Embedded Software | pages = 164β172 | location = Jersey City, NJ | publisher = ACM }}</ref> <!---Fig.8 has been deleted; it didnt't match this description, anyway---Figure 8 illustrates this mix of state machines and flow graphs with a set of states to represent the state of a stopwatch and a flow graph to control the ticks of the watch.---> These charts, like [[David Harel|Harel's]] original state machines,<ref>{{Cite web |url=http://www.fceia.unr.edu.ar/asist/harel01.pdf |title=Harel, D. (1987). A Visual Formalism for Complex Systems. Science of Computer Programming, 231β274. |access-date=7 June 2011 |archive-url=https://web.archive.org/web/20110715110405/http://www.fceia.unr.edu.ar/asist/harel01.pdf |archive-date=15 July 2011 |url-status=dead }}</ref> support hierarchically nested states, [[UML state machine#Orthogonal regions|orthogonal regions]], state actions, and transition actions.<ref>{{cite web |url = http://drona.csa.iisc.ernet.in/~kanade/publications/symbolic_analysis_for_improving_simulation_coverage_of_simulink_stateflow_models.pdf |title = Alur, R., Kanade, A., Ramesh, S., & Shashidhar, K. C. (2008). Symbolic analysis for improving simulation coverage of Simulink/Stateflow models. International Conference on Embedded Software (pp. 89β98). Atlanta, GA: ACM. |archive-url=https://web.archive.org/web/20110715110405/http://drona.csa.iisc.ernet.in/~kanade/publications/symbolic_analysis_for_improving_simulation_coverage_of_simulink_stateflow_models.pdf |archive-date=15 July 2011 |url-status=dead}}</ref> == Mathematical model == In accordance with the general classification, the following formal definitions are found. A ''deterministic finite-state machine'' or ''deterministic finite-state acceptor'' is a [[Tuple|quintuple]] <math>(\Sigma, S, s_0, \delta, F)</math>, where: * <math>\Sigma</math> is the input [[Alphabet (computer science)|alphabet]] (a finite non-empty set of symbols); * <math>S</math> is a finite non-empty set of states; * <math>s_0</math> is an initial state, an element of <math>S</math>; * <math>\delta</math> is the state-transition function: <math>\delta: S \times \Sigma \rightarrow S</math> (in a [[nondeterministic finite automaton]] it would be <math>\delta: S \times \Sigma \rightarrow \mathcal{P}(S)</math>, i.e. <math>\delta</math> would return a set of states); * <math>F</math> is the set of final states, a (possibly empty) subset of <math>S</math>. For both deterministic and non-deterministic FSMs, it is conventional to allow <math>\delta</math> to be a [[partial function]], i.e. <math>\delta(s, x)</math> does not have to be defined for every combination of <math>s \isin S</math> and <math>x \isin \Sigma</math>. If an FSM <math>M</math> is in a state <math>s</math>, the next symbol is <math>x</math> and <math>\delta(s, x)</math> is not defined, then <math>M</math> can announce an error (i.e. reject the input). This is useful in definitions of general state machines, but less useful when transforming the machine. Some algorithms in their default form may require total functions. A finite-state machine has the same computational power as a [[Turing machine]] that is restricted such that its head may only perform "read" operations, and always has to move from left to right. That is, each formal language accepted by a finite-state machine is accepted by such a kind of restricted Turing machine, and vice versa.<ref>{{cite journal |last = Black |first = Paul E |date = 12 May 2008 |title = Finite State Machine |journal = Dictionary of Algorithms and Data Structures |publisher = U.S. [[National Institute of Standards and Technology]] |url = https://xlinux.nist.gov/dads/HTML/finiteStateMachine.html |access-date = 2 November 2016 |archive-url = https://web.archive.org/web/20181013023517/https://xlinux.nist.gov/dads/HTML/finiteStateMachine.html |archive-date = 13 October 2018 |url-status = dead |df = dmy-all }}</ref> A ''[[finite-state transducer]]'' is a [[sextuple]] <math>(\Sigma, \Gamma, S, s_0, \delta, \omega)</math>, where: * <math>\Sigma</math> is the input [[Alphabet (computer science)|alphabet]] (a finite non-empty set of symbols); * <math>\Gamma</math> is the output alphabet (a finite non-empty set of symbols); * <math>S</math> is a finite non-empty set of states; * <math>s_0</math> is the initial state, an element of <math>S</math>; * <math>\delta</math> is the state-transition function: <math>\delta: S \times \Sigma \rightarrow S</math>; * <math>\omega</math> is the output function. If the output function depends on the state and input symbol (<math>\omega: S \times \Sigma \rightarrow \Gamma</math>) that definition corresponds to the ''Mealy model'', and can be modelled as a [[Mealy machine]]. If the output function depends only on the state (<math>\omega: S \rightarrow \Gamma</math>) that definition corresponds to the ''Moore model'', and can be modelled as a [[Moore machine]]. A finite-state machine with no output function at all is known as a [[semiautomaton]] or [[transition system]]. If we disregard the first output symbol of a Moore machine, <math>\omega(s_0)</math>, then it can be readily converted to an output-equivalent Mealy machine by setting the output function of every Mealy transition (i.e. labeling every edge) with the output symbol given of the destination Moore state. The converse transformation is less straightforward because a Mealy machine state may have different output labels on its incoming transitions (edges). Every such state needs to be split in multiple Moore machine states, one for every incident output symbol.<ref name="AndersonHead2006">{{cite book |first1=James Andrew |last1=Anderson |first2=Thomas J. |last2=Head |title=Automata theory with modern applications |url=https://books.google.com/books?id=ikS8BLdLDxIC&pg=PA105 |year=2006 |publisher=Cambridge University Press |isbn=978-0-521-84887-9 |pages=105β108}}</ref> == Optimization == {{Main|DFA minimization}} Optimizing an FSM means finding a machine with the minimum number of states that performs the same function. The fastest known algorithm doing this is the [[DFA minimization#Hopcroft's algorithm|Hopcroft minimization algorithm]].<ref>{{Cite FTP |last=Hopcroft |first=John E. |year=1971 |title=An ''n'' log ''n'' algorithm for minimizing states in a finite automaton |volume=CS-TR-71-190 |type=Technical Report |server=Stanford Univ. |url-status=dead |url=ftp://reports.stanford.edu/pub/cstr/reports/cs/tr/71/190/CS-TR-71-190.pdf }}</ref><ref>{{cite report|last1= Almeida|first1= Marco|last2= Moreira|first2= Nelma|last3= Reis|first3= Rogerio|year= 2007|title= On the performance of automata minimization algorithms|url= http://www.dcc.fc.up.pt/dcc/Pubs/TReports/TR07/dcc-2007-03.pdf|type= Technical Report|volume= DCC-2007-03|publisher= Porto Univ.|access-date= 25 June 2008|archive-url= https://web.archive.org/web/20090117201637/http://www.dcc.fc.up.pt/dcc/Pubs/TReports/TR07/dcc-2007-03.pdf|archive-date= 17 January 2009|url-status= dead|df= dmy-all}}</ref> Other techniques include using an [[implication table]], or the Moore reduction procedure.<ref>{{cite journal | author=Edward F. Moore | title=Gedanken-Experiments on Sequential Machines | editor=C.E. Shannon and J. McCarthy | journal=Annals of Mathematics Studies | publisher=Princeton University Press | volume=34 | pages=129–153 | year=1956 }} Here: Theorem 4, p.142.</ref> Additionally, acyclic FSAs can be minimized in [[linear time]].<ref>{{cite journal|last=Revuz |first=D. |title=Minimization of Acyclic automata in Linear Time| journal= Theoretical Computer Science |volume=92 |date=1992| pages= 181β189 |doi=10.1016/0304-3975(92)90142-3|doi-access=}}</ref> == Implementation == === Hardware applications === [[File:4 bit counter.svg|thumb|Fig. 9 The [[circuit diagram]] for a 4-bit [[Transistor-transistor logic|TTL]] counter, a type of state machine]] In a [[digital circuit]], an FSM may be built using a [[programmable logic device]], a [[programmable logic controller]], [[logic gate]]s and [[Flip-flop (electronics)|flip flops]] or [[relay]]s. More specifically, a hardware implementation requires a [[processor register|register]] to store state variables, a block of [[combinational logic]] that determines the state transition, and a second block of combinational logic that determines the output of an FSM. One of the classic hardware implementations is the [[Richards controller]]. In a ''Medvedev machine'', the output is directly connected to the state flip-flops minimizing the time delay between flip-flops and output.<ref>{{cite book |last= Kaeslin|first= Hubert |title=Digital Integrated Circuit Design: From VLSI Architectures to CMOS Fabrication |chapter-url=https://books.google.com/books?id=gdRStcYgf2oC&q=medvedev+fsm&pg=PA787 |year=2008 |publisher=Cambridge University Press |page=787 | chapter=Mealy, Moore, Medvedev-type and combinatorial output bits |isbn= 978-0-521-88267-5}}</ref><ref>[http://users.etech.haw-hamburg.de/users/Schwarz/En/Lecture/Ds/Notes/DigSys1.pdf Slides] {{Webarchive|url=https://web.archive.org/web/20170118123034/http://users.etech.haw-hamburg.de/users/Schwarz/En/Lecture/Ds/Notes/DigSys1.pdf |date=18 January 2017 }}, ''Synchronous Finite State Machines; Design and Behaviour'', [[University of Applied Sciences Hamburg]], p.18</ref> Through [[state encoding for low power]] state machines may be optimized to minimize power consumption. === Software applications === The following concepts are commonly used to build software applications with finite-state machines: * [[Automata-based programming]] * [[Event-driven finite-state machine]] * [[Virtual finite-state machine]] * [[State pattern|State design pattern]] === Finite-state machines and compilers === Finite automata are often used in the [[Compilers#Front end|frontend]] of programming language compilers. Such a frontend may comprise several finite-state machines that implement a [[lexical analysis|lexical analyzer]] and a parser. Starting from a sequence of characters, the lexical analyzer builds a sequence of language tokens (such as reserved words, literals, and identifiers) from which the parser builds a syntax tree. The lexical analyzer and the parser handle the regular and [[context-free grammar|context-free]] parts of the programming language's grammar.<ref>{{cite book |author-link1=Alfred V. Aho |last1=Aho |first1=Alfred V. |author-link2 = Ravi Sethi |last2=Sethi |first2=Ravi |author-link3=Jeffrey D. Ullman |last3=Ullman |first3=Jeffrey D. |title=Compilers: Principles, Techniques, and Tools |isbn=978-0-201-10088-4 |publisher=[[Addison-Wesley]] |year=1986 |edition=1st|title-link=Compilers: Principles, Techniques, and Tools }}</ref> == See also == {{div col|colwidth=21em}} * [[Abstract state machine]]s * [[Alternating finite automaton]] * [[Communicating finite-state machine]] * [[Control system]] * [[Control table]] * [[Decision table]]s * [[DEVS]] * [[Hidden Markov model]] * [[Petri net]] * [[Pushdown automaton]] * [[Quantum finite automaton]] * [[SCXML]] * [[Semiautomaton]] * [[Semigroup action]] * [[Sequential logic]] * [[State diagram]] * [[Synchronizing word]] * [[Transformation semigroup]] * [[Transition system]] * [[Tree automaton]] * [[Turing machine]] * [[UML state machine]] {{div col end}} == References == {{Reflist}} ==Sources== * {{Hopcroft and Ullman 1979|author-link=no|title-link=no}}{{sfn whitelist|CITEREFHopcroftUllman1979}} * {{Hopcroft, Motwani, and Ullman 2006}}{{sfn whitelist|CITEREFHopcroftMotwaniUllman2006}} == Further reading == === General === * {{cite book | last=Sakarovitch | first=Jacques | title=Elements of automata theory | others=Translated from the French by Reuben Thomas | publisher=[[Cambridge University Press]] | year=2009 | isbn=978-0-521-84425-3 | zbl=1188.68177 }} * Wagner, F., "Modeling Software with Finite State Machines: A Practical Approach", Auerbach Publications, 2006, {{ISBN|0-8493-8086-3}}. * ITU-T, [http://www.itu.int/rec/T-REC-Z.100-200711-I/en ''Recommendation Z.100 Specification and Description Language (SDL)''] * Samek, M., [http://www.state-machine.com/psicc/index.php ''Practical Statecharts in C/C++''], CMP Books, 2002, {{ISBN|1-57820-110-1}}. * Samek, M., [http://www.state-machine.com/psicc2/index.php ''Practical UML Statecharts in C/C++, 2nd Edition''], Newnes, 2008, {{ISBN|0-7506-8706-1}}. * Gardner, T., [http://www.troyworks.com/cogs/ ''Advanced State Management''] {{Webarchive|url=https://web.archive.org/web/20081119071252/http://www.troyworks.com/cogs/ |date=2008-11-19 }}, 2007 * Cassandras, C., Lafortune, S., "Introduction to Discrete Event Systems". Kluwer, 1999, {{ISBN|0-7923-8609-4}}. * Timothy Kam, ''Synthesis of Finite State Machines: Functional Optimization''. Kluwer Academic Publishers, Boston 1997, {{ISBN|0-7923-9842-4}} * Tiziano Villa, ''Synthesis of Finite State Machines: Logic Optimization''. Kluwer Academic Publishers, Boston 1997, {{ISBN|0-7923-9892-0}} * Carroll, J., Long, D., ''[https://philpapers.org/archive/CARTOF.pdf Theory of Finite Automata with an Introduction to Formal Languages]''. Prentice Hall, Englewood Cliffs, 1989. * Kohavi, Z., ''Switching and Finite Automata Theory''. McGraw-Hill, 1978. * Gill, A., ''Introduction to the Theory of Finite-state Machines''. McGraw-Hill, 1962. * Ginsburg, S., ''An Introduction to Mathematical Machine Theory''. Addison-Wesley, 1962. === Finite-state machines (automata theory) in theoretical computer science === * {{cite book | last = Arbib | first = Michael A. | title = Theories of Abstract Automata | edition = 1st | publisher = Prentice-Hall, Inc. | location = Englewood Cliffs, N.J. | year = 1969 | isbn = 978-0-13-913368-8}} * {{cite book | last1 = Bobrow | first1 = Leonard S. | first2 = Michael A. | last2 = Arbib | title = Discrete Mathematics: Applied Algebra for Computer and Information Science | edition = 1st | publisher = W. B. Saunders Company, Inc. | location = Philadelphia | year = 1974 | isbn = 978-0-7216-1768-8 | url-access = registration | url = https://archive.org/details/discretemathemat0000bobr }} * {{cite book | last = Booth| first = Taylor L. | title = Sequential Machines and Automata Theory | edition = 1st | publisher = John Wiley and Sons, Inc. | location = New York | year = 1967| id = Library of Congress Card Catalog Number 67-25924}} * {{cite book | last1 = Boolos | first1 = George |first2=Richard |last2=Jeffrey | title = Computability and Logic | url = https://archive.org/details/computabilitylog0000bool_r8y9 | url-access = registration | edition = 3rd | publisher = Cambridge University Press | location = Cambridge, England | orig-year = 1989| year = 1999| isbn = 978-0-521-20402-6}} * {{cite book | last = Brookshear | first = J. Glenn | title = Theory of Computation: Formal Languages, Automata, and Complexity | year = 1989 | publisher = Benjamin/Cummings Publish Company, Inc. | location = Redwood City, California | isbn = 978-0-8053-0143-4}} * {{cite book | last1 = Davis| first1 = Martin |first2=Ron |last2=Sigal |first3=Elaine J. |last3=Weyuker | title = Computability, Complexity, and Languages and Logic: Fundamentals of Theoretical Computer Science | edition = 2nd | publisher = Academic Press, Harcourt, Brace & Company| location = San Diego | year = 1994 | isbn = 978-0-12-206382-4}} * {{cite book | last1 = Hopkin | first1 = David |first2=Barbara |last2=Moss| title = Automata | publisher = Elsevier North-Holland | location = New York | year = 1976| isbn = 978-0-444-00249-5 }} * {{cite book | last = Kozen | first = Dexter C. | title = Automata and Computability | edition = 1st | publisher = Springer-Verlag | location = New York | year = 1997|isbn = 978-0-387-94907-9}} * {{cite book | last1 = Lewis| first1 = Harry R.| author-link = Harry R. Lewis |first2=Christos H. |last2=Papadimitriou |author2-link=Christos H. Papadimitriou| title = Elements of the Theory of Computation | edition = 2nd | publisher = Prentice-Hall | location = Upper Saddle River, New Jersey | year = 1998| isbn = 978-0-13-262478-7 }} * {{cite book | last = Linz| first = Peter| title = Formal Languages and Automata | edition = 4th | publisher = Jones and Bartlett | location = Sudbury, MA | year = 2006| isbn = 978-0-7637-3798-6 }} * {{cite book | last = Minsky| first = Marvin| title = Computation: Finite and Infinite Machines| url = https://archive.org/details/computationfinit0000mins| url-access = registration| edition = 1st | publisher = Prentice-Hall | location = New Jersey | year = 1967}} * {{cite book |first=Christos |last=Papadimitriou |author-link=Christos Papadimitriou | year = 1993 | title = Computational Complexity | publisher = Addison Wesley | edition = 1st | isbn = 978-0-201-53082-7}} * {{cite book | last = Pippenger| first = Nicholas| title = Theories of Computability| edition = 1st | publisher = Cambridge University Press| location = Cambridge, England | year = 1997| isbn = 978-0-521-55380-3 }} * {{cite book | last1 = Rodger| first1 = Susan |first2=Thomas |last2=Finley| title = JFLAP: An Interactive Formal Languages and Automata Package | edition = 1st | publisher = Jones and Bartlett | location = Sudbury, MA | year = 2006| isbn = 978-0-7637-3834-1 }} * {{cite book | last = Sipser| first = Michael | title = Introduction to the Theory of Computation | edition = 2nd | publisher = Thomson Course Technology | location = Boston Mass | year = 2006| isbn = 978-0-534-95097-2 }} * {{cite book | last = Wood| first = Derick | author-link = Derick Wood | title = Theory of Computation | edition = 1st | publisher = Harper & Row, Publishers, Inc.| location = New York | year = 1987| isbn = 978-0-06-047208-5 }} === Abstract state machines in theoretical computer science === * {{cite journal|first=Yuri |last=Gurevich |title=Sequential Abstract State Machines Capture Sequential Algorithms |journal=ACM Transactions on Computational Logic| volume= 1| issue=1 |date=July 2000 |pages= 77β111 |url=http://research.microsoft.com/~gurevich/Opera/141.pdf |doi=10.1145/343369.343384|citeseerx=10.1.1.146.3017 |s2cid=2031696 }} === Machine learning using finite-state algorithms === * {{cite book | last = Mitchell| first = Tom M. | title = Machine Learning | edition = 1st | publisher = WCB/McGraw-Hill Corporation | location = New York | year = 1997| isbn = 978-0-07-042807-2}} === Hardware engineering: state minimization and synthesis of sequential circuits === * {{cite book | last = Booth| first = Taylor L. | title = Sequential Machines and Automata Theory | edition = 1st | publisher = John Wiley and Sons, Inc. | location = New York | year = 1967| id = Library of Congress Card Catalog Number 67-25924}} * {{cite book| last = Booth| first = Taylor L.| title = Digital Networks and Computer Systems| edition = 1st| publisher = John Wiley and Sons, Inc.| location = New York| year = 1971| isbn = 978-0-471-08840-0| url = https://archive.org/details/digitalnetworksc00boot}} * {{cite book | last = McCluskey| first = E. J. | title = Introduction to the Theory of Switching Circuits | edition = 1st | publisher = McGraw-Hill Book Company, Inc. | location = New York | year = 1965| id = Library of Congress Card Catalog Number 65-17394}} * {{cite book | last1 = Hill| first1 = Fredrick J. |first2=Gerald R. |last2=Peterson | title = Introduction to the Theory of Switching Circuits | edition = 1st | publisher = McGraw-Hill Book Company | location = New York | year = 1965| id = Library of Congress Card Catalog Number 65-17394}} === Finite Markov chain processes === ::"We may think of a [[Markov chain]] as a process that moves successively through a set of states ''s<sub>1</sub>'', ''s<sub>2</sub>'', β¦, ''s<sub>r</sub>''. β¦ if it is in state ''s<sub>i</sub>'' it moves on to the next stop to state ''s<sub>j</sub>'' with probability ''p<sub>ij</sub>''. These probabilities can be exhibited in the form of a transition matrix" (Kemeny (1959), p. 384) Finite Markov-chain processes are also known as [[subshifts of finite type]]. * {{cite book | last = Booth| first = Taylor L. | title = Sequential Machines and Automata Theory | edition = 1st | publisher = John Wiley and Sons, Inc. | location = New York | year = 1967| id = Library of Congress Card Catalog Number 67-25924}} * {{cite book | last1 = Kemeny| first1 = John G. |first2=Hazleton |last2=Mirkil |first3=J. Laurie |last3=Snell |first4=Gerald L. |last4=Thompson | title = Finite Mathematical Structures| url = https://archive.org/details/finitemathematic0000keme_h5g0| url-access = registration| edition = 1st | publisher = Prentice-Hall, Inc. | location = Englewood Cliffs, N.J. | year = 1959| id = Library of Congress Card Catalog Number 59-12841}} Chapter 6 "Finite Markov Chains". == External links == * [https://archive.today/20121202054532/http://blog.manuvra.com/modeling-a-simple-ai-behavior-using-a-finite-state-machine/ ''Modeling a Simple AI behavior using a Finite State Machine''] Example of usage in Video Games * [https://web.archive.org/web/20171211180457/http://foldoc.org/finite+state+machine Free On-Line Dictionary of Computing] description of Finite-State Machines * [https://web.archive.org/web/20181013023517/https://xlinux.nist.gov/dads/HTML/finiteStateMachine.html NIST Dictionary of Algorithms and Data Structures] description of Finite-State Machines * [https://blogs.itemis.com/en/a-brief-overview-of-state-machine-types A brief overview of state machine types], comparing theoretical aspects of Mealy, Moore, Harel & UML state machines. {{Formal languages and grammars}} {{digital systems}} {{Authority control}} [[Category:Finite-state machines| ]] [[Category:Management cybernetics]]
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