Editing IBM 7030 Stretch

{{Short description|First IBM supercomputer using dedicated transistors}}
{{Infobox supercomputer
| name         = IBM Stretch
| image        = IBM 7030-CNAM 22480-IMG 5115-gradient.jpg
| caption      = IBM 7030 maintenance console at the ''[[Musée des Arts et Métiers]]'', Paris
| manufacturer = [[IBM]]
| designer     = [[Gene Amdahl]]
| release date = May 1961
| units sold   = 9
| price        = US$7,780,000 ({{Inflation|US|7780000|1961|fmt=eq|r=-4}})
| dimensions   = 
| weight       = {{convert|70000|lb|ST MT}}<ref name="BRLreport61">[http://www.ed-thelen.org/comp-hist/BRL61-ibm7070.html#IBM-STRETCH BRL Report 1961]</ref>
| power        = 100 [[Kilowatt|kW]]<ref name="BRLreport61"/>
| voltage      = 110 V
| os           = MCP
| cpu          = [[64-bit]] processor
| frequency    = 
| memory       = 128 to 2048 [[kilobytes]] (16,384 x 64 to 262,144 x 64 bits)<ref name="BRLreport61"/>
| storage      = 
| mips         = 1.2 MIPS
| flops        = 
| successor    = 
| predecessor  = 
}}
[[File:IBM Model 7030 "Stretch" console, 1961, Computer History Museum.jpg|thumb|Operator console at the [[Computer History Museum]]]]
The '''IBM 7030''', also known as '''Stretch''', was [[IBM]]'s first [[Transistor computer|transistorized]] [[supercomputer]]. It was the fastest computer in the world from 1961 until the first [[CDC 6600]] became operational in 1964.<ref name=AcadBook>"Designed by Seymour Cray, the CDC 6600 was almost three times faster than the next fastest machine of its day, the IBM 7030 Stretch." {{cite book
|title=Making a World of Difference: Engineering Ideas into Reality
|url=https://books.google.com/books?isbn=0309312655  |isbn=978-0309312653
|publisher=[[National Academy of Engineering]]   |date=2014}}</ref><ref>"In 1964 Cray's CDC 6600 replaced Stretch as the fastest computer on earth." {{cite book
|title=EXPERT SYSTEMS, KNOWLEDGE ENGINEERING FOR HUMAN REPLICATION
|url=https://books.google.com/books?isbn=1291595090  |isbn=978-1291595093
|author=Andreas Sofroniou  |date=2013| publisher=Lulu.com }}</ref>

Originally designed to meet a requirement formulated by [[Edward Teller]] at [[Lawrence Livermore National Laboratory]], the first example was delivered to [[Los Alamos National Laboratory]] in 1961, and a second customized version, the [[IBM 7950 Harvest]], to the [[National Security Agency]] in 1962. The Stretch at the [[Atomic Weapons Research Establishment]] at [[RAF Aldermaston|Aldermaston]], England was heavily used by researchers there and at [[Atomic Energy Research Establishment|AERE Harwell]], but only after the development of the S2 [[Fortran]] compiler which was the first to add [[dynamic array]]s, and which was later ported to the [[Atlas (computer)|Ferranti Atlas]] of [[Atlas Computer Laboratory]] at Chilton.<ref name="Some Early UK FORTRAN Compilers">{{cite web |url=http://www.fortran.bcs.org/2007/jubilee/earlyukcompilers.php |title=Some Early UK FORTRAN Compilers}}</ref><ref name="HARTRAN Overview">{{cite web |url=http://www.chilton-computing.org.uk/acl/applications/hartran/overview.htm |title=HARTRAN Overview}}</ref>

The 7030 was much slower than expected and failed to meet its aggressive performance goals. IBM was forced to drop its price from $13.5 million to only $7.78 million and withdrew the 7030 from sales to customers beyond those having already negotiated contracts.  ''[[PC World]]'' magazine named Stretch one of the biggest project management failures in [[Information technology|IT]] history.<ref name="PCWorld Project Failures">{{cite magazine |url=http://www.pcworld.com/article/152103/it_project_failures.html |title=Lessons Learned: IT's Biggest Project Failures |magazine=[[PCWorld]] |author-last=Widman |author-first=Jake |date=October 9, 2008 |access-date=October 23, 2012}}</ref>

Within IBM, being eclipsed by the smaller [[Control Data Corporation]] seemed hard to accept.<ref>As noted in the famous "Janitor" memo, wherein IBM CEO T. J. Watson Jr asked "why we have lost our industry leadership" to "34 people, including the janitor."{{cite web |url=http://www.computerhistory.org/revolution/supercomputers/10/33/62	|title=Watson Jr. memo about CDC 6600 |date=August 28, 1963}}</ref> The project lead, [[Stephen W. Dunwell]],<ref>{{cite web |url=https://www-03.ibm.com/ibm/history/exhibits/builders/builders_dunwell.html |archive-url=https://web.archive.org/web/20060904123924/http://www-03.ibm.com/ibm/history/exhibits/builders/builders_dunwell.html |url-status=dead |archive-date=September 4, 2006 |title=IBM Archives: Stephen W. Dunwell |publisher=[[IBM]]}}</ref> was initially made a scapegoat for his role in the "failure" but,<ref>"Stretch was considered a commercial failure, and Dunwell was sent into ..." {{cite web 
|url=https://cacm.acm.org/magazines/2010/12/102128-ibms-single-processor-supercomputer-efforts
|title=IBM's Single-Processor Supercomputer Efforts
|first1=Mark  |last1=Smotherman  |first2=Dag  |last2=Spicer|date=December 2010
}}</ref> after the success of the [[IBM System/360]] became obvious, he received an official apology, and in 1966 was made an [[IBM Fellow]].<ref>" to pursue any research he wished." {{cite news
|newspaper=The New York Times |date=March 24, 1994 
|url=https://www.nytimes.com/1994/03/24/obituaries/s-w-dunwell-80-engineer-at-ibm-designed-computers.html
|title=S. W. Dunwell, 80, Engineer at I.B.M.; Designed Computers
|author=Wolfgang Saxon}}</ref>

In spite of the failure of Stretch to meet IBM's performance goals, it served as the basis for many of the design features of the successful IBM System/360, which was announced in 1964 and first shipped in 1965.

==Development history==
In early 1955, Dr. [[Edward Teller]] of the [[University of California Radiation Laboratory]] wanted a new scientific computing system for three-dimensional [[fluid dynamics|hydrodynamic]] calculations. Proposals were requested from IBM and [[UNIVAC]] for this new system, to be called ''Livermore Automatic Reaction Calculator'' or [[UNIVAC LARC|LARC]]. According to IBM executive [[Cuthbert Hurd]], such a system would cost roughly $2.5 million and would run at one to two [[million instructions per second|MIPS]].<ref name="evans-360">{{cite magazine|author=Bob Evans|title=IBM System/360|url=https://archive.org/details/computermuseusum1984comp|magazine=The Computer Museum Report|pages=8–18|date=Summer 1984}}</ref>{{rp|12}} Delivery was to be two to three years after the contract was signed.

At IBM, a small team at [[Poughkeepsie, New York|Poughkeepsie]] including John Griffith and [[Gene Amdahl]] worked on the design proposal. Just after they finished and were about to present the proposal, Ralph Palmer stopped them and said, "It's a mistake."<ref name="evans-360"/>{{rp|12}} The proposed design would have been built with either [[point-contact transistor]]s or [[surface-barrier transistor]]s, both likely to be soon outperformed by the then newly invented [[diffusion transistor]].<ref name="evans-360"/>{{rp|12}}

IBM returned to Livermore and stated that they were withdrawing from the contract, and instead proposed a dramatically better system, "We are not going to build that machine for you; we want to build something better! We do not know precisely what it will take but we think it will be another million dollars and another year, and we do not know how fast it will run but we would like to shoot for ten million instructions per second."<ref name="evans-360"/>{{rp|13}} Livermore was not impressed, and in May 1955 they announced that UNIVAC had won the [[UNIVAC LARC|LARC]] contract, now called the ''Livermore Automatic Research Computer''. LARC would eventually be delivered in June 1960.<ref>{{cite web|url=http://www.computer-history.info/Page4.dir/pages/LARC.dir/LARC.Cole.html|title=The Remington Rand Univac LARC|author=Charles Cole}}</ref>

In September 1955, fearing that [[Los Alamos National Laboratory]] might also order a LARC, IBM submitted a preliminary proposal for a high-performance binary computer based on the improved version of the design that Livermore had rejected, which they received with interest. In January 1956, Project Stretch was formally initiated. In November 1956, IBM won the contract with the aggressive performance goal of a "speed at least 100 times the [[IBM 704]]" (i.e. 4 MIPS). Delivery was slated for 1960.

During design, it proved necessary to reduce the clock speeds, making it clear that Stretch could not meet its aggressive performance goals, but estimates of performance ranged from 60 to 100 times the IBM 704. In 1960, the price of $13.5 million was set for the IBM 7030. In 1961, actual [[benchmark (computing)|benchmark]]s indicated that the performance of the IBM 7030 was only about 30 times the IBM 704 (i.e. 1.2 MIPS), causing considerable embarrassment for IBM. In May 1961, [[Thomas J. Watson Jr.]] announced a price cut of all 7030s under negotiation to $7.78 million and immediate withdrawal of the product from further sales.

Its [[Floating-point arithmetic|floating-point]] addition time is 1.38–1.50 [[microsecond]]s, multiplication time is 2.48–2.70 microseconds, and division time is 9.00–9.90 microseconds.

==Technical impact==
While the IBM 7030 was not considered successful, it spawned many technologies incorporated in future machines that were highly successful. The ''[[Standard Modular System]]'' (SMS) [[transistor]] logic was the basis for the [[IBM 7090]] line of scientific computers, the [[IBM 7070]] and [[IBM 7080|7080]] business computers, the [[IBM 7040]] and [[IBM 1400 series|IBM 1400]] lines, and the [[IBM 1620]] small scientific computer; the 7030 used about {{formatnum:170000}} transistors. The [[IBM 7302]] Model I Core Storage units were also used in the IBM 7090, IBM 7070 and IBM 7080. [[Computer multitasking|Multiprogramming]], memory protection, generalized interrupts, the [[eight-bit byte]] for I/O{{efn|While Stretch had instructions with [[variable byte size]]s, no subsequent processor from [[IBM]] did. However, [[Burroughs Corporation|Burroughs]], [[Control Data Corporation|CDC]], [[Digital Equipment Corporation|DEC]], [[General Electric|GE]], [[RCA]], [[UNIVAC]] and their successors had machines with multiple byte sizes; Burroughs, CDC and DEC had machines that supported any size from 1 to the [[word (computer architecture)|word]] length.
}} 
were all concepts later incorporated in the [[IBM System/360]] line of computers as well as most later [[central processing unit]]s (CPU).

Stephen Dunwell, the project manager who became a scapegoat when Stretch failed commercially, pointed out soon after the phenomenally successful 1964 launch of System/360 that most of its core concepts were pioneered by Stretch.<ref name="SimmonsElsberry1988p160">{{Cite book |last1=Simmons |first1=William W. |author-link=William W. Simmons (executive) |url=https://books.google.com/books?id=adfxAAAAMAAJ |title=Inside IBM: the Watson years: A Personal Memoir |last2=Elsberry |first2=Richard B. |publisher=Dorrance |year=1988 |isbn=978-0805931167 |location=Bryn Mawr, Pennsylvania, US |page=[https://archive.org/details/insideibmwatsony0000simm/page/160 160] |lccn=88184688 |oclc=18532202 |ol=2124603M <!-- edition of OL4717500W -->}} ''The memoir of a senior IBM executive, giving his recollections of his and IBM's experience from World War II into the 1970s.''</ref> By 1966, he had received an apology and been made an IBM Fellow, a high honor that carried with it resources and authority to pursue one's desired research.<ref name="SimmonsElsberry1988p160"/>

[[Instruction pipelining]], [[instruction prefetch|prefetch]] and decoding, and [[memory interleaving]] were used in later supercomputer designs such as the IBM System/360 Models [[IBM System/360 Model 91|91]], [[IBM System/360 Model 91|95]] and [[IBM System/360 Model 195|195]], and the [[IBM 3090]] series as well as computers from other manufacturers. {{As of|2021}}, these techniques are still used in most advanced microprocessors, starting with the 1990s generation that included the Intel [[Pentium]] and the Motorola/IBM [[PowerPC]], as well as in many embedded microprocessors and microcontrollers from various manufacturers.

==Hardware implementation==
[[File:IBM 7030 Stretch circuit board.jpg|right|thumbnail|A circuit board from the IBM 7030, in the [[Bradbury Science Museum]], [[Los Alamos, New Mexico]].]]
The 7030 CPU uses [[emitter-coupled logic]] (originally called ''current-steering logic'')<ref name="Rymaszewski">{{cite journal |author-first=E. J. |author-last=Rymaszewski |year=1981 |title=Semiconductor Logic Technology in IBM |journal=IBM Journal of Research and Development |volume=25 |issue=5 |pages=607–608 |issn=0018-8646 |doi=10.1147/rd.255.0603 |display-authors=etal}}</ref> on 18 types of [[Standard Modular System]] cards. It uses 4,025 double cards (as shown) and 18,747 single cards, holding 169,100 transistors, requiring a total of 21&nbsp;kW power.<ref name=Bloch1959>{{cite conference|url=http://www.bitsavers.org/pdf/ibm/7030/Bloch_EngrDesOfStretch_1959.pdf|title=The Engineering Design of the Stretch Computer|author=Erich Bloch|author-link=Erich Bloch|conference=Eastern Joint Computer Conference|year=1959}}</ref>{{rp|54}} It uses high-speed NPN and PNP germanium [[drift transistor]]s, with cut-off frequency over 100&nbsp;MHz, and using ~50&nbsp;mW each.<ref name=Bloch1959/>{{rp|57}} Some ''third level'' circuits use a third voltage level. Each logic level has a delay of about 20 ns. To gain speed in critical areas [[emitter-coupled logic|emitter-follower logic]] is used to reduce the delay to about 10 ns.<ref name="Bloch1959"/>{{rp|55}}

It uses the same core memory as the [[IBM 7090]].<ref name="Bloch1959"/>{{rp|58}}

==Installations==
#[[Los Alamos Scientific Laboratory]] (LASL) in April 1961, accepted in May 1961, and used until June 21, 1971.
#[[Lawrence Livermore National Laboratory]], [[Livermore, California]] delivered November 1961.<ref name="Timeline" />
#U.S. [[National Security Agency]] in February 1962 as the main CPU of the [[IBM 7950 Harvest]] system, used until 1976, when the [[IBM 7955]] Tractor tape system developed problems due to worn cams that could not be replaced.
#[[Atomic Weapons Establishment]], [[Aldermaston]], England, delivered February 1962<ref name="Timeline">{{cite web
 |url=http://archive.computerhistory.org/resources/text/IBM/Stretch/102636400.txt
 |title=TIMELINE OF THE IBM STRETCH/HARVEST ERA (1956-1961)  |access-date=June 13, 2021 }}</ref>
#[[National Weather Service|U.S. Weather Bureau]] Washington D.C., delivered June/July 1962.<ref name="Timeline" />
#[[Mitre Corporation|MITRE Corporation]], delivered December 1962.<ref name="Timeline" /> and used until August 1971. In the spring of 1972, it was sold to [[Brigham Young University]], where it was used by the physics department until scrapped in 1982.
#U.S. Navy [[Naval Surface Warfare Center Dahlgren Division|Dahlgren Naval Proving Ground]], delivered Sep/Oct 1962.<ref name="Timeline" />
#[[French Alternative Energies and Atomic Energy Commission|Commissariat à l'énergie atomique]], France, delivered November 1963.<ref name="Timeline" />
#IBM.

The Lawrence Livermore Laboratory's IBM 7030 (except for its [[core memory]]) and portions of the MITRE Corporation/Brigham Young University IBM 7030 now reside in the [[Computer History Museum]] collection, in [[Mountain View, California]].

==Architecture==
===Data formats===
*[[Fixed-point arithmetic|Fixed-point number]]s are variable in length, stored in either binary (1 to 64 bits) or decimal (1 to 16 digits) and either unsigned format or [[Computer number format|sign/magnitude format]]. Fields may straddle word boundaries. In decimal format, digits are variable length bytes (four to eight bits).
*[[Floating-point]] numbers have a 1-bit exponent flag, a 10-bit exponent, a 1-bit exponent sign, a 48-bit magnitude, and a 4-bit sign byte in sign/magnitude format.
*Alphanumeric characters are variable length and can use any character code of 8 bits or less.
*Bytes are variable length (one to eight bits).<ref>{{cite web
 | url = http://people.cs.clemson.edu/~mark/stretch.html
 | title = IBM Stretch (7030) &mdash; Aggressive Uniprocessor Parallelism
 |date=July 2010 | access-date = 2013-12-07
 | author = Mark Smotherman | publisher = clemson.edu
}}</ref>

===Instruction format===
Instructions are either 32-bit or 64-bit.<ref>{{Cite book
 | url = http://bitsavers.org/pdf/ibm/7030/22-6530-2_7030RefMan.pdf
 | title = IBM 7030 Data Processing System Reference Manual
 | id = A22-6530-2
 | section = Control Format
 | section-url = http://bitsavers.org/pdf/ibm/7030/22-6530-2_7030RefMan.pdf#page=22
 | pages = 19–20
 | year = 1961
 | access-date = 2024-05-17
 | publisher = [[IBM]]
 | via = bitsavers.org
 }}</ref>

===Registers===
The registers overlay the first 32 addresses of memory as shown.<ref>{{Cite book
 | url = http://bitsavers.org/pdf/ibm/7030/22-6530-2_7030RefMan.pdf
 | title = IBM 7030 Data Processing System Reference Manual
 | id = A22-6530-2
 | section = Storage Assignment
 | section-url = http://bitsavers.org/pdf/ibm/7030/22-6530-2_7030RefMan.pdf#page=36
 | pages = 33–38
 | year = 1961
 | access-date = 2015-05-05
 | publisher = [[IBM]]
 | via = bitsavers.org
 }}</ref>

{| class="wikitable"
|-
!! Address !! Mnemonic !! Register !! Stored in:
|-
|| 0 || $Z || 64-bit zero: always reads as zero, cannot be changed by writes
|| Main core storage
|-
|rowspan="2"| 1
|| $IT || interval timer (bits 0..18): decremented at 1024&nbsp;Hz, recycles about every 8.5 minutes, at zero it turns on the "time signal indicator" in the indicator register
|rowspan="2"| Index core storage
|-
|| $TC || 36-bit time clock (bits 28..63): count of 1024&nbsp;Hz ticks, bits 38..63 increment once per second, recycles each ~777 days.
|-
|| 2
|| $IA || 18-bit interruption address
|| Main core storage
|-
|rowspan="3"| 3
||$UB || 18-bit upper boundary address (bits 0-17)
|rowspan="3"| Transistor register
|-
||$LB || 18-bit lower boundary address (bits 32-49)
|-
|| || 1-bit boundary control (bit 57): determines whether addresses within or outside the boundary addresses are protected
|-
|| 4
|| || 64-bit maintenance bits: only used for maintenance
|| Main core storage
|-
|| 5
|| $CA || channel address (bits 12..18): readonly, set by the "exchange", an i/o processor
|| Transistor register
|-
|| 6
|| $CPUS || other CPU bits (bits 0..18): signaling mechanism for a cluster of up to 20 CPUs
|| Transistor register
|-
|rowspan="2"| 7
|| $LZC || left zeroes count (bits 17..23): number of leading zero bits from a connective result or floating point operation
|rowspan="2"| Transistor register
|-
|| $AOC || all-ones count (bits 44..50): count of bits set in connective result or decimal multiple or divide
|-
|| 8
|| $L || Left half of 128-bit [[Accumulator (computing)|accumulator]]
|rowspan="3"| Transistor register
|-
|| 9
|| $R || Right half of 128-bit accumulator
|-
|| 10
|| $SB || accumulator sign byte (bits 0..7)
|-
|| 11
|| $IND || indicator register (bits 0..19)
|| Transistor register
|-
|| 12
|| $MASK || 64-bit mask register: bits 0..19 always 1, bits 20..47 writable, bits 48..63 always 0
|| Transistor register
|-
|| 13
|| $RM || 64-bit remainder register: set by integer and floating point divide instructions only
|| Main core storage
|-
|| 14
|| $FT || 64-bit factor register: changed only by the "load factor" instruction
|| Main core storage
|-
|| 15
|| $TR || 64-bit transit register
|| Main core storage
|-
|| 16<br>...<br>31
|| $X0<br>...<br>$X15 || 64-bit index registers (sixteen)
|| Index core storage
|}

The accumulator and index registers operate in [[Signed number representations#Sign–magnitude|sign-and-magnitude]] format.

===Memory===
Main memory is 16K to 256K 64-bit binary words, in banks of 16K.

The memory was immersion oil-heated/cooled to stabilize its operating characteristics.

==Software==
*[[STRETCH Assembly Program]] (STRAP)
* MCP (not to be confused with the [[Burroughs MCP]])
* COLASL<ref>{{cite conference |doi=10.1145/800198.806099 |title=Automatic programming and compilers II: The COLASL automatic coding system |book-title=ACM '62: Proceedings of the 1962 ACM national conference on Digest of technical papers |pages=44–45}}</ref> and IVY programming languages<ref>{{cite book|url=https://books.google.com/books?id=qB819m2ibUQC&q=COLASL&pg=PA14|title=Computing at LASL in the 1940s and 1950s|author=Roger B. Lazarus|publisher=[[United States Department of Energy]]|pages=14–15|year=1978}}</ref>
* [[FORTRAN]] programming language<ref name="IBM Fortran System">{{cite web |title=The IBM 7030 FORTRAN System |url=http://archive.computerhistory.org/resources/text/IBM/Stretch/pdfs/09-05/102634362.pdf |website=Computer History Museum |publisher=[[IBM|International Business Machines Corporation]] |access-date=28 February 2015 |location=IBM Stretch Collection |page=36|date=1961}}</ref>
* SOS (Stretch Operating System) Written at the BYU Scientific Computing Center as an upgrade to MCP, along with an updated variant of FORTRAN.

==See also==
*[[IBM 608]], the first commercially available transistorized computing device
*[[ILLIAC II]], a transistorized super computer from The [[University of Illinois Urbana-Champaign|University of Illinois]] that competed with Stretch.

==Notes==
{{Notelist}}

==References==
{{Reflist}}

==Further reading==
* {{cite journal|last=Brooks|first=Frederick|author-link=Frederick Brooks|title=Stretch-ing Is Great Exercise— It Gets You in Shape to Win|journal=IEEE Annals of the History of Computing|volume=32|pages=4–9|year=2010|doi=10.1109/MAHC.2010.26|s2cid=43480009}}

==External links==
{{Commons category|IBM 7030}}
*[http://purl.umn.edu/104341 Oral history interview with Gene Amdahl] [[Charles Babbage Institute]], University of Minnesota, Minneapolis. [[Gene Amdahl|Amdahl]] discusses his role in the design of several computers for IBM including the STRETCH, [[IBM 701]], 701A, and [[IBM 704]]. He discusses his work with [[Nathaniel Rochester (computer scientist)|Nathaniel Rochester]] and IBM's management of the design process for computers.
*[http://www.computerhistory.org/collections/ibmstretch/ IBM Stretch Collections @ Computer History Museum]
**[https://web.archive.org/web/20110519052441/http://archive.computerhistory.org/resources/text/IBM/Stretch/pdfs/index.html Collection index page]
*** [http://archive.computerhistory.org/resources/text/IBM/Stretch/pdfs/09-05/102634362.pdf The IBM 7030 FORTRAN System]
*[http://www-1.ibm.com/ibm/history/exhibits/mainframe/mainframe_PP7030.html 7030 Data Processing System] (IBM Archives)
*[http://www.brouhaha.com/~eric/retrocomputing/ibm/stretch/ IBM Stretch (aka IBM 7030 Data Processing System)]
*[http://people.cs.clemson.edu/~mark/stretch.html Organization Sketch of IBM Stretch]
*[http://ed-thelen.org/comp-hist/BRL61-ibm7070.html#IBM-STRETCH BRL report on the IBM Stretch]
*''Planning a Computer System – Project Stretch'', 1962 book.
**[http://ed-thelen.org/comp-hist/IBM-7030-Planning-McJones.pdf Scan of copy autographed by several of the contributors]
**[https://web.archive.org/web/20170403014651/http://archive.computerhistory.org/resources/text/IBM/Stretch/pdfs/Buchholz_102636426.pdf Searchable PDF file]
*[http://www.bitsavers.org/pdf/ibm/7030/ IBM 7030 documents at Bitsavers.org] (PDF files)

{{S-start}}
{{S-ach|rec}}
{{S-bef|before=[[UNIVAC LARC]]}}
{{S-ttl
 | title = [[Mainframe computer|World's most powerful computer]]
 | years = 1961–1963
}}
{{s-aft|after=[[CDC 6600]]}}
{{S-end}}
{{Authority control}}

[[Category:IBM transistorized computers|7030]]
[[Category:IBM 700/7000 series|7 7030]]
[[Category:IBM supercomputers|7030]]
[[Category:Computer-related introductions in 1961]]
[[Category:64-bit computers]]