Editing IBM AS/400

{{Short description|IBM midrange computer (1988–2013)}}
{{Infobox Computer
| name   = IBM AS/400
| logo   = IBM AS400 wordmark.svg
| aka    = AS/400e, eServer iSeries, eServer i5, System i
| type   = [[Midrange computer]]
| os     = [[OS/400]] (later known as i5/OS and IBM i)
| cpu    = {{Plain list|
* IMPI
* [[IBM RS64]]
* [[IBM Power microprocessors|POWER]]
}}
| image  =
| caption      = IBM AS/400e model 730
| predecessor  = [[IBM System/38]],{{Clear}}[[IBM System/36]]
| successor    = [[IBM Power Systems]] running [[IBM i]]
| manufacturer = IBM
| discontinued = Sep 30, 2013
| release date = June 1988 (Announced)<br />August 1988 (Release)
| related      = [[IBM System p]]
| website      = {{web archive|url=https://web.archive.org/web/20000302140252/http://www.as400.ibm.com/|title=as400.ibm.com}}
}}
The '''IBM AS/400''' ('''Application System/400''') is a family of [[midrange computer]]s from [[IBM]] announced in June 1988 and released in August 1988. It was the successor to the [[System/36]] and [[System/38]] platforms, and ran the [[OS/400]] operating system. Lower-cost but more powerful than its predecessors, an estimated 111,000 installations existed by the end of 1990 and annual revenue reaching $14 billion that year,<ref>{{cite magazine |magazine=Computerworld |date= 29 April 1991 |first=Teresa |last=Elms |title=Side road to success |page=27 |url=https://books.google.com/books?id=IvFeiX1fIzgC&pg=PA27}}</ref> increasing to 250,000 systems by 1994,<ref>{{cite magazine |magazine= InfoWorld |date= 14 February 1994 |first=Paul |last=Korzenioski |title=AS/400 in the LAN environment |page=52 |url=https://books.google.com/books?id=7DoEAAAAMBAJ&pg=PA52}}</ref> and about 500,000 shipped by 1997.<ref>{{cite web |last1=IBM |title=IBM AS/400 |url=https://www.ibm.com/ibm/history/exhibits/rochester/rochester_4010.html |website=IBM.com |date=23 January 2003 |publisher=International Business Machines Corporation |access-date=20 March 2022}}</ref>

A key concept in the AS/400 platform is [[IBM i#TIMI|Technology Independent Machine Interface]]{{efn|Upward compatible from the [[IBM System/38# Machine Interface|Machine Interface (MI)]] of the [[IBM System/38|S/38]]}} (TIMI), a platform-independent [[instruction set architecture]] (ISA) that is translated to native [[machine language]] instructions. The platform has used this capability to change the underlying processor architecture without breaking application compatibility. Early systems were based on a 48-bit [[Complex instruction set computer|CISC]] instruction set architecture known as the ''Internal Microprogrammed Interface'' (IMPI), originally developed for the System/38.<ref>{{cite web|url=http://users.snip.net/~gbooker/AS400/arch.htm|title=Notes for storage research|author=David McKenzie|archive-url=https://web.archive.org/web/19991008185025/http://users.snip.net/~gbooker/AS400/arch.htm|archive-date=October 8, 1999|url-status=dead}}</ref> In 1991, the company introduced a new version of the system running on a series of [[64-bit computing|64-bit]] [[PowerPC]]-derived CPUs, the [[IBM RS64]] family.<ref name="Soltis PowerPC">{{cite web | author=Soltis, Frank G. | title=When Is PowerPC Not PowerPC? | work=The 400 Squadron | url=http://www.the400squadron.com/amug/200406/NotPowerPC.htm | archive-url=https://web.archive.org/web/20080108195918/http://www.the400squadron.com/amug/200406/NotPowerPC.htm | archive-date=January 8, 2008 | url-status=dead }}</ref> Due to the use of TIMI, applications for the original CISC-based programs continued to run on the new systems without modification, as the TIMI code can be re-translated to the new systems' PowerPC [[Power ISA]] native machine code. The RS64 was replaced with [[POWER4]] processors in 2001, which was followed by [[POWER5]] and [[POWER6]] in later upgrades.

The AS/400 went through multiple re-branding exercises, finally becoming the '''System i''' in 2006. In 2008, IBM consolidated the separate System i and [[System p]] product lines (which had mostly identical hardware by that point)<ref name="system-p-i">{{cite web|url=https://www.itjungle.com/2008/03/17/tfh031708-story01/|title=Bye Bye System p and i, Hello Power Systems|date=2008-04-07|author=Timothy Prickett-Morgan|access-date=2021-10-09|website=IT Jungle}}</ref> into a single product line named [[IBM Power Systems]].<ref name="Niccolai">{{cite web|title=IBM merges System i and System p server lines|url=https://www.infoworld.com/article/2649318/ibm-merges-system-i-and-system-p-server-lines.html|last=Niccolai|first=James|date=April 2, 2008|website=[[InfoWorld]]|url-access=limited}}</ref><ref>{{cite web|url=https://www.itjungle.com/2008/04/07/tfh040708-story01/|title=It's Official: Now We're Power Systems and i for Business|author=Timothy Prickett Morgan|date=2008-04-07|access-date=2021-03-15|website=itjungle.com}}</ref> The name "AS/400" is sometimes used informally to refer to the [[IBM i]] operating system running on modern Power Systems hardware.<ref>{{cite web|url=https://www.itjungle.com/2017/07/17/course-not-as400/|title=Of Course i's Not The AS/400|author=Alex Woodie|website=IT Jungle|date=2017-07-17|access-date=2021-11-22}}</ref>

== History ==

=== Fort Knox ===
[[File:IBM AS-400 9404-B10.jpg|thumb|right|upright|IBM AS/400 9404-B10 with a [[IBM 5250|5281]] terminal]]
In the early 1980s, IBM management became concerned that IBM's large number of incompatible [[midrange computer]] systems was hurting the company's competitiveness, particularly against [[Digital Equipment Corporation]]'s [[VAX]].<ref>{{cite book|title=The Silverlake Project: Transformation at IBM|author1=Roy A. Bauer|author2=Emilio Collar|author3=Victor Tang|year=1992|publisher=Oxford University Press|isbn=9780195067545}}</ref> In 1982, a project named ''Fort Knox'' commenced, which was intended to consolidate the [[System/36]], the [[System/38]], the [[IBM 8100]], the [[Series/1]] and the [[IBM 4300]] series into a single product line based around an [[IBM 801]]-based processor codenamed ''Iliad'', while retaining backwards compatibility with all the systems it was intended to replace.{{sfnp|Soltis|1997|p={{pn|date=March 2022}}}} A new operating system would be created for Fort Knox, but the operating systems of each platform which Fort Knox was intended to replace would also be ported to the Iliad processor to allow customers to migrate their software to the new platform.

The Fort Knox project proved to be overly ambitious and ran into multiple delays and changes of scope. As the project advanced, the requirement to support IBM 8100 and Series/1 software was dropped.<ref name="schleicher-interview" /> When IBM's engineers attempted to port the operating systems and software of their existing platforms, they discovered that it would be impossible without making extensive changes to the Iliad processor for each individual operating system — changes that Iliad's architects were unwilling to make.{{sfnp|Soltis|1997|p={{pn|date=March 2022}}}} The proposed solution to this was to augment Iliad with operating system-specific co-processors that provided hardware support for a single operating system. However, the amount of logic needed in each co-processor grew until the co-processors became the main processor, and the Iliad was relegated to the role of a support processor — thus failing the goal of consolidating on a single processor architecture. The Fort Knox project was ultimately cancelled in 1985.

[[File:IBM AS-400 9406-720.jpg|thumb|right|IBM AS/400]]
[[Image:IBM eServer i5 570.jpg|thumb|right|IBM System i 570 server (as of 2006).]]

=== Silverlake ===
During the Fort Knox project, a [[skunkworks project]] was started at [[IBM Rochester]] by engineers who believed that Fort Knox's failure was inevitable. These engineers developed code that allowed System/36 applications to run on top of the System/38,<ref name="schleicher-interview" /> and when Fort Knox was cancelled, this skunkworks project evolved into an official project to replace both the System/36 and System/38 with a single new hardware platform.{{sfnp|Soltis|2001|p={{pn|date=October 2023}}}} The project became known as ''Silverlake'' (named for [[Silver Lake (Rochester, Minnesota)|Silver Lake in Rochester, Minnesota]]) and officially began in December 1985.<ref>{{cite web|website=helpsystems.com |url=https://www.helpsystems.com/blog/happy-30th-anniversary-ibm-i|title=Happy 30th Anniversary, IBM i! |author=Tom Huntington|date=2018-06-21 |access-date=2021-03-05|archive-date=2021-04-20 |archive-url=https://web.archive.org/web/20210420033243/https://www.helpsystems.com/blog/happy-30th-anniversary-ibm-i|url-status=dead}}</ref> The Silverlake hardware was essentially an evolution of the System/38 that reused some of the technology developed for the Fort Knox project.<ref name="schleicher-interview"/><ref>{{cite web|url=https://wiki.midrange.com/index.php/Silverlake |title=Silverlake |website=wiki.midrange.com |date=2006-08-21|access-date=2021-03-06}}</ref>

Silverlake's goal was to deliver a replacement for the System/36 and System/38 in as short a timeframe as possible, as the Fort Knox project had stalled new product development at Rochester, leaving IBM without a competitive midrange system.<ref name="brave-new-world">{{cite web |url=https://www.postbulletin.com/the-brave-new-world-of-ibm-rochester-by-eric-j/article_dca93382-06b2-5f8a-8c4a-a42b58334432.html|title=The brave new world of IBM Rochester |author=Eric J. Wieffering |date=1992-05-23|website=postbulletin.com|access-date=2021-03-06}}</ref> On its launch in 1986, the System/370-compatible [[IBM 9370]] was positioned as IBM's preferred midrange platform, but failed to achieve the commercial success IBM hoped it would have.{{sfnp|Soltis|1997|p={{pn|date=March 2022}}}}<ref>{{cite news |url=https://www.chicagotribune.com/news/ct-xpm-1988-06-20-8801090224-story.html|title=NEW IBM MIDRANGE TO DEBUT |author=Christine Winter |date=1988-06-20|newspaper=[[Chicago Tribune]]}}</ref> Much like Silverlake, the 9370 also reused the co-processor developed during the Fort Knox project as its main processor and the same SPD I/O bus that was derived from the [[Series/1]] bus.{{sfnp|Soltis|1997|p={{pn|date=March 2022}}}}

=== AS/400 ===
On June 21, 1988, IBM officially announced the Silverlake system as the ''Application System/400'' (AS/400). The announcement included more than 1,000 software packages written for it by IBM and IBM Business Partners.<ref>{{cite web |last1=IBM |title=IBM AS/400 |url=https://www.ibm.com/ibm/history/exhibits/rochester/rochester_4010.html |website=IBM |date=23 January 2003 |publisher=International Business Machines Corporation |access-date=19 March 2022}}</ref> The AS/400 operating system was named ''Operating System/400'' (OS/400).<ref name="schleicher-interview">{{cite interview |last=Schleicher|first=David L.|date=2006-01-24 |interviewer=Arthur L. Norberg |url=https://conservancy.umn.edu/bitstream/handle/11299/107623/oh381ds.pdf |archive-url=https://ghostarchive.org/archive/20221009/https://conservancy.umn.edu/bitstream/handle/11299/107623/oh381ds.pdf |archive-date=2022-10-09 |url-status=live|publisher=Charles Babbage Institute |title=An Interview with DAVID L. SCHLEICHER |website=conservancy.umn.edu|access-date=2021-03-05}}</ref>

The creators of the AS/400 originally planned to use the name ''System/40'', but IBM had adopted a new product nomenclature around the same time, which led to the Application System/400 name.{{sfnp|Soltis|2001|p={{pn|date=October 2023}}}}  First, IBM began prefixing "System" in product names with words to indicate the intended use or target market of the system (e.g., [[Personal System/2]] and [[Enterprise System/9000]]). Second, IBM decided to reserve one- and two-digit model numbers for personal systems (e.g., [[PS/2]] and [[PS/55]]), three-digit numbers for midrange systems (e.g., AS/400) and four-digit numbers for mainframes (e.g., [[ES/9000]]). The reassignment of two-digit model numbers from midrange systems to personal systems was to prevent the personal systems from running out of single-digit numbers for new products.

=== The move to PowerPC ===
{{See also|IBM RS64#History}}

In 1990, IBM Rochester began work to replace the AS/400's original System/38-derived [[48-bit computing|48-bit]] [[complex instruction set computer|CISC]] processors with a 96-bit architecture known as ''C-RISC'' (Commercial [[RISC]]).{{sfnp|Soltis|1997|p={{pn|date=March 2022}}}} Rather than being a clean-slate design, C-RISC would have added RISC-style and [[VLIW]]-style instructions to the AS/400's processor, while maintaining backwards compatibility with the [[System/370]]-style ''Internal Microprogrammed Interface'' (IMPI) instruction set and the [[microcode]] used to implement it.

In 1991, at the request of IBM president [[Jack Kuehler]], a team under the leadership of [[Frank Soltis]] delivered a proposal to adapt the [[64-bit computing|64-bit]] [[PowerPC]] architecture to support the needs of the AS/400 platform.<ref>{{cite book|author1=John Paul Shen|author2=Mikko H. Lipasti|title=Modern Processor Design: Fundamentals of Superscalar Processors|url=https://books.google.com/books?id=ffQqAAAAQBAJ|date=30 July 2013|publisher=Waveland Press |isbn=978-1-4786-1076-2}}</ref> Their extensions to the PowerPC architecture, known as ''Amazon'' (and later as ''PowerPC AS''), were approved by IBM management instead of the C-RISC design for development into the next AS/400 processor architecture.<ref>{{cite magazine|title=Inside the PowerPC AS |url=http://iprodeveloper.com/systems-management/inside-powerpc |date=July 1, 1995 |author1=Adam T. Stallman|author2=Frank G. Soltis |magazine=System iNEWS Magazine|archive-url=https://web.archive.org/web/20130831203807/http://iprodeveloper.com/systems-management/inside-powerpc |archive-date=August 31, 2013}}</ref> These extensions include support for tagged memory,<ref>{{cite web |last=Landau |first=Hugo |url=https://www.devever.net/~hl/ppcas|title=The PowerPC AS Tagged Memory Extensions}}</ref> as well as assistance for decimal arithmetic.<ref>{{cite newsgroup|last=McKenzie |first=Dave |url=https://groups.google.com/g/comp.arch/c/TgbBBxCdK0E/m/HlmFfkymuPcJ|title=Re: Packed decimals |date=December 5, 2000|message-id=fopr2tg596q0s28ibma1bkj05skcdldct8@4ax.com |newsgroup=comp.arch}}</ref>

IBM initially attempted to create a single PowerPC implementation for both AS/400 and high-end RS/6000 systems known as ''Belatrix''.{{sfnp|Soltis|1997|p={{pn|date=March 2022}}}} The Belatrix project proved to be too ambitious, and was cancelled when it became apparent that it would not deliver on schedule. Instead, a pair of AS/400-specific processors were designed at IBM Endicott and IBM Rochester, known as ''Cobra'' (for low end systems) and ''Muskie'' (for high end systems) respectively. These became the initial implementations of the [[IBM RS64]] processor line. The RS64 series continued to be developed as a separate product line at IBM until the [[POWER4]] merged both the RS64 and POWER product lines together.{{sfnp|Soltis|2001|p={{pn|date=October 2023}}}}

Despite the move from IMPI to an entirely different processor architecture, the AS/400's [[IBM i#TIMI|Technology Independent Machine Interface]] (TIMI) mostly hid the changes from users and applications, and transparently recompiled applications for the new processor architecture.<ref name="as400-technical-introduction" /> The port of OS/400 to the PowerPC AS architecture required a rewrite of most of the code below the TIMI due to the use of IMPI microcode to implement significant quantities of the operating system's low level code.{{sfnp|Soltis|2001|p={{pn|date=October 2023}}}} This led to the creation of the System Licensed Internal Code (SLIC) - a new implementation of the lower levels of the operating system mostly written in [[C++]].

=== Rebranding ===
The AS/400 family line was rebranded several times in the 1990s and 2000s as IBM introduced newer generations of hardware and operating system.<ref name="as400-technical-introduction">{{cite web |author=Tom Van Looy|date=January 2009 |title=The IBM AS/400: A technical introduction |website=scss.tcd.ie |url=https://www.scss.tcd.ie/SCSSTreasuresCatalog/hardware/TCD-SCSS-T.20121208.068/IBM-AS400-technical-introduction.pdf |archive-url=https://ghostarchive.org/archive/20221009/https://www.scss.tcd.ie/SCSSTreasuresCatalog/hardware/TCD-SCSS-T.20121208.068/IBM-AS400-technical-introduction.pdf |archive-date=2022-10-09 |url-status=live |access-date=2021-03-13}}</ref> 

In 1994, the ''AS/400 Advanced Series'' name was used for new models, followed by the rebranding of the product line to ''AS/400e'' (the ''e'' standing for [[Online business|e-business]]) in 1997.{{sfnp|Soltis|2001|p={{pn|date=October 2023}}}}

In 2000, the ''eServer iSeries'' was introduced as part of its ''[[IBM eServer|eServer]] branding initiative''.<ref>{{cite web|title=IBM eServer iSeries 400|url=https://www-01.ibm.com/common/ssi/rep_ca/9/897/ENUS100-309/index.html|date=October 3, 2000|publisher=IBM}}</ref> The eServer iSeries was built on the [[POWER4]] processor from the RS64 processors used by previous generations, meaning that the same processors were used in both the iSeries and [[pSeries]] platforms, the latter of which ran [[AIX]].

In 2004, ''eServer i5'' (along with OS/400 becoming ''i5/OS'') the ''5'' signifying the use of [[POWER5]] processors, was introduced, replacing the eServer iSeries brand.<ref>{{cite web|author=Denny Insell |url=https://www.gateway400.org/documents/Gateway400/Handouts/2004%20IBM%20eServer%20i5%20Exec%20Overview%2009-09-2004%20St%20Louis%20MOL.pdf |url-status=live |access-date=2021-03-14 |archive-url=https://ghostarchive.org/archive/20221009/https://www.gateway400.org/documents/Gateway400/Handouts/2004%20IBM%20eServer%20i5%20Exec%20Overview%2009-09-2004%20St%20Louis%20MOL.pdf |archive-date=2022-10-09 |title=Introducing IBM eServer i5 & i5/OS|publisher=IBM|date=2004}}</ref>  Successive generations of iSeries and pSeries hardware converged until they were essentially the same hardware sold under different names and with different operating systems.<ref name="system-p-i" /> Some i5 servers were still using the AS/400-specific IBM Machine Type (MT/M 9406-520) and were able to run AIX in a [[logical partition]] along i5/OS, while the p5 servers were able to run i5/OS, respectively. The licensing for AIX and i5/OS was controlled in the firmware by the POWER hypervisor.

The final rebranding occurred in 2006, when IBM rebranded the eServer i5 to ''System i''.<ref>{{cite web |author=Alex Woodie|date=2017-10-11 |url=https://www.itjungle.com/2017/10/11/ibm-slow-catch-mean/ |title=IBM i Slow to Catch On, But What Does It Mean?|access-date=2021-03-15 |website=itjungle.com}}</ref>

In April 2008, IBM introduced the [[IBM Power Systems]] line, which was a convergence of System i and System p product lines.<ref name="Niccolai"/> The first Power Systems machines used the [[POWER6]] processors; i5/OS was renamed as ''IBM i'' in order to remove the association with POWER5 processors.<ref>{{cite web|title=IBM Introduces the First in a New Generation of Power Systems|url=https://www-03.ibm.com/press/us/en/pressrelease/23795.wss |archive-url=https://web.archive.org/web/20080511231914/http://www-03.ibm.com/press/us/en/pressrelease/23795.wss |url-status=dead |archive-date=May 11, 2008 |date=2008-04-02|access-date=2021-03-15 |publisher=IBM}}</ref> IBM i is sold as one of the operating system options for Power Systems (along with AIX and Linux) instead of being tied to its own hardware platform.

=== Legacy ===
Although announced in 1988, the AS/400 remains IBM's most recent major architectural shift that was developed wholly internally{{nosource|date=May 2024}}. After the departure of CEO [[John Akers]] in 1993, when IBM looked likely to be split up, [[Bill Gates]] commented that the only part of IBM that Microsoft would be interested in was the AS/400 division. (At the time, many of Microsoft's business and financial systems ran on the AS/400 platform, rumored as ending around 1999 with the introduction of [[Windows 2000]].<ref>{{cite web |author=Microsoft TechNet |url=https://groups.google.com/forum/#!msg/comp.sys.ibm.as400.misc/D8i3fBO1t1Q/uA7O-sncl-QJ |title=AS/400s extinct at Microsoft since 1999 |work=Google discussion group, Microsoft runs AS/400's in-house - Article? |access-date=2007-05-16}}</ref><ref>{{cite web |url=https://technet.microsoft.com/fr-fr/library/bb967337.aspx |title=Disparition des systèmes AS/400 chez Microsoft depuis mai 1999 | access-date=2013-01-02 |archive-url=https://web.archive.org/web/20121106083645/http://technet.microsoft.com/fr-fr/library/bb967337.aspx |archive-date=2012-11-06 |url-status=dead}}</ref><ref>{{cite web |url=http://iseriespriest.blogspot.com/2006/03/microsoft-uses-iseries-to-run-its.html |title=Microsoft Uses the iSeries to Run its Business |work=Blogspot, Confessions of An iSeries Priest |date=5 March 2006 |access-date=2006-03-05}}</ref>)

== System architecture ==
According to [[Frank Soltis]], one of the architects of the AS/400 platform, the AS/400's architecture is defined by five architectural principles. Most of these principles are inherited from System/38.{{sfnp|Soltis|2001|p=1–5, 97–177}}

=== Technology Independence ===
[[File:IBM AS-400e Model 150 (cropped).jpg |upright=0.6|thumb|right|IBM AS/400e Model 150.]]

The high-level [[instruction set]] (called TIMI for "Technology Independent Machine Interface" by IBM) allows [[application program]]s to take advantage of advances in hardware and software without recompilation. TIMI is a [[p-code machine|virtual instruction set]] independent of the underlying machine instruction set of the CPU. User-mode programs contain both TIMI instructions and the machine instructions of the CPU, thus ensuring hardware independence. This is conceptually somewhat similar to the [[virtual machine]] architecture of programming environments such as [[Java (programming language)|Java]] and [[.NET Framework|.NET]].

Unlike some other virtual-machine architectures in which the virtual instructions are interpreted at [[Run time (program lifecycle phase)|run time]], TIMI instructions are never interpreted. They constitute an intermediate [[compile time]] step and are [[binary translation|translated into the processor's instruction set]] as the final compilation step. The TIMI instructions are stored within the final program object, in addition to the executable machine instructions. This is how application objects compiled on one processor family (e.g., the original [[Complex instruction set computer|CISC]] AS/400 48-bit processors) could be moved to a new processor (e.g., [[PowerPC]] 64-bit) without re-compilation. An application saved from the older 48-bit platform can simply be restored onto the new 64-bit platform where the operating system discards the old machine instructions and re-translates the TIMI instructions into 64-bit instructions for the new processor.

The system's instruction set defines all pointers as 128-bit. This was the original design feature of the [[IBM System/38|System/38]] (S/38) in the mid-1970s planning for future use of faster processors, memory, and an expanded address space. The original AS/400 CISC models used the same 48-bit address space as the S/38. The address space was expanded in 1995 when the [[RISC]] [[PowerPC]] [[RS64]] 64-bit CPU processor replaced the 48-bit CISC processor.

=== Software integration ===
{{Main|IBM i}}

OS/400 (now known as IBM i) is the native operating system of the AS/400 platform and was the sole operating system supported on the original AS/400 hardware. Many of the advanced features associated with the AS/400 are implemented in the operating system as opposed to the underlying hardware, which changed significantly throughout the life of the AS/400 platform. Features include a [[Relational database management system|RDBMS]] ([[Db2 for i]]), a menu-driven interface, support for multiple users, [[block-oriented terminal]] support ([[IBM 5250]]), and printers.

=== Object-based design ===
Unlike the "[[everything is a file]]" principle of [[Unix]] and [[Unix-like|its derivatives]], on IBM i everything is an object (with built-in persistence and garbage collection).{{citation needed|date=January 2024}}

=== Single-level store ===
IBM uses a [[single-level store]] virtual memory architecture in the AS/400 platform. For 64-bit PowerPC processors, the virtual address resides in the rightmost 64 bits of a pointer while it was 48 bits in the S/38 and CISC AS/400. The 64-bit address space references main memory and disk as a single address set, which is the single-level store concept.

=== Hardware integration ===
Later generations of hardware are also capable of supporting various guest operating systems, including [[System Support Program|SSP]], [[IBM AIX|AIX]], [[Linux]], [[Microsoft]] [[Windows 2000]], and [[Windows Server 2003]]. While OS/400, AIX, and Linux are supported on the POWER processors on [[Logical partition (virtual computing platform)|LPARs (logical partitions)]], Windows is supported with either single-processor internal blade servers (IXS) or externally linked multiple-processor servers (IXA and iSCSI). SSP guests were supported using emulation from OS/400 V3R6 through V4R4 using the Advanced 36 Machine facility of the operating system, a feature distinct from the System/36 Environment compatibility layer, which requires System/36 software to be recompiled.

== Hardware ==

=== CPUs ===
{| class="wikitable"
 !CPU
 !Year
 !Clock Speed
!
!Server-Models
|-
 |IMPI{{refn|group=note|There were at least two generations of IMPI processors, the second was released in 1991.<ref name="as400-processor-architecture">{{cite conference|last1=Schmierer|first1=Q.G.|last2=Wottreng|first2=A.H.|title=&#91;1991 Proceedings&#93; IEEE International Conference on Computer Design: VLSI in Computers and Processors |chapter=IBM AS/400 processor architecture and design methodology|year=1991|conference=IEEE International Conference on Computer Design: VLSI in Computers and Processors|pages=440–443|doi=10.1109/ICCD.1991.139942|isbn=0-8186-2270-9 }}</ref>}}
 | 1988
 | > 22 MHz{{refn|group=note|''"The processor clock cycle is 45 ns worst case."''<ref name="as400-processor-architecture" />}}
 | rowspan="5" {{Version|c|AS/400|show=}}
| Bxx, Cxx, Dxx, Exx, Fxx, Pxx, 100, 135, 140, 2xx, 3xx<ref>{{cite web|url=http://www.hen-sch.de/books/AS400%20System%20Handbook%20V4R4M0.pdf |archive-url=https://ghostarchive.org/archive/20221009/http://www.hen-sch.de/books/AS400%20System%20Handbook%20V4R4M0.pdf |archive-date=2022-10-09 |url-status=live|title=AS/400e System Handbook|publisher=IBM|date=1999-08-03|access-date=2021-03-21}}</ref> 
 |-
 |[[IBM RS64#Cobra and Muskie|Cobra (A10)]]
 | 1995
 |55 or 75&nbsp;MHz
|4xx, 5xx
 |-
 |[[IBM RS64#Cobra and Muskie|Muskie (A25/A30)]]
 | 1996
 |125 or 154&nbsp;MHz
|53x
 |-
 |[[IBM RS64#RS64|Apache]] (RS64) (A35)
 | 1997
 |125&nbsp;MHz
|6xx, 150
 |-
 |[[IBM RS64#RS64-II|NorthStar]] (RS64 II)
 | 1998
 |200, 255 or 262&nbsp;MHz
|170, 250, 7xx, 650, S40, SB1<ref name="NorthStar">{{cite web | author=IBM.com | title=V4R3 Questions and Answers | work=Reference # 8625668200695613 | url=http://www-1.ibm.com/support/docview.wss?rs=0&context=SWG60&dc=DB520&dc=D900&dc=D800&dc=DA900&dc=DA800&q1=v4r2+odbc+AND+AS400KBXXYYZZRCH&uid=nas18bc661f3c0132fee8625668200695613&loc=en_US&cs=UTF-8&lang=all | access-date=2007-04-04 }}{{dead link|date=November 2017 |bot=InternetArchiveBot |fix-attempted=yes }}</ref>
 |-
 |[[IBM RS64#RS64-III|Pulsar]] (RS64 III)
 | 1999
 |450&nbsp;MHz
 | rowspan="8" {{Version|p|iSeries;{{Clear}}System i|show=}}
|270, 820
 |-
 |[[IBM RS64#RS64-III|IStar]] (RS64 III upgraded)
 | 2000
 |400, 500, 540 or 600&nbsp;MHz
|820, 830, 840,<ref>{{Cite web|url=https://www-01.ibm.com/common/ssi/ShowDoc.wss?docURL=/common/ssi/rep_sm/5/897/ENUS9406-_h05/index.html&request_locale=en|title=Family 9406+05 IBM eServer iSeries Models 820, 830, and 840|date=12 May 2020}}</ref> SB2, SB3<ref>{{Cite web|date=2000-06-12|title=IBM AS/400E MIDDLE-TIER SERVERS...FOR EXTREME BUSINESS|url=https://www.ibm.com/common/ssi/rep_ca/8/897/ENUS100-178/index.html|access-date=2021-11-29|website=www.ibm.com|language=en-US}}</ref>
 |-
 |[[IBM RS64#RS64-IV|SStar]] (RS64 IV)
 | 2000
 |540, 600 or 750&nbsp;MHz
|270, 800, 810, 820, 830, 840
 |-
 |[[POWER4]]
 | 2001
 |1.1 or 1.3&nbsp;GHz
|890
 |-
 |[[POWER4|POWER4+]]
 | 2003
 |1.9&nbsp;GHz
|825, 870
 |-
 |[[POWER5]]
 | 2004
 |1.5 or 1.9&nbsp;GHz
|i5-520; i5-550; i5-570; i5-595
 |-
 |[[POWER5|POWER5+]]
 | 2005
 |1.5&nbsp;GHz (2005)<br />1.9&nbsp;GHz (2005)<br />2.2&nbsp;GHz<br />2.3&nbsp;GHz
|i5-520, i5-550, i5-515, i5-525<br />i5-570
 |-
 |[[POWER6]]
 | 2007
 |3.5&nbsp;GHz<br />4.2&nbsp;GHz<br />4.7&nbsp;GHz
|[[BladeCenter]] JS12, JS22<br />i5-570 (MMA)<br />M50, M25 & M15
 |}

{{reflist|group=note}}

=== System models ===
{| class="wikitable sortable"
 !width=50%|Model
 !Year
 !CPU Group
 !Base - [[Commercial Processing Workload|CPW]]
 |-
 |B10, B20, B30, B35, B40, B45, B50, B60, B70
 |1988-1989
 |P10, P20
 |2,9 - 20

 |-
 |C04, C06, C10, C20, C25
 |1990
 |P10
 |3,1 - 6,1

 |-
 |D02, D04, D06, D10, D20, D25, D35, D45, D50, D60, D70, D80
 |1991
 |P10, P20, P30
 |3,8 - 56,6

 |-
 |E02, E04, E06, E10, E20, E25, E35, E45, E50, E60, E70, E80, E90, E95
 |1992
 |P10, P20, P30, P40
 |4,5 - 116,6
 
 |-
 |F02, F04, F06, F10, F20, F25, F35, F45, F50, F60, F70, F80, F90, F95, F97
 |1993
 |P05, P10, P20, P30, P40
 |5,5 - 177,4

 |-
 |P01, P02, P03
 |1993-1995
 |P05
 |7,3 - 16,8
 
 |-
 |150
 |1996
 |P05
 |10,9 - 35,0

 |-
 |S10, S20, S30, S40
 |1997
 |P05, P10, P20, P30, P40, P50
 |45,4 - 4550

 |-
 |SB1, SB2, SB3
 |1997-2000
 |P30, P40
 |1794 - 16500

 |-
 |10S, 100, 135, 140
 |1993-1995
 |P05, P10, P20
 |17,1 - 65,6

 |-
 |170
 |1998
 |P05, P10, P20
 |30 - 1090

 |-
 |200, 20S, 236
 |1994
 |P05, P10
 |7,3 - 17,1

 |-
 |250
 |2000
 |P05
 |50 - 75

 |-
 |270
 |2000
 |P05, P10, P20
 |50 - 2350

 |-
 |300, 30S, 310
 |1994
 |P10, P20, P30, P40
 |11,6 - 177,4

 |-
 |400, 40S, 436
 |1995
 |P05, P10
 |13,8 - 91,0

 |-
 |500, 50S, 510, 530, 53S
 |1995
 |P10, P20, P30, P40
 |18,7 - 650
 
 |-
 |600, 620, 640, 650
 |1997
 |P05, P10, P20, P30, P40, P50
 |22,7 - 4550

 |-
 |720
 |1999
 |P10, P20, P30
 |240 - 1600

 |-
 |730
 |1999
 |P20, P30, P40
 |560 - 2890

 |-
 |740
 |1999
 |P40, P50
 |3660 - 4550

 |-
 |800
 |2003
 |P05, P10
 |300 - 950

 |-
 |810
 |2003
 |P10, P20
 |750 - 2700

 |-
 |820
 |2000-2001
 |P05, P10, P20, P30, P40
 |100 - 3700

 |-
 |825
 |2003
 |P30
 |3600 - 6600

 |-
 |830
 |2000-2002
 |P20, P30, P40, P50
 |1850 - 7350

 |-
 |840
 |2000-2002
 |P40, P50
 |10000 - 20200

 |-
 |870
 |2002
 |P40, P50
 |7700 - 20000

 |-
 |890
 |2002
 |P50, P60
 |20000 - 37400

 |-
 |520
 |2004-2006 
 |P05, P10, P20
 |500 - 7100

 |-
 |550
 |2004-2006
 |P20
 |3300 - 14000

 |-
 |570
 |2004-2006
 |P30, P40
 |3300 - 58500

 |-
 |595
 |2004-2006
 |P50, P60
 |24500 - 216000

 |-
 |515
 |2007
 |P05
 |3800 - 7100

 |-
 |525
 |2007
 |P10
 |3800 - 7100
 
|-
 |570
 |2007
 |P40
 |16700 - 58500
|-
 |MMA (9406)
 |2007
 |P30
 |5500 - 76900
|-
 |M15
 |2008
 |P05
 |4300
|-
 |M25
 |2008
 |P10
 |4300 - 8300
|-
 |M50
 |2008
 |P20
 |4800 - 18000
|-
 |MMA
 |2008
 |P30
 |8150 - 76900
|-
 |JS12
 |2008
 |P05
 |7100
|-
 |JS22
 |2008
 |P10
 |13800
|-
 |JS23
 |2008
 |
 |
|-
 |JS43
 |2008
 |
 |
|-
 |570 (9117)
 |2008
 |P30
 |104800
|-
 |595 (9119)
 |2008
 |P60
 |294700
 |}

==See also==

{{Commons category|IBM AS/400}}
{{Commons category|IBM System i}}

{{s-start}}
{{s-bef|before=[[IBM RS/6000]]}}
{{s-ttl|title=[[IBM System p]]|years=2000 - 2008}}
{| class="wikitable" style = "text-align: {{{align|center}}}; font-size: 85%;"
|'''[[eServer]] pSeries'''{{Clear}}2000
|'''[[eServer]] p5'''{{Clear}}2004
|'''System p5'''{{Clear}}2005
|'''System p'''{{Clear}}2007
|}
{{s-aft|rows=2|after=[[IBM Power Systems]]}}
{{s-bef|before=[[IBM System/36]]{{Clear}}[[IBM System/38]]}}
{{s-ttl|title=IBM AS/400|years=1988 - 2008}}
{| class="wikitable" style = "text-align: {{{align|center}}}; font-size: 65%;"
|colspan=2 |[[Advanced/36]], AS/Entry
|colspan=4 |-
|-
|'''AS/400'''{{Clear}}1988
|'''AS/400e'''{{Clear}}1997
|'''[[eServer]] iSeries'''{{Clear}}2000
|'''[[eServer]] i5'''{{Clear}}2004
|'''System i5'''{{Clear}}2005
|'''System i'''{{Clear}}2006
|}
{{s-end}}

==Notes==
{{notelist}}

==References==
{{Reflist|35em}}
* {{cite book |last=Soltis |first=Frank |year=1997 |title=Inside the AS/400 - Featuring the AS400e series |publisher=Duke Press |isbn=978-1-882419-66-1 |edition=2nd |url=https://books.google.com/books?id=5DoPAAAACAAJ}}
* {{cite book |last=Soltis |first=Frank |year=2001 |title=Fortress Rochester: the Inside Story of the IBM iSeries |isbn=978-1583040836|publisher=29th Street Press |url=https://books.google.com/books?id=ypJmzqt7JdUC}}

==External links==
* {{web archive|url=https://web.archive.org/web/20000302140252/http://www.as400.ibm.com/|title=Official website}}
*[https://www.ibm.com/it-infrastructure/power IBM's Power Systems product page]
*{{cite web
 | title       = IBM System i models
 | date        = 2021-03-04
 | website     = All products / POWER5
 | url         = https://www.ibm.com/docs/en/power5?topic=information-system-system-i5-eserver-i5-iseries-as400
 | publisher   = [[IBM]]
 | access-date = February 26, 2025
 }}
*IBM Archives: {{webarchive |url=https://web.archive.org/web/20060503190444/http://www-03.ibm.com/ibm/history/documents/pdf/as400.pdf |date=2006-05-03 |title=A Brief History of the IBM AS/400 and iSeries}}
* [https://bitsavers.org/pdf/ibm/as400/GA19-5486-14_AS400_System_Handbook_V3R7_199607.pdf AS/400 Advanced Series Handbook] (PDF)
*{{webarchive |url=https://web.archive.org/web/20160303232247/https://www.ibm.com/developerworks/community/files/basic/anonymous/api/library/7cd1e29f-0699-4929-a741-516ce47295a8/document/745425bf-c00a-4a8d-bd8f-1f8e14ef9e65/media |date=2016-03-03 |title=The IBM AS400 A technical introduction}}

{{IBM midrange computers}}
{{Authority control}}

[[Category:AS/400]]
[[Category:IBM server computers|System i]]
[[Category:Computer-related introductions in 1988]]
[[Category:48-bit computers]]
[[Category:64-bit computers]]