Editing ILLIAC II

{{Short description|Supercomputer built by the University of Illinois in 1962.}}
{{Refimprove|date=December 2010}}
[[File:Illiac II Modules.jpg|thumb|ILLIAC II Modules in April 2005.  Liam W. Gillies (grandson of Donald B. Gillies) shows off 8 circuit modules.]]
[[File:Illiac II Control Panel.jpg|thumb|upright|ILLIAC II Control Panel in April 2005]]
The '''ILLIAC II''' was a revolutionary super-computer built by the [[University of Illinois Urbana–Champaign|University of Illinois]] that became operational in 1962.

== Description ==
The concept, proposed in 1958, pioneered [[Emitter-coupled logic]] (ECL) circuitry, pipelining, and transistor memory with a design goal of 100x speedup compared to [[ILLIAC I]].

ILLIAC II had 8192 words of [[core memory]], backed up by 65,536 words of storage on [[magnetic drum]]s. The core memory access time was 1.8 to 2 μs. The magnetic drum access time was 8.5ms.<ref>{{Citation
 | last = Brearley
 | first = H.C.
 | title = ILLIAC II – A short Description and Annotated Bibliography
 | journal = IEEE Transactions on Electronic Computers
 | pages = 399–401
 | year = 1965
 | issue = 3
 | publisher = IEEE
 | doi = 10.1109/PGEC.1965.264146
 | url = http://www.textfiles.com/bitsavers/pdf/univOfIllinoisUrbana/illiac/ILLIAC_II/Brearley_ILLIAC_II_A_Short_Description_and_Annotated_Bibliography_Jun65.pdf
 | archive-url=https://web.archive.org/web/20211116101108/http://www.textfiles.com/bitsavers/pdf/univOfIllinoisUrbana/illiac/ILLIAC_II/Brearley_ILLIAC_II_A_Short_Description_and_Annotated_Bibliography_Jun65.pdf
 | archive-date = 2021-11-16
}}</ref>  A "fast buffer" was also provided for storage of short loops and intermediate results (similar in concept to what is now called [[cache (computing)|cache]]). The "fast buffer" access time was 0.25 μs.

The word size was 52 bits.

[[Floating-point]] numbers used a format with seven bits of exponent (power of 4) and 45 bits of mantissa.

[[instruction set|Instructions]] were either 26 bits or 13 bits long, allowing packing of up to four instructions per memory word.

Rather than naming the pipeline stages, "Fetch, Decode, and Execute" (as on [[IBM 7030 Stretch|Stretch]]), the pipelined stages were named, "Advanced Control, Delayed Control, and Interplay".

== Innovation ==
* The ILLIAC II was one of the first [[Transistor computer|transistorized computers]]. Like the IBM [[IBM 7030 Stretch|Stretch]] computer, ILLIAC II was designed using "future transistors" that had not yet been invented.
* The ILLIAC II project was proposed before, and competed with IBM's Stretch project, and several ILLIAC designers felt that Stretch borrowed many of its ideas from ILLIAC II, whose design and documentation were published openly as University of Illinois Tech Reports.  Members of the ILLIAC II team jokingly referred to the competing IBM Project as "St. Retch".
* The ILLIAC II had a division unit designed by faculty member [[James E. Robertson]], a co-inventor of the [[SRT division|SRT Division algorithm]].
* The ILLIAC II was one of the first [[instruction pipelining|pipelined]] computers, along with IBM's Stretch Computer.  The pipelined control was designed by faculty member [[Donald B. Gillies]].  The pipeline stages were named Advanced Control, Delayed Control, and Interplay.
* The ILLIAC II was the first computer to incorporate [[Asynchronous circuit|Speed-Independent Circuitry]], invented by faculty member [[David E. Muller]].  Speed-Independent Circuitry is a class of asynchronous digital logic based on the Muller [[C-element]].  This digital logic, being asynchronous, runs at full speed of transistor propagation and requires no clocks.

== Discoveries ==
During check-out of the ILLIAC II, before it became fully operational, faculty member [[Donald B. Gillies]] programmed ILLIAC II to search for [[Mersenne prime]] numbers.  The check-out period took roughly 3 weeks, during which the computer verified all the previous Mersenne primes and found three new prime numbers.<ref>{{cite journal|author=Gillies, Donald B. |url=https://www.jstor.org/pss/2003409 |title=Three New Mersenne Primes and a Statistical Theory| journal=Mathematics of Computation|volume=18|issue=85|date=Jan 1964|pages=93–97|doi=10.2307/2003409 |jstor=2003409 }}</ref> The results were immortalized for more than a decade on a UIUC Postal Annex cancellation stamp, and were discussed in the ''[[New York Times]]'', recorded in the ''[[Guinness Book of World Records]]'', and described in a journal paper in ''[[Mathematics of Computation]].

== End of life ==
The ILLIAC II computer was disassembled roughly a decade after its construction. By this time the hundreds of modules were obsolete scrap; many faculty members took components home to keep. Donald B. Gillies kept 12 (mostly control) modules.  His family donated 10 of these modules and the front panel to the University of Illinois CS department in 2006.  The photos in this article were taken during the time of donation.

Donald W. Gillies, the son of Donald B. Gillies, has a complete set of documentation (instruction set, design reports, research reports, and grant progress reports, roughly 2000 pages) from the ILLIAC II project. He can be contacted for further details about this computer.<ref>{{cite web | url=http://www.ece.ubc.ca/~gillies | title=Don Gillies Personal Data }}</ref> Most of this documentation should also be available as DCL technical reports in the UIUC Engineering library, although it would not be packaged as a single report.

== See also ==
* [[ORDVAC]]
* [[ILLIAC I]]
* [[ILLIAC III]]
* [[ILLIAC IV]]

== References ==
{{reflist|30em}}

== External links ==
* [http://www.bitsavers.org/pdf/univOfIllinoisUrbana/illiac/ILLIAC_II ILLIAC II documentation] at bitsavers.org

{{mainframes}}

[[Category:One-of-a-kind computers]]
[[Category:Transistorized computers]]