Editing Index register

{{Short description|CPU register used for modifying operand addresses}}
{{More citations needed|date=December 2009}}
[[File:IBM 7094 console.agr.JPG|thumb|Index register display on an [[IBM 7094]] mainframe from the early 1960s]]
An '''index register''' in a computer's [[central processing unit|CPU]] is a [[processor register]] (or an assigned memory location)<ref>{{cite book  
 |     title =  IBM 7070-7074 Principles of Operation
 |        id = GA22-7003-6
 |   section = Instructions: Index Words
 | section-url = http://bitsavers.org/pdf/ibm/7070/GA22-7003-6_7070-7074prcOps.pdf#page=11
 |      page = 11
 |      year = 1962
 |       url = http://bitsavers.org/pdf/ibm/7070/GA22-7003-6_7070-7074prcOps.pdf
 | publisher = IBM
 }}
</ref> used for pointing to [[operand]] addresses during the run of a program. It is useful for stepping through [[String (computer science)|strings]] and [[Array data structure|arrays]]. It can also be used for holding loop iterations and counters. In some [[Instruction set architecture|architectures]] it is used for read/writing blocks of memory. Depending on the architecture it may be a dedicated index register or a general-purpose register.<ref>{{Cite web |title=What Is an Index Register? (with picture) |url=http://www.easytechjunkie.com/what-is-an-index-register.htm |access-date=2022-07-24 |website=EasyTechJunkie |language=en-US}}</ref> Some [[instruction set]]s allow more than one index register to be used; in that case additional instruction fields may specify which index registers to use.<ref>IBM 709 Reference Manual, Form A22-6501-0, 1958, p. 12</ref>

Generally, the contents of an index register is added to (in some cases subtracted from) an ''immediate'' address (that can be part of the instruction itself or held in another register) to form the "effective" address of the actual data (operand). Special instructions are typically provided to test the index register and, if the test fails, increments the index register by an immediate constant and branches, typically to the start of the loop. While normally processors that allow an instruction to specify multiple index registers add the contents together, IBM had a line of computers in which the contents were or'd together.<ref>{{cite book
 |     publisher = IBM
 |      title = IBM 7094 Principles of Operation
 |         id = A22-6703-4
 |        url = http://bitsavers.org/pdf/ibm/7094/A22-6703-4_7094_PoO_Oct66.pdf
 |    version = Fifth Edition
 |       date = October 21, 1966}}</ref>

Index registers have proved useful for doing [[Array data structure|vector]]/[[Array data structure|array]] operations and in commercial data processing for navigating from field to field within records. In both uses index registers substantially reduced the amount of memory used and increased execution speed.

==History==
In early computers without any form of [[Addressing mode#Memory indirect|indirect addressing]], array operations had to be performed by [[self-modifying code|modifying]] the instruction address, which required several additional program steps and used up more computer memory,<ref>{{cite book |title=Reference Manual IBM 1401 Data Processing System |id=A24-1403-5 |date=1962 |pages=103–107 |url=http://bitsavers.org/pdf/ibm/1401/A24-1403-5_1401_Reference_Apr62.pdf |publisher=[[IBM]]}}</ref> a scarce resource in computer installations of the early era (as well as in early microcomputers two decades later).

Index registers, commonly known as B-lines in early British computers, as B-registers on some machines and as X-registers{{efn|The term X-registers was also used for accumulators on, e.g., the [[CDC 6600]].}} on others, were first used in the [[United Kingdom|British]] [[Manchester Mark 1]] computer, in 1949. In general, index registers became a standard part of computers during the technology's [[History of computing hardware|second generation]], roughly 1954&ndash;1966. Most{{efn|The [[IBM 700/7000 series#Commercial architecture (702/705/7080)|702, 705 and 7080]] did not have index registers.}} machines in the [[IBM 700/7000 series|IBM 700/7000]] [[mainframe computer|mainframe]] series had them, starting with the [[IBM 704]] in 1954, though they were optional on some smaller machines such as the [[IBM 650]] and [[IBM 1401]].

Early "small machines" with index registers include the [[AN/USQ-17]], around 1960, and the [[SDS 9 Series|9 series]] of [[real-time computing|real-time computer]]s from [[Scientific Data Systems]], from the early 1960s.

The 1962 [[UNIVAC 1107]] has 15 X-registers, four of which were also A-registers.

The 1964 [[GE-635]] has 8 dedicated X-registers; however, it also allows indexing by the instruction counter or by either half of the A or Q register.

The [[Digital Equipment Corporation]] (DEC) [[PDP-6]], introduced in 1964, and the [[IBM System/360]], announced in 1964, do not include dedicated index registers; instead, they have [[general-purpose register]]s (called "accumulators" in the PDP-6) that can contain either numerical values or addresses. The memory address of an operand is, in the PDP-6, the sum of the contents of a general-purpose register and an 18-bit offset and, on the System/360, the sum of the contents of two general-purpose registers and a 12-bit offset.<ref>{{cite book|url=http://bitsavers.org/pdf/dec/pdp6/F-65_PDP-6_Handbook_Aug64.pdf|title=Programmed Data Processor-6 Handbook|pages=20–22|publisher=[[Digital Equipment Corporation]]|date=August 1964}}</ref><ref>{{cite book|url=http://bitsavers.org/pdf/ibm/360/princOps/A22-6821-7_360PrincOpsDec67.pdf|title=IBM System/360 Principles of Operation|pages=8, 12–14|publisher=[[IBM]]|date=September 1968|edition=Eighth|id=A22-6821-7}}</ref> The compatible [[PDP-10]] line of successors to the PDP-6, and the [[IBM System/370]] and later compatible successors to the System/360, including the current [[z/Architecture]], work in the same fashion.

The 1969 [[Data General Nova]] and successor [[Data General Eclipse|Eclipse]], and 1970 DEC [[PDP-11]], [[minicomputer]]s also provided general-purpose registers (called "accumulators" in the Nova and Eclipse), rather than separate accumulators and index registers, as did their [[Data General Eclipse MV/8000|Eclipse MV]] and [[VAX]] 32-bit [[superminicomputer]] successors. In the PDP-11 and VAX, any register could be used when calculating the memory address of an operand; in the Nova, Eclipse, and Eclipse MV, only registers 2 and 3 could be used.<ref>{{cite book|url=http://bitsavers.org/pdf/dg/015-000023-03_NOVA_PgmrRefMan_Jan76.pdf|title=Programmer's Reference Manual, Nova Line Computers|pages=I{{hyp}}1, II{{hyp}}7|publisher=[[Data General]]|date=January 1976}}</ref><ref>{{cite book|url=http://bitsavers.org/pdf/dg/eclipse/015-000024-04_Eclipse_PgmrRefMan_Mar75.pdf|title=Programmer's Reference Manual, Eclipse Line Computers|pages=1{{hyp}}1,2{{hyp}}6|publisher=[[Data General]]|date=March 1975}}</ref><ref>{{cite book|url=http://bitsavers.org/pdf/dg/eclipse/014-000704-03_32-bit_Eclipse_PrincOps_Aug84.pdf|title=ECLIPSE 32-Bit Systems Principles of Operation|pages=1{{hyp}}2|publisher=[[Data General]]|date=August 1984}}</ref>

The 1971 [[CDC STAR-100]] has a register file of 256 64-bit registers, 9 of which are reserved. Unlike most computers, the STAR-100 instructions only have register fields and operand fields, so the registers serve more as pointer registers than as traditional index registers.

While the 1972 [[Intel 8008]] allowed indirect addressing via register pairs, the first [[microprocessor]] with a true index register appears to have been the 1974 [[Motorola 6800]].

In 1975, the 8-bit [[MOS Technology 6502]] processor had two index registers 'X' and 'Y'.<ref>{{Cite web |title=Registers - 6502 Assembly |url=http://www.6502.buss.hk/6502-architecture/registers |access-date=2022-07-24 |website=www.6502.buss.hk}}</ref>

In 1978, the [[Intel 8086]], the first [[x86]] processor, had eight 16-bit registers, referred to as "general-purpose", all of which can be used as integer data registers in most operations; four of them, 'SI' (source index), 'DI' (destination index), 'BX' (base), and 'BP' (base pointer), can also be used when computing the memory address of an operand, which is the sum of one of those registers and a displacement, or the sum of one of 'BX' or 'BP", one of 'SI' or 'DI', and a displacement.<ref>{{cite web|title=The 8086 Family User's Manual|pages=2{{hyp}}6,2{{hyp}}68|date=October 1979|publisher=Intel Corporation|url=http://bitsavers.org/components/intel/8086/9800722-03_The_8086_Family_Users_Manual_Oct79.pdf|access-date=March 28, 2018|archive-date=April 4, 2018|archive-url=https://web.archive.org/web/20180404223644/http://www.bitsavers.org/components/intel/8086/9800722-03_The_8086_Family_Users_Manual_Oct79.pdf|url-status=live}}</ref> The 1979 [[Intel 8088]], and the 16-bit [[Intel 80186]], [[Intel 80188]], and [[Intel 80286]] successors work the same. In 1985, the [[i386]], a 32-bit successor to those processors, introducing the [[IA-32]] 32-bit version of the x86 architecture, extended the eight 16-bit registers to 32 bits, with "E" added to the beginning of the register name; in IA-32, the memory address of an operand is the sum of one of those eight registers, one of seven of those registers (the stack pointer is not allowed as the second register here) multiplied by 1, 2, 4, or 8, and a displacement.<ref name="modern-x86">{{cite book|title=Intel® 64 and IA-32 Architectures Software Developer's Manual, Volume 1: Basic Architecture|at=Chapter 3|date=March 2018|publisher=Intel Corporation|url=http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html|access-date=March 19, 2014|archive-date=January 26, 2012|archive-url=https://web.archive.org/web/20120126002939/http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html|url-status=live}}</ref>{{rp|pages=3{{hyp}}11–3{{hyp}}12,3{{hyp}}22–3{{hyp}}23}} The [[Advanced Micro Devices]] [[Opteron]], the first model of which was released in 2003, introduced [[x86-64]], the 64-bit version of the x86 instruction set; in x86-64, the general-purpose registers were extended to 64 bits, and eight additional general-purpose registers were added; the memory address of an operand is the sum of two of those 16 registers and a displacement.<ref>{{cite book|url=https://support.amd.com/TechDocs/24592.pdf|title=AMD64 Architecture Programmer's Manual Volume 1: Application Programming|pages=3, 16|date=October 2020|publisher=[[Advanced Micro Devices]]}}</ref><ref name="modern-x86" />{{rp|pages=3{{hyp}}12,3{{hyp}}24}}

The [[reduced instruction set computing]] (RISC) instruction sets introduced in the 1980s and 1990s all provide general-purpose registers that can contain either numerical values or address values. In most of those instruction sets, there are 32 general-purpose registers (in some of those instruction sets, the value of one of those registers is hardwired to zero) could be used to calculate the operand address; they did not have dedicated index registers. In the 32-bit version of the [[ARM architecture family|ARM architecture]], first developed in 1985, there are 16 registers designated as "general-purpose registers", but only 13 of them can be used for all purposes, with register R15 containing the [[program counter]]. The memory address of a load or store instruction is the sum of any of the 16 registers and either a displacement or another of the registers with the exception of R15 (possibly shifted left for scaling).<ref>{{cite book|url=https://documentation-service.arm.com/static/5f8dacc8f86e16515cdb865a|title=ARM Architecture Reference Manual|publisher=[[Arm (company)|Arm]]|date=2005|pages=A2{{hyp}}6, A3{{hyp}}21}}</ref> In the 64-bit version of the ARM architecture, there are 31 64-bit general-purpose registers plus a stack pointer and a zero register; the memory address of a load or store instruction is the sum of any of the 31 registers and either a displacement or another of the registers.<ref>{{cite book|url=https://developer.arm.com/documentation/ddi0487/latest|title=Arm Architecture Reference Manual Armv8, for Armv8-A architecture profile|publisher=[[Arm (company)|Arm]]|date=2022|pages=C1{{hyp}}227, C3{{hyp}}252}}</ref>

==Examples==
Here is a simple example of index register use in assembly language pseudo-code that sums a 100 entry array of 4-byte words:

    Clear_accumulator
    Load_index 400,index2  //load 4*array size into index register 2 (index2)
 loop_start : Add_word_to_accumulator array_start,index2   //Add to AC the word at the address (array_start + index2)
    Branch_and_decrement_if_index_not_zero loop_start,4,index2   //loop decrementing by 4 until index register is zero

==See also==
*[[For loop]]

== Notes ==
{{notelist}}

== References ==
{{reflist}}{{Processor technologies}}

{{DEFAULTSORT:Index Register}}
[[Category:Control flow]]
[[Category:Central processing unit]]
[[Category:Digital registers]]