Editing MOS Technology 6507

{{short description|8-bit microprocessor}}
{{Infobox CPU
|name           = MOS Technology 6507
|image          = KL UMC UM6507.jpg
|caption        =
|produced-start = {{Start date and age|1975}}
|produced-end   = 
|manuf1         = [[MOS Technology]]
|arch           = [[MOS Technology 6502|6502]]
|transistors    = 3,510,<ref>{{cite web
 |title=The MOS 6502 and the Best Layout Guy in the World
 |publisher=swtch.com |date=2011-01-03
 |access-date=2014-08-09
 |url=http://research.swtch.com/6502}}</ref> 3,218<ref>{{cite web
 |title=MOnSter6502
 |publisher=monster6502.com
 |date=2017
 |access-date=2017-05-01
 |url=http://monster6502.com}}</ref>
|numinstructions = 56
|data-width     = 8
|address-width  = 13
|pack1          = 28-pin [[Dual in-line package|DIP]]
|predecessor    = {{plainlist|
*[[Motorola 6800]]
*MOS 6501/6502}}
|successor      =
}}

The '''6507''' (typically "''sixty-five-oh-seven''" or "''six-five-oh-seven''") is an 8-bit [[microprocessor]] from [[MOS Technology|MOS Technology, Inc.]] It is a version of their 40-pin [[MOS Technology 6502|6502]] packaged in a 28-pin [[dual inline package|DIP]], making it cheaper to package and integrate in systems.<ref>{{Cite book|last=Bagnall|first=Brian|title=Commodore|publisher=Variant Press|quote=We sold a microprocessor, RAM, ROM, and I/O chip all for twelve bucks, ...}}</ref> The reduction in pin count is achieved by reducing the [[address bus]] from 16 bits to 13 (limiting the available memory range from 64{{nbsp}}[[kilobyte|KB]] to 8{{nbsp}}KB) and removing a number of other pins used only for certain applications.<ref>{{Cite book|last=Bagnall|first=Brian|title=Commodore|publisher=Variant Press|quote=The 6507, which was a subset of [the 6502], could be made at a cheaper price. It was designed to be a really small package.}}</ref>

To do this, A15 to A13 and some other signals such as the interrupt lines are not accessible. As a result, it can only address 8{{nbsp}}KB of memory, which for some applications at the time (1975) was acceptable and not overly restrictive. The entire 6500 CPU family was originally conceived as a line of very low-cost microprocessors for small-scale embedded systems.<ref>{{Cite web|date=June 12, 2014|title=Oral History of Charles Ingerham "Chuck" Peddle|url=https://archive.computerhistory.org/resources/access/text/2014/08/102739939-05-01-acc.pdf|access-date=2021-05-30|page=58|quote=You don't use a 68000 as a logic replacement; you use it as a computer. And that's a different architecture. And we weren't capable of going there, without a major investment, ... It's supposed to have been in every cash register, it's supposed to have been in every intelligent thing on the airplane, it was supposed to be everywhere.}}</ref>

The 6507 and 6502 chips use the same underlying silicon layers, and differ only in the final metallisation layer. This ties the interrupt lines to their inactive level so they are not vulnerable to generating spurious interrupts from noise. The first three digits of the chip identifier are part of the silicon layers, and the final digit is in the metallisation layer. Micro-photography of the 6502 and 6507 shows this difference.<ref>{{cite web|url=http://blog.visual6502.org/2010/09/6502-vs-6507.html|title=Visual6502.org: 6502 vs. 6507|author=Visual6502}}
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[[File:Atari-2600-Console.jpg|thumb|The 1977 Atari Video Computer System contains a 6507 as one of its three main chips.]]
The 6507 is widely used in two applications: the best-selling [[Atari 2600]] [[video game console]]<ref name="EGM62">{{cite magazine |date=September 1994 |title=When Pac Ruled the Earth |page=18 |magazine=[[Electronic Gaming Monthly]] |publisher=EGM Media, LLC |issue=62 |url=https://archive.org/details/Electronic_Gaming_Monthly_62/page/n17/mode/2up}}</ref> and peripherals for the [[Atari 8-bit computers]] including the [[Atari 850|850]] Serial & Parallel Interface,<ref>{{Cite web|date=1981|title=Atari 850 Interface Module Field Service Manual|url=https://archive.org/details/Atari850InterfaceModuleFieldServiceManual/page/n13/mode/2up|access-date=2021-06-03|website=Internet Archive|quote=Block Diagram}}</ref> and the [[Atari 810|810]] and [[Atari 1050|1050]] disk drives.<ref>{{Cite web|date=1980|title=Atari 810 Disk Drive Field Service Manual|url=https://archive.org/details/Atari810DiskDriveFieldServiceManualRev1/page/n41/mode/2up|access-date=2021-06-03|website=Internet Archive|quote=Block Diagrams And Schematics}}</ref><ref>{{Cite web|title=Service Manual For The Atari 1050 Disk Drive|url=https://archive.org/details/ServiceManualForTheAtari1050DiskDrive/page/n11/mode/2up|access-date=2021-06-03|website=Internet Archive|year=1983|quote=Electronic Theory}}</ref> In the 2600, the system is further limited by the design of the [[ROM cartridge]] slot, which only allows for 4{{nbsp}}KB of the external memory to be addressed. The other 4{{nbsp}}KB is reserved for the internal [[random-access memory|RAM]] and I/O chips, using a minimal-cost [[Memory-mapped I/O#Basic types of address decoding|partial decoding]] technique that causes the RAM and peripheral device registers to appear at multiple aliased addresses throughout the 4{{nbsp}}K address space.<ref>{{Cite web|title=Atari 2600 Specifications|url=https://problemkaputt.de/2k6specs.htm|access-date=2021-05-31|quote=Memory Mirrors}}</ref>

Most other machines, notably [[home computer]]s based on the [[MOS Technology 650x|650x architecture]], use either the standard 6502 or extended versions of it, in order to allow for more memory.

By the time the 6502 line was becoming widely used around 1980, [[read-only memory|ROM]] and RAM [[semiconductor]] memory prices had fallen to the point where the 6507 was no longer a worthwhile simplification. Its use in new designs ceased at that point, though the Atari 2600 that contains it continued to be sold into the early 1990s, as it was not discontinued until January 1, 1992. However, late-model Atari 2600 consoles do not necessarily contain a discrete 6507 chip.

== Pin configuration ==
<div class="floatright" style="border: 1px solid #828991;background-color: #f8f9fa;padding:0.2em;font-size:88%;">
{| class="wikitable" style="float:right"
|+ Pin layout of MOS 6507<ref>{{cite web|url=http://marc.info/?l=classiccmp&m=110668039327589&w=2|title=MOS 6507 Tech Spec's|author=Peter Turnbull|date=January 25, 2005}}</ref>
|-
| /RES || 1  || 28 || [[Clock signal|φ2]] out
|-
| Vss  || 2  || 27 || [[Clock signal|φ0]] in
|-
| RDY  || 3  || 26 || R/W
|-
| Vcc  || 4  || 25 || D0
|-
| A0   || 5  || 24 || D1
|-
| A1   || 6  || 23 || D2
|-
| A2   || 7  || 22 || D3
|-
| A3   || 8  || 21 || D4
|-
| A4   || 9  || 20 || D5
|-
| A5   || 10 || 19 || D6
|-
| A6   || 11 || 18 || D7
|-
| A7   || 12 || 17 || A12
|-
| A8   || 13 || 16 || A11
|-
| A9   || 14 || 15 || A10
|}
</div>
The 6507 uses a 28-pin configuration, with 13 address pins (A0..A12) and 8 data pins (D0..D7). The seven remaining pins are used for power (Vss, Vcc), the [[Clock signal|CPU timing clock]] (φ0, φ2), to reset the CPU (the /RES pin), to request a CPU wait state during its next memory read access (the RDY pin), and for the CPU to indicate if a read or write memory (or [[Memory-mapped I/O|MMIO]] device) access is being performed (the R/W pin). There is no [[Interrupt request (PC architecture)|IRQ]] or [[Non-maskable interrupt|NMI]] pin on the processor.

The RDY pin is not included on all other 28-pin cut-down versions of the 6502. Within the Atari 2600, RDY is used to synchronise the CPU to the television video lines. This function is essential for the 'racing the beam' method used by the 6502 and Atari [[Television Interface Adaptor]] chip to generate the television video signal.<ref>{{Cite web|last=Miner|first=Jay|date=October 22, 1976|title=TIA 1A – Television Interface Adaptor (Model 1A)|url=http://www.howell1964.freeserve.co.uk/Atari/tia/description.htm|url-status=live|access-date=2021-06-04|website=Internet Archive|archive-url=https://web.archive.org/web/20080424113533/http://www.howell1964.freeserve.co.uk/Atari/tia/description.htm|archive-date=2008-04-24|quote=This circuit operates on a "line by line" basis, always outputing the same information every television line unless new data is written into it by the microprocessor.}}</ref> In response to a specific address access, the TIA will assert RDY to halt the CPU until the end of the current video scan line.<ref>{{Cite web|last1=Wright|first1=Steve|last2=May|first2=Darryl|date=1988|title=2600 (STELLA) Programmer's Guide|url=https://archive.org/details/StellaProgrammersGuide/page/n5/mode/2up|access-date=2021-06-01|website=Internet Archive|quote=Simply {{sic|wri|tting|nolink=y}} to WSYNC causes the microprocessor to halt until the electron beam reaches the right edge of the screen, ...}}</ref>

==References==
{{Reflist}}

==Further reading==
* [http://www.classiccmp.org/cini/pdf/Commodore/ds_c650x.pdf Commodore Semiconductor Group: ''6500 Microprocessors''] {{Webarchive|url=https://web.archive.org/web/20201001060315/http://www.classiccmp.org/cini/pdf/Commodore/ds_c650x.pdf |date=2020-10-01 }}, November 1985, p.&nbsp;11.
{{See also|MOS Technology 6502#Further reading|l1=List of books about 65xx microprocessor families}}

{{MOS CPU}}

{{DEFAULTSORT:Mos Technology 6507}}
[[Category:MOS Technology microprocessors]]
[[Category:65xx microprocessors]]
[[Category:Computer-related introductions in 1975]]
[[Category:8-bit microprocessors]]