Editing Memory address

{{Short description|Reference to a specific memory location}}
{{More citations needed|date=February 2018}}

[[File:Paging.svg|thumb|300px|In a computer using [[virtual memory]], accessing the location corresponding to a memory address may involve many levels.]]
In [[computing]], a '''memory address''' is a reference to a specific [[computer memory|memory]] location in memory used by both [[software]] and [[computer hardware|hardware]].<ref>{{Cite web |last=Abrahamson |first=Karl R. |date=Aug 20, 2022 |title=5.10.1. The Memory and Memory Addresses |url=http://www.cs.ecu.edu/karl/3300/spr14/Notes/C/Memory/memory.html |access-date=Feb 3, 2023 |website=East Carolina University}}</ref> These addresses are fixed-length sequences of [[Numerical digit|digits]], typically displayed and handled as [[signedness|unsigned]] [[integer (computing)|integers]]. This numerical representation is based on the features of CPU (such as the [[instruction pointer]] and incremental [[memory address register|address registers]]). Programming language constructs often treat the memory like an array.

==Types==
===Physical addresses===
A [[digital computer]]'s [[main memory]] consists of many '''memory locations''', each identified by a unique physical address (a specific code). The CPU or other devices can use these codes to access the corresponding memory locations. Generally, only [[system software]] (such as the [[BIOS]], operating systems, and specialized [[utility program]]s like [[memory tester]]s) directly addresses physical memory using machine code instructions or processor registers. These instructions tell the CPU to interact with a hardware component called the memory controller. The memory controller manages access to memory using the memory bus or a system bus, or through separate control, address, and data [[Bus (computing)|buses]], to execute the program's commands. The bus managed by the memory controller consists of multiple parallel lines, each representing a binary digit (bit).

===Logical addresses===
A [[computer program]] uses memory addresses to execute [[machine code]], and to store and retrieve [[data (computing)|data]].  In early computers, logical addresses (used by programs) and physical addresses (actual locations in hardware memory) were the same. However, with the introduction of [[virtual memory]] most [[application program]]s do not deal directly with physical addresses. Instead, they use [[logical address|logical]] or [[virtual address space|virtual addresses]], which are translated to physical addresses by the computer's [[memory management unit]] (MMU) and the operating system's [[Memory address#Address space in application programming|memory mapping mechanisms]].

==Unit of address resolution==
{{see also|Word (computer architecture)|Binary prefix#Main memory}}
Most modern computers are ''[[byte-addressable]]''. Each address identifies a single 8-bit [[byte]] ([[octet (computing)|octet]]) of storage. Data larger than a single byte may be stored in a sequence of consecutive addresses.  There exist ''[[word-addressable]]'' computers, where the minimal addressable storage unit is exactly the processor's [[word (computer architecture)|word]].{{efn|Some word-addressable computers have byte-handling instructions, typically supporing byte sizes up to a word but not supporting bytes that straddled words. For example, the [[DEC PDP-6]] and [[PDP-10]] have {{bulleted list|Deposit Byte (DPB)|Increment Byte Pointer (IBP)|Increment and Deposit Byte (IDPB)|Increment and Load Byte (ILDB)|Load Byte (LDB)|class=inline}}}} For example, the [[Data General Nova]] [[minicomputer]], and the [[Texas Instruments TMS9900]] and [[IMP-16|National Semiconductor IMP-16]] [[microcomputer]]s, used 16-bit [[word (computer architecture)|word]]s, and there are many old [[mainframe computer]]s that use [[36-bit]] word addressing (such as the [[IBM 7090]], with 15-bit word addresses, giving an address space of 2<sup>15</sup> 36-bit words, approximately 128 kilobytes of storage, and the [[DEC PDP-6]]/[[PDP-10]], with 18-bit word addresses, giving an address space of 2<sup>18</sup> 36-bit words, approximately 1 megabyte of storage), not byte addressing.  The range of addressing of memory depends on the bit size of the bus used for addresses – the more bits used, the more addresses are available to the computer.  For example, an 8-bit-byte-addressable machine with a 20-bit [[address bus]] (e.g. [[Intel 8086]]) can address 2<sup>20</sup> (1,048,576) memory locations, or one [[Mebibyte|MiB]] of memory, while a 32-bit bus (e.g. [[Intel 80386]]) addresses 2<sup>32</sup> (4,294,967,296) locations, or a 4 [[Gibibyte|GiB]] address space.  In contrast, a 36-bit word-addressable machine with an 18-bit address bus addresses only 2<sup>18</sup> (262,144) 36-bit locations (9,437,184 bits), equivalent to 1,179,648 8-bit bytes, or 1152 [[Kibibyte|KiB]], or 1.125 MiB — slightly more than the 8086.

A small number of older machines are ''[[bit]]-addressable''. For example, a variable filed length (VFL) instruction on the [[IBM 7030]] {{qi|Stretch}} specifies a bit address, a byte size of 1 to 8 and a field length.

Some older computers ([[decimal computer]]s) are ''[[decimal]] [[Numerical digit|digit]]-addressable''.  For example, each address in the [[IBM 1620]]'s [[magnetic-core memory]] identified a single six bit [[binary-coded decimal]] digit, consisting of a [[parity bit]], [[flag bit]] and four numerical bits.<ref>{{cite book
 | title       = IBM 1620 Central Processing Unit, Model 1 
 | id          = A26-5706-3
 | url         = http://bitsavers.org/pdf/ibm/1620/A26-5706-3_IBM_1620_CPU_Model_1_Jul65.pdf
 | publisher   = [[IBM]]
 | series      = Systems Reference Library 
 | access-date = March 7, 2025
 }}
</ref>  The 1620 used 5-digit decimal addresses, so in theory the highest possible address was 99,999.  In practice, the CPU supported 20,000 memory locations, and up to two optional external memory units could be added, each supporting 20,000 addresses, for a total of 60,000 (00000–59999).

Some older computers are character-addressable, with 6-bit [[BCD (character encoding)|BCD]] characters containing a 2-bit zone and a 4-bit digit; the characters in an address only have digit values representing 0–9. Typically some of the zone bits are part of the address and some are used for other purposes, e.g., index register, indirect address.<ref>{{cite book
 | title       = System Reference Manual - RCA 3301 
 | id          = 94-16-000
 | date        = September 1967
 | url         = http://bitsavers.org/pdf/rca/3301/94-16-000_RCA_3301_System_Reference_Manual_Sep67.pdf
 | publisher   = [[RCA]] EDP
 | access-date = March 7, 2025
 }}
</ref>

Some older computers are decimal-word addressable, typically with 4-digit addresses.<ref>{{cite book
 | title       = IBM 7070-7074 Principles of Operation 
 | id          = GA22-7003-6
 | url         = http://bitsavers.org/pdf/ibm/7070/GA22-7003-6_7070-7074prcOps.pdf
 | publisher   = [[IBM]]
 | series      = Systems Reference Library 
 | access-date = March 7, 2025
 }}
</ref> In some machines the address fields also select index registers, restricting the range of possible address.<ref>{{cite book
 | title       = 650 magnetic drum data-processing machine - manual of operation
 | id          = 22-6060-2
 | date        = June 1955
 | url         = http://bitsavers.org/pdf/ibm/650/22-6060-2_650_OperMan.pdf
 | publisher   = [[IBM]]22-6060-2
 | access-date = March 7, 2025
 }}
</ref>

===Word size versus address size===
[[Word (computer architecture)|Word]] size is a characteristic of [[computer architecture]] denoting the number of bits that a CPU can process at one time. Modern processors, including [[embedded systems]], usually have a word size of 8, 16, 24, 32 or 64 bits; most current general-purpose computers use 32 or 64 bits. Many different sizes have been used historically, including 8, 9, 10, 12, 18, 24, 36, 39, 40, 48 and 60 bits.

Very often, when referring to the ''word size'' of a modern computer, one is also describing the size of address space on that computer. For instance, a computer said to be "[[32-bit]]" also usually allows 32-bit memory addresses; a byte-addressable 32-bit computer can address 2<sup>32</sup> = 4,294,967,296 bytes of memory, or 4 gibibytes (GiB). This allows one memory address to be efficiently stored in one word.

However, this does not always hold true. Computers can have memory addresses larger or smaller than their word size. For instance, many [[8-bit]] processors, such as the [[MOS Technology 6502]], [[MOS Technology 6502#Technical description|supported 16-bit addresses]]— if not, they would have been limited to a mere 256 [[byte]]s of memory addressing. The 16-bit [[Intel 8088]] and [[Intel 8086]] supported 20-bit addressing via [[Intel 8086#Segmentation|segmentation]], allowing them to access 1 MiB rather than 64 KiB of memory. All Intel [[Pentium (brand)|Pentium]] processors since the [[Pentium Pro]] include [[Physical Address Extension]]s (PAE) which support mapping 36-bit physical addresses to 32-bit virtual addresses. Many early [[LISP]] implementations on, e.g., [[36-bit]] processors, held 2 addresses per word as the result of a [[cons]]. Some early processors held 2 and even 3 addresses per instruction word.

In theory, modern byte-addressable [[64-bit]] computers can address 2<sup>64</sup> bytes (16 [[exbibyte]]s), but in practice the amount of memory is limited by the CPU, the [[memory controller]], or the [[printed circuit board]] design (e.g., number of physical memory connectors or amount of soldered-on memory).

==Contents of each memory location==
{{see also|binary data}}
Each memory location in a [[stored-program computer]] holds a [[binary number]] or [[decimal number]] ''of some sort''.  Its interpretation, as data of some [[data type]] or as an instruction, and use are determined by the [[instruction (computer science)|instructions]] which retrieve and manipulate it.

Some early programmers combined instructions and data in words as a way to save memory, when it was expensive: The [[Manchester Mark 1]] had space in its 40-bit words to store little bits of data – its processor ignored a small section in the middle of a word – and that was often exploited as extra data storage.{{citation needed|date=October 2011}} [[Self-replicating]] programs such as [[Computer virus|viruses]] treat themselves sometimes as data and sometimes as instructions. [[Self-modifying code]] is generally [[deprecated]] nowadays, as it makes testing and maintenance disproportionally difficult to the saving of a few bytes, and can also give incorrect results because of the compiler or processor's assumptions about the machine's [[State (computer science)|state]], but is still sometimes used deliberately, with great care.

===Address space in application programming===
In modern [[computer multitasking|multitasking]] environment, an [[application program|application]] [[process (computing)|process]] usually has in its address space (or spaces) chunks of memory of following types:
* '''[[Machine code]]''', including:
** program's own code (historically known as ''[[code segment]]'' or ''text segment'');
** [[shared libraries]].
* '''[[Data (computing)|Data]]''', including:
** initialized data ([[data segment]]);
** [[.bss|uninitialized (but allocated)]] variables;
** [[run-time stack]];
** [[heap (programming)|heap]];
** [[Shared memory (interprocess communication)|shared memory]] and [[memory mapped file]]s.
Some parts of address space may be not mapped at all.

Some systems have a "split" [[memory architecture]] where machine code, constants, and data are in different locations, and may have different address sizes.
For example, [[PIC18]] microcontrollers have a 21-bit program counter to address machine code and constants in Flash memory, and 12-bit address registers to address data in SRAM.

==Addressing schemes==
{{main|Addressing mode}}
A computer program can access an address given explicitly – in low-level programming this is usually called an '''{{visible anchor|absolute address}}''', or sometimes a specific address, and is known as [[pointer (computer programming)|pointer]] data type in higher-level languages. But a program can also use [[relative address]] which specifies a location in relation to somewhere else (the ''[[base address]]''). There are many more indirect [[addressing mode]]s.

Mapping logical addresses to physical and virtual memory also adds several levels of indirection; see below.

==Memory models==
{{for|the specification of memory access semantics in multi-threading programs|Memory model (programming)}}

Many programmers prefer to address memory such that there is no distinction between code space and data space (see [[#Address space in application programming|above]]), as well as from physical and virtual memory (see [[#Types|above]]) — in other words, numerically identical pointers refer to exactly the same byte of RAM.

However, many early computers did not support such a ''flat memory model'' — in particular, [[Harvard architecture]] machines force program storage to be completely separate from data storage.
Many modern [[Digital signal processor|DSP]]s (such as the [[Motorola 56000]]) have three separate storage areas — program storage, coefficient storage, and data storage. Some commonly used instructions fetch from all three areas simultaneously — fewer storage areas (even if there were the same total bytes of storage) would make those instructions run slower.

===Memory models in x86 architecture===
{{main|x86 memory models}}
Early x86 processors use the [[memory segmentation|segmented memory model]] addresses based on a combination of two numbers: a [[x86 memory segmentation|memory segment]], and an [[offset (computer science)|offset]] within that segment.

Some segments are implicitly treated as ''code segments'', dedicated for [[instruction (computer science)|instruction]]s, ''[[call stack|stack]] segments'', or normal ''[[data (computing)|data]] segments''. Although the usages are different, the segments do not have different [[memory protection]]s reflecting this.
In the [[flat memory model]] all segments (segment registers) are generally set to zero, and only offsets are variable.
{{see also|Long mode}}

===Memory models in IBM S/360 and successors multiprocessors===
In the [[360/65]] and [[360/67]], IBM introduced a concept known as prefixing.<ref>{{cite book
 | title       = IBM System/360 Principles of Operation 
 | id          = A22-6821-7
 | date        = September 1968
 | edition     = Eighth
 | section     = Multisystem Operation
 | section-url = http://bitsavers.org/pdf/ibm/360/princOps/A22-6821-7_360PrincOpsDec67.pdf#page=20
 | page        = 18
 | quote       = The relocation procedure applies to the first 4,096 bytes of storage. This area contains all permanent storage assignments and, generally, has special significance to supervisory programs. The relocation is accomplished by inserting a 12-bit prefix in each address which has the high-order 12 bits set to zero and hence, pertains to location 0-4095.
 | url         = http://bitsavers.org/pdf/ibm/360/princOps/A22-6821-7_360PrincOpsDec67.pdf
 | series      = Systems Reference Library
 | access-date = July 21, 2024
 }}
</ref> Prefixing is a level of address translation that applies to addresses in real mode and to addresses generated by dynamic address translation, using a unique prefix assigned to each CPU in a multiprocessor system. On the 360/65, 360/67 and every successor prior to [[z/Architecture]], it logically swaps a 4096 byte block of storage with another block assigned to the CPU. On z/Architecture,<ref>{{cite book
 | title       = z/Architecture Principles of Operation 
 | id          = SA22-7832-13
 | date        = May 2022
 | edition     = Fourteenth
 | section     = Prefixing in the z/Architecture Architectural Mode
 | section-url = https://www.vm.ibm.com/library/other/22783213.pdf#page=128
 | page        = 3-21–3-23
 | quote       = Prefixing provides the ability to assign the block of real addresses containing assigned storage locations to a different block in absolute storage for each CPU, thus permitting more than one CPU sharing main storage to operate concurrently with a minimum of interference, especially in the processing of interruptions.
 | url         = https://www.vm.ibm.com/library/other/22783213.pdf
 | access-date = July 21, 2024
 }}
</ref> prefixing operates on 8196-byte blocks. IBM classifies addresses on these systems as:<ref>{{cite book
 | title       = z/Architecture Principles of Operation 
 | id          = SA22-7832-13
 | date        = May 2022
 | edition     = Fourteenth
 | section     = Address Types
 | section-url = https://www.vm.ibm.com/library/other/22783213.pdf#page=110
 | pages       = 3-4–3-5
 | url         = https://www.vm.ibm.com/library/other/22783213.pdf
 | access-date = July 21, 2024
 }}
</ref>

* Virtual addresses: addresses subject to dynamic address translation
* Real addresses: addresses generated from dynamic address translation, and addresses used by code running in real mode
* Absolute addresses: physical addresses

On the 360/65, on S/370 models without DAT and when running with translation turned off, there are only a flat real address space and a flat absolute address space.

On the 360/67, S/370 and successors through [[S/390]], when running with translation on, addresses contain a segment number, a page number and an offset. Although early models supported both 2 KiB and 4 KiB page sizes, later models only supported 4 KiB. IBM later added instructions to move data between a primary address space and a secondary address space.

[[S/370-XA]] added 31-bit addresses, but retained the segment/page/offset hierarchy with 4 KiB pages.

[[ESA/370]] added 16 access registers (ARs) and an AR access control mode, in which a 31-bit address was translated using the address space designated by a selected AR.

[[z/Architecture]] supports 64-bit virtual, real and absolute addresses, with multi-level page tables.

==See also==
*[[Base address]]
*[[Endianness]]
*[[Low-level programming language]]
*[[Memory address register]]
*[[Memory allocation]]
*[[Memory management unit]] (MMU)
*[[Memory model (programming)]]
*[[Memory protection]]
*[[Memory segmentation]]
*[[Offset (computer science)]], also known as a ''displacement''
*[[Page table]]

==Notes==

{{notelist}}

==References==
{{Reflist}}

{{Data types}}

[[Category:Computer memory]]