Editing Non-maskable interrupt

{{Short description|Hardware interrupt that cannot be ignored}}
In [[computing]], a '''non-maskable interrupt''' ('''NMI''') is a hardware [[interrupt]] that standard [[Interrupt#Masking|interrupt-masking techniques]] in the system cannot ignore. It typically occurs to signal attention for non-recoverable hardware [[error]]s. Some NMIs may be masked, but only by using proprietary methods specific to the particular NMI. With regard to [[SPARC]], the non-maskable interrupt (NMI), despite having the highest priority among interrupts, can be prevented from occurring through the use of an interrupt mask.<ref>{{cite web |url=https://docs.rtems.org/releases/rtems-4.11.2/cpu-supplement/sparc.html#interrupt-levels |title=Interrupt Levels |accessdate=2023-11-30}}</ref>

An NMI is often used when response time is critical or when an interrupt should never be disabled during normal system operation. Such uses include reporting non-recoverable hardware errors, system debugging and profiling, and handling of special cases like system resets.

Modern [[computer architecture]]s typically use NMIs to handle non-recoverable errors which need immediate attention. Therefore, such interrupts should not be masked in the normal operation of the system. These errors include non-recoverable internal system [[chipset]] errors, corruption in system memory such as [[parity bit|parity]] and [[Error correction code|ECC]] errors, and data corruption detected on system and peripheral buses.

On some systems, a computer user can trigger an NMI through hardware and software [[debugging]] interfaces and system reset buttons.

Programmers typically use debugging NMIs to diagnose and fix faulty code. In such cases, an NMI can execute an [[interrupt handler]] that transfers control to a special monitor program. From this program, a developer can inspect the machine's memory and examine the internal state of the program at the instant of its interruption. This also allows the debugging or diagnosing of computers which appear [[Hang (computing)|hung]].

== History ==
In older architectures, NMIs were used for interrupts which were typically never disabled because of the required response time. They were hidden signals. Examples include the [[floppy disk]] controller on the [[Amstrad PCW]], the [[Intel 8087|8087]] [[coprocessor]] on the [[x86]] when used in the IBM PC or its compatibles (even though Intel recommended connecting it to a normal interrupt<ref>{{cite book
| title=Intel® 64 and IA-32 Architectures Software Developer's Manual
| volume=1
| chapter=8.7.2: MS-DOS* Compatibility Sub-mode
| pages=8–31
|date=June 2013
| publisher=[[Intel Corporation]]
| url=http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html}}</ref>), and the Low Battery signal on the [[HP 95LX]].

In the original [[IBM Personal Computer|IBM PC]], an NMI was triggered if a parity error was detected in system memory, or reported by an external device. In either case, the PC would display an error message and halt. Some later [[IBM PC compatible|IBM-compatibles]] used an NMI to conceal the hardware differences from that of the original IBM PC. On such computers, an NMI would be generated when a program attempted to access incompatible hardware. A [[BIOS]] [[interrupt handler]] would then translate the program's request to match the hardware that was actually present. The [[System Management Mode|SMM]] in the [[386SL]] is a better way to do this.

Some 8-bit [[home computer]]s used the NMI line to permit a "warm start" if the system had locked up. Typically, this would restore the control registers to known good values stored in [[Read-only memory|ROM]], without destroying whatever data that the user might currently have loaded. On the [[Commodore International|Commodore]] 8-bit machines, the {{mono|RESTORE}} key was hooked up directly or indirectly to the NMI line on the [[MOS Technology 6502|6502]]-series CPU, but the reset would take place only if the NMI handler routine in ROM detected that {{mono|RUN/STOP}} was also being held down when {{mono|RESTORE}} was struck (this combination being the [[Commodore International|Commodore]] version of a [[Control-Alt-Delete|three finger salute]]).  [[Commodore International|Commodore]] also connected the [[MOS Technology]] [[MOS Technology CIA|6526]] CIA #2 in the [[Commodore 64|C64]] and [[Commodore 128|C128]] to the processor's NMI line, which was part of the means by which software emulation of the [[MOS Technology 6551|6551 ACIA]] was accomplished.  [[Atari]]'s 8-bit line used a {{mono|SYSTEM RESET}} button for this same purpose.

Debugging NMIs have appeared in a number of forms, including the [[Apple Macintosh]]'s [[Programmer's key|"programmers' button"]], and certain key combinations on [[Sun Microsystems|Sun]] workstations. With the introduction of [[Windows 2000]], [[Microsoft]] allowed the use of an NMI to cause a system to either break into a [[debugger]], or dump the contents of memory to disk and reboot.<ref>{{cite web
| url=http://support.microsoft.com/kb/927069
| title=How to generate a complete crash dump file or a kernel crash dump file by using an NMI on a Windows-based system
| date=2011-06-08
| publisher=[[Microsoft]]
| accessdate=2013-08-31}}</ref>

Debugging NMIs have also been used by devices that allow leisure users and gamers to manipulate running programs. Devices which added a button to generate an NMI, such as Romantic Robot's [[Multiface]], were a popular accessory for 1980s 8-bit and 16-bit home computers. These peripherals had a small amount of [[Read-only memory|ROM]] and an NMI button. Pressing the button transferred control to the software in the peripheral's ROM, allowing the suspended program to be saved to disk (very useful for tape-based games with no disk support, but also for saving games in progress), screenshots to be saved or printed, or values in memory to be manipulated—a cheating technique to acquire extra lives, for example.

Not all computers provide a mechanism for triggering NMIs; however, many machines (typically [[rackmount]] servers) provide a physical button specifically for this purpose.  Other machines may expose this functionality via an expansion card.<ref>{{cite web
| url=http://www.connecttech.com/sub/products/PCI_DumpSwitch.asp
| title=PCI Dump Switch Card
| publisher=Connect Tech Inc
| accessdate=2013-08-31}}</ref>

[[Miles Gordon Technology]]'s [[DISCiPLE]] and [[PlusD|+D]] products for the [[ZX Spectrum]] featured an NMI-producing "magic button".

On the [[Nintendo Entertainment System]], an NMI is generated during each [[vertical blanking interval]].  Because these NMIs (often referred to as "vblank interrupts") occur at frequent, regular intervals, code that manipulates game graphics and audio is often executed inside of the NMI handler routine.  Clearing the 7th bit of the PPU's {{mono|$2000}} [[processor register|register]] disables vblank interrupts, and setting it enables them.

== See also ==
* [[Advanced Programmable Interrupt Controller]] (APIC)
* [[Inter-processor interrupt]] (IPI)
* [[Interrupt]]
* [[Interrupt handler]]
* [[Interrupt latency]]
* [[Programmable Interrupt Controller]] (PIC)

== Notes ==
{{reflist|2}}

==External links==
* {{cite web
| archive-url=https://web.archive.org/web/20121026132317/http://msdn.microsoft.com/en-us/windows/hardware/gg463172.aspx
| archive-date=2012-10-26
| url=http://msdn.microsoft.com/en-us/windows/hardware/gg463172.aspx
| title=Dump Switch Support for Windows
| date=2001-12-04
| publisher=[[Microsoft Developer Network]]
| accessdate=2013-08-31}}

* {{cite web
| url=http://www.seasip.info/AmstradXT/ppctech/section1.html#1.11.5.4
| title=CGA Mode CRTC initialization
| work=Amstrad PPC Technical Manual
| publisher=seasip.info
| accessdate=2013-08-31}}

[[Category:Interrupts]]
[[Category:Debugging]]

[[pt:Interrupção não-mascarada]]