Editing Northbridge (computing)

{{More citations needed|date=January 2008}}
{{Short description|PC chip handling onboard control tasks}}
[[File:Chipset schematic.svg|thumb|300px|A typical north/southbridge layout (2015)]]
[[File:Motherboard diagram.svg|thumb|300px|A typical north/southbridge layout (2007)]]

In computing, a '''northbridge''' (also '''host bridge''', or '''memory controller hub''') is a [[Integrated circuit|microchip]] that comprises the core logic [[chipset]] architecture on [[motherboard]]s to handle high-performance tasks, especially for older [[personal computer]]s. It is connected directly to a [[CPU]] via the [[front-side bus]] (FSB), and is usually used in conjunction with a slower [[Southbridge (computing)|southbridge]] to manage communication between the [[central processing unit|CPU]] and other parts of the motherboard.<ref>{{cite web|title=Definition of:Northbridge|url=https://www.pcmag.com/encyclopedia/term/48076/northbridge|publisher=PC Magazine|access-date=September 26, 2015}}</ref>

Historically, separation of functions between CPU, northbridge, and southbridge chips was necessary due to the difficulty of integrating all components onto a single [[Die (integrated circuit)|chip die]].<ref>{{cite web |date=2006-01-27 |title=Chipset: Northbridge and Southbridge |url=http://www.rigacci.org/wiki/doku.php/doc/appunti/hardware/chipset |access-date=2015-05-07 |publisher=Rigacci.org}}</ref> However, as CPU speeds increased over time, a [[Von Neumann bottleneck|bottleneck]] emerged due to limitations caused by [[data communication|data transmission]] between the CPU and its support chipset.<ref>{{cite book |last1=Kent |first1=Allen |url=https://books.google.com/books?id=Q_tqLg5buqYC |title=Encyclopedia of computer science and technology |date=1999 |publisher=Dekker |isbn=9780824722937 |location=New York, NY [u.a.] |pages=500 |access-date=September 26, 2015}}</ref> The trend for integrated northbridges began near the end of the 2000s {{Ndash}}for example, the [[List of Nvidia graphics processing units#GeForce 300M .283xxM.29 series|Nvidia GeForce 320M]] GPU in the 2010 MacBook Air was a northbridge/southbridge/GPU combo chip.<ref>[http://digitalgravitas.wordpress.com/2010/10/25/the-macbook-air-a-sign-of-things-to-come/ The Macbook Air: A Sign of Things to Come – Digital Gravitas]</ref>

On older Intel based PCs, the northbridge was also named external '''memory controller hub''' or '''graphics and memory controller hub''' if equipped with integrated graphics. Increasingly these functions became integrated into the CPU chip itself,<ref name="register">{{cite web |title=Trustworthy x86 laptops? There is a way, says system-level security ace |url=https://www.theregister.co.uk/2015/12/31/rutkowska_talks_on_intel_x86_security_issues/ |access-date=January 4, 2016 |publisher=The Register}}</ref> beginning with memory and graphics controllers. Since the 2010s, [[die shrink]] and improved [[transistor density]] have allowed for increasing chipset integration, and the functions performed by northbridges are now often incorporated into other components such as southbridges or CPUs themselves.<ref name="register" /><ref name="hope">{{cite web|website=Computer Hope|date=October 7, 2019|title=Northbridge|url=https://www.computerhope.com/jargon/n/northbri.htm}}</ref>

[[Intel]] and [[AMD]] have both released chipsets in which all northbridge functions had been integrated into the CPU.<ref name="hope" /> The corresponding southbridge was renamed by Intel as the [[Platform Controller Hub]] and by AMD as the [[Fusion controller hub]]. AMD FX CPUs continued to require external northbridge and southbridge chips. Modern Intel Core processors have the northbridge integrated on the CPU die, where it is known as the [[uncore|uncore or system agent]].

==Overview==
The northbridge typically handles communications among the [[Central processing unit|CPU]], in some cases [[Random-access memory|RAM]], and [[PCI Express]] (or [[Accelerated Graphics Port|AGP]]) video cards, and the [[southbridge (computing)|southbridge]].<ref>{{cite web|last=Jones |first=George |url=http://www.informit.com/articles/article.aspx?p=339936 |title=Motherboards & Core-Logic Chipsets: The Deep Stuff &#124; What the North Bridge and South Bridge Do |publisher=InformIT.com |date=2004-10-22 |access-date=2015-05-07}}</ref><ref>George Jones - Maximum PC 2005 Buyer's Guide - Prentice Hall PTR - {{ISBN|0-7686-6312-1}}</ref> Some northbridges also contain integrated video controllers, also known as a '''Graphics and Memory Controller Hub''' in Intel systems. Because different processors and RAM require different signaling, a given northbridge will typically work with only one or two classes of CPUs and generally only one type of RAM.

There are a few chipsets that support two types of RAM; generally, these are made available when there is a shift to a new standard. For example, the northbridge from the 2002 [[Nvidia]] [[nForce2]] chipset only worked with [[Socket A]] processors combined with [[DDR SDRAM]].

{{Citation needed span|The [[Intel]] i875 chipset will only work with systems using [[Pentium 4]] processors or [[Celeron]] processors that have a clock speed greater than 1.3&nbsp;GHz and utilize DDR SDRAM, and the Intel i915G chipset only works with the Intel Pentium 4 and the Celeron, but it can use DDR or [[DDR2 SDRAM|DDR2]] memory.|date=January 2022}}

=== PowerPC ===
Northbridge chips are most commonly found on X86-based PCs, but they can also be found on other platforms, such as the [[PowerPC]] platform. A common example of a northbridge on a PowerPC platform is in Apple's older PowerPC-based computers like the [[iMac G5]], which utilized an IBM CPC945 Northbridge chip. According to an Apple Developer note, The [[Power Mac G5]]'s northbridge chip connected to a "Mid Bridge", which then connected to a south bridge.<ref>{{Cite web|url=https://developer.apple.com/library/archive/documentation/Hardware/Conceptual/PowerMac_G5_05Oct/Articles/PwrMacG5-0510_archi.html|title=Power Mac G5 Developer Note}}</ref>

[[File:IBM CPC945 Northbridge (15420568058).jpg|thumb|right|A Kodiak chip: an implementation of IBM's CPC945 northbridge in an [[iMac G5]], a PowerPC-architecture system.]]

==Etymology==
The name is derived from drawing the architecture in the fashion of a map. The CPU would be at the top of the map comparable to due north on most general purpose geographical maps. The CPU would be connected to the [[chipset]] via a fast bridge (the northbridge) located north of other system devices as drawn. The northbridge would then be connected to the rest of the chipset via a slow bridge (the southbridge) located south of other system devices as drawn.

[[File:I815EP.png|thumb|[[Intel]] i815EP northbridge]]

==Overclocking==
The northbridge plays an important part in how far a computer can be [[overclocking|overclocked]], as its frequency is commonly used as a baseline for the CPU to establish its own operating frequency. This chip typically gets hotter as processor speed becomes faster, requiring more cooling. There is a limit to CPU overclocking, as [[digital circuit]]s are limited by physical factors such as rise, fall, delay and storage times of the [[Transistor#Transistor as a switch|transistors]], current gain bandwidth product, [[parasitic capacitance]], and [[propagation delay]], which increases with (among other factors) [[operating temperature]]; consequently most overclocking applications have software-imposed limits on the [[Frequency multiplier|multiplier]] and external clock setting. Additionally, heat is a major limiting factor, as higher voltages are needed to properly activate [[field effect transistors]] inside CPUs and this higher voltage produces larger amounts of heat, requiring greater thermal solutions on the die.

==Evolution==
[[File:IBM ThinkPad T42 Motherboard.jpg|thumb|A part of an [[IBM ThinkPad T42]] laptop motherboard]]
The overall trend in processor design has been to integrate more functions onto fewer components, which decreases overall motherboard cost and improves performance. The [[memory controller]], which handles communication between the CPU and RAM, was moved onto the processor [[Die (integrated circuit)|die]] by AMD beginning with their [[AMD K8]] processors and by Intel with their [[Nehalem (microarchitecture)|Nehalem]] processors. One of the advantages of having the memory controller integrated on the CPU die is to reduce latency from the CPU to memory.

Some northbridge chips have supported dual processors, for example Intel's 5000X memory controller used in the original [[Mac Pro]] from 2006.

Another example of this kind of change is [[Nvidia]]'s [[nForce3]] for [[AMD K8]] systems. It combines all of the features of a normal [[southbridge (computing)|southbridge]] with an [[Accelerated Graphics Port]] (AGP) port and connects directly to the CPU. On [[nForce4]] boards it was marketed as a media communications processor (MCP).

[[AMD Accelerated Processing Unit]] processors feature full integration of northbridge functions onto the CPU chip or package, along with processor cores, memory controller, high speed [[PCI Express]] interface (usually for graphics card), and integrated graphics processing unit ([[iGPU]]). This was an evolution of the AMD K8, since the memory controller was integrated on the CPU die in the AMD64.

The northbridge was replaced by the system agent introduced by the Intel [[Sandy Bridge]] microarchitecture in 2011, which essentially handles all previous Northbridge functions.<ref>{{cite web|url=http://www.anandtech.com/show/3922/intels-sandy-bridge-architecture-exposed/4 |title=The Ring Bus & System Agent - Intel's Sandy Bridge Architecture Exposed |publisher=Anandtech.com |access-date=2015-05-07}}</ref> Intel's Sandy Bridge processors feature full integration of northbridge functions onto the CPU chip, along with processor cores, memory controller, high speed PCI Express interface and integrated [[graphics processing unit]] (GPU). This was a further evolution of the Westmere architecture, which also featured a CPU and GPU [[System in package|in the same package]].<ref>{{cite web |url=http://www.legionhardware.com/articles_pages/intel_core_i5_2500k_and_core_i7_2600k_sandy_bridge.html |title=Intel Core i5 2500K and Core i7 2600K (Sandy Bridge) - Introduction |publisher=Legionhardware.com |access-date=2015-05-07 |archive-url=https://web.archive.org/web/20160605101205/http://www.legionhardware.com/articles_pages/intel_core_i5_2500k_and_core_i7_2600k_sandy_bridge.html |archive-date=2016-06-05 |url-status=dead}}</ref>

Recent AMD processors starting with the [[Zen 2]] have moved some I/O functions out of the CPU die onto an I/O die on the same [[Multi-chip module|MCM]] package as the CPU. This die is not normally considered to be part of the Northbridge, since it is in the same package as the CPU, but it serves some of the same functions.<ref>{{cite web |title=Chiplets Are the Future, but They Won't Replace Moore's Law |url=https://www.extremetech.com/computing/280344-chiplets-are-the-future-but-they-wont-replace-moores-law}}</ref>

==See also==
{{Portal|Electronics}}
* [[Intel Management Engine]] (ME)

==References==
{{Reflist}}

[[Category:IBM PC compatibles]]
[[Category:Chipsets]]