Editing Parallel ATA

{{Short description|Computer storage interface standard}}
{{Infobox connector
| name = Parallel ATA
| type = Internal storage device connector
| image = [[File:PATA-cable.jpg|150px]]
| logo = [[File:IDE Connectors in PCChips M925LR Pentium 4.jpg|150px]]
| caption = Two ATA [[motherboard]] sockets above, with an ATA connector below
| designer = [[Western Digital]] and [[Compaq]],<br />subsequently enhanced by many others
| design_date = 1986
| manufacturer =
| production_date =
| superseded_by = [[Serial ATA]]
| superseded_by_date = 2003
| external = No
| hotplug = No
| length =
| width =
| height =
| electrical =
| ground =
| maximum_voltage =
| maximum_current =
| data_signal =
| data_bit_width = 16 bits
| data_bandwidth = [[Half-duplex]]:<br />8.3&nbsp;MB/s per ATA channel originally<br /> later 33, 66, 100 and 133&nbsp;MB/s per ATA channel
| data_devices = Two{{efn|A single PATA bus is limited to two devices, although a computer can, and often does, have more than one PATA bus.}}
| data_style = [[Parallel communication|Parallel]]
| cable = 40 or 80 conductor [[ribbon cable]]
| physical_connector =
| num_pins = 40
| pinout_col1_name =
| pinout_col2_name =
| pinout_image = [[File:ATA Plug.svg|300px]]
| pinout_caption =
| pin1 = Reset
| pin1_name =
| pin2 = Ground
| pin2_name =
| pin3 = Data 7
| pin3_name =
| pin4 = Data 8
| pin4_name =
| pin5 = Data 6
| pin5_name =
| pin6 = Data 9
| pin6_name =
| pin7 = Data 5
| pin7_name =
| pin8 = Data 10
| pin8_name =
| pin9 = Data 4
| pin9_name =
| pin10 = Data 11
| pin10_name =
| pin11 = Data 3
| pin11_name =
| pin12 = Data 12
| pin12_name =
| pin13 = Data 2
| pin13_name =
| pin14 = Data 13
| pin14_name =
| pin15 = Data 1
| pin15_name =
| pin16 = Data 14
| pin16_name =
| pin17 = Data 0
| pin17_name =
| pin18 = Data 15
| pin18_name =
| pin19 = Ground
| pin19_name =
| pin20 = Key or VCC_in
| pin20_name =
| pin21 = DDRQ
| pin21_name =
| pin22 = Ground
| pin22_name =
| pin23 = I/O write
| pin23_name =
| pin24 = Ground
| pin24_name =
| pin25 = I/O read
| pin25_name =
| pin26 = Ground
| pin26_name =
| pin27 = IOCHRDY
| pin27_name =
| pin28 = Cable select
| pin28_name =
| pin29 = DDACK
| pin29_name =
| pin30 = Ground
| pin30_name =
| pin31 = IRQ
| pin31_name =
| pin32 = No connect
| pin32_name =
| pin33 = Addr 1
| pin33_name =
| pin34 = GPIO_DMA66_Detect
| pin34_name =
| pin35 = Addr 0
| pin35_name =
| pin36 = Addr 2
| pin36_name =
| pin37 = Chip select 1P
| pin37_name =
| pin38 = Chip select 3P
| pin38_name =
| pin39 = Activity
| pin39_name =
| pin40 = Ground
| pinout_notes =
}}<!--

editors:
PLEASE do not "correct" "AT Attachment" to "Advanced Technology Attachment". The relevant standards simply say "AT Attachment". It was never written out as "Advanced Technology Attachment", except in error. The "History and terminology section" makes this clear.
REPEAT: "AT Attachment" IS CORRECT and absolutely should not be expanded.
-->

'''Parallel ATA''' ('''PATA'''), originally '''{{Not a typo|AT Attachment}}''', also known as '''Integrated Drive Electronics''' ('''IDE'''), is a [[standardization|standard]] [[Interface_(computing)|interface]] designed for [[IBM PC]]-compatible computers. It was first developed by [[Western Digital]] and [[Compaq]] in 1986 for compatible hard drives and CD or DVD drives. The connection is used for [[computer storage|storage]] devices such as [[hard disk drive]]s, [[floppy disk drive]]s, [[optical disc drive]]s, and [[tape drive]]s in [[computer]]s.

The standard is maintained by the X3/[[INCITS]] committee.<ref>{{cite web| url = http://www.t13.org| title = t13.org}}</ref> It uses the underlying {{Not a typo|AT Attachment}} (ATA) and {{Not a typo|AT Attachment}} Packet Interface ([[ATA Packet Interface|ATAPI]]) standards.

The Parallel ATA standard is the result of a long history of incremental technical development, which began with the original AT Attachment interface, developed for use in early [[PC AT]] equipment. The ATA interface itself evolved in several stages from [[Western Digital]]'s original [[Integrated Drive Electronics]] (IDE) interface. As a result, many near-synonyms for ATA/ATAPI and its previous incarnations are still in common informal use, in particular Extended IDE (EIDE) and Ultra ATA (UATA). After the introduction of [[SATA]] in 2003, the original ATA was [[retronym|renamed]] to Parallel ATA, or PATA for short.

Parallel ATA cables have a maximum allowable length of {{convert|18|inch|mm|sigfig=3|abbr=on}}.<ref>{{cite web|title=Serial ATA: A Comparison with Ultra ATA Technology |url=http://www.seagate.com/content/pdf/whitepaper/SerialATA_comparison_UATA_Technology.pdf |archive-url=https://web.archive.org/web/20120105073432/http://www.seagate.com/content/pdf/whitepaper/SerialATA_comparison_UATA_Technology.pdf |publisher=Seagate Technology |access-date=23 January 2012 |archive-date=2012-01-05}}</ref><ref>{{cite web|last=Frawley|first=Lucas|title=Parallel vs. Serial ATA|url=http://www.directron.com/patasata.html|archive-url=https://web.archive.org/web/20030801081711/http://www.directron.com/patasata.html|url-status=dead|archive-date=1 August 2003|work=What Is? The Information for Your Computer Questions|publisher=Directron.com|access-date=23 January 2012}}</ref> Because of this limit, the technology normally appears as an internal computer storage interface. For many years, ATA provided the most common and the least expensive interface for this application. It has largely been replaced by SATA in newer systems.

== History and terminology ==
The standard was originally conceived as the "AT Bus Attachment", officially called "AT Attachment" and abbreviated "ATA"<ref name="David A. Deming 2014, page 32">David A. Deming, The Essential Guide to Serial ATA and SATA Express, CRC Press - 2014, page 32</ref><ref>Common Access Method AT Bus Attachment, Rev 1, April 1, 1989, CAM/89-002, CAM Committee</ref> because its primary feature was a direct connection to the 16-bit [[ISA bus]] introduced with the [[IBM PC/AT]].<ref>{{cite web|url=http://www.pcguide.com/ref/hdd/if/ide/over.htm |archive-url=https://web.archive.org/web/20010418002244/http://www.pcguide.com/ref/hdd/if/ide/over.htm |url-status=dead |archive-date=2001-04-18 |title=Ref - Overview of the IDE/ATA Interface |publisher=PCGuide |access-date=2013-06-14}}</ref> The original ATA specifications published by the standards committees use the name "AT Attachment".<ref>{{cite tech report |url=http://www.t13.org/documents/UploadedDocuments/project/d0791r4c-ATA-1.pdf |id=X3.221-1994 |title=AT Attachment Interface for Disk Drives |date=1994 |publisher=ANSI ASC X3 |editor-last=Lamers |editor-first=Lawrence J. |access-date=2014-08-28 |archive-date=2012-03-21 |archive-url=https://web.archive.org/web/20120321035657/http://www.t13.org/Documents/UploadedDocuments/project/d0791r4c-ATA-1.pdf |url-status=dead }}</ref><ref>{{cite tech report |url=http://www.t13.org/Documents/UploadedDocuments/project/d0948r4c-ATA-2.pdf |id=X3.279-1996 |title=AT Attachment Interface with Extensions (ATA-2) revision 4c |date=March 18, 1996 |publisher=ANSI ASC X3T10 |editor-last=Finch |editor-first=Stephen G. |access-date=August 28, 2014 |archive-date=July 28, 2011 |archive-url=https://web.archive.org/web/20110728081254/http://www.t13.org/Documents/UploadedDocuments/project/d0948r4c-ATA-2.pdf |url-status=dead }}</ref><!--<ref>{{cite techreport|url=http://www.t13.org/Documents/UploadedDocuments/project/d2008r7b-ATA-3.pdf | id= X3.279-1996| title=AT Attachment-3 Interface (ATA-3) revision 7b |date=January 27, 1997 |publisher=ANSI ASC X3T13 |editor-last=McLean |editor-first=Peter T.}}</ref><ref>{{cite techreport|url=http://www.t13.org/documents/UploadedDocuments/project/d1153r18-ATA-ATAPI-4.pdf | id= NCITS 317-1998| title=AT Attachment with Packet Interface Extension (ATA/ATAPI-4) revision 18 |date=August 19, 1998 |publisher=ANSI ASC T13 |editor-last=McLean |editor-first=Peter T.}}</ref><ref>{{cite techreport|url=http://www.t13.org/documents/UploadedDocuments/project/d1321r3-ATA-ATAPI-5.pdf | id= NCITS 340-2000
| title=AT Attachment with Packet Interface - 5 (ATA/ATAPI-5) revision 3 |date=February 29, 2000 |publisher=ANSI ASC T13 |editor-last=McLean |editor-first=Peter T.}}</ref><ref>{{cite techreport|url=http://www.t13.org/Documents/UploadedDocuments/project/d1410r3b-ATA-ATAPI-6.pdf | id= NCITS 361-2002| title=AT Attachment with Packet Interface - 6 (ATA/ATAPI-6) revision 3b |date=February 26, 2002 |publisher=ANSI ASC T13 |editor-last=McLean |editor-first=Peter T.}}</ref><ref>{{cite techreport|url=http://www.t13.org/Documents/UploadedDocuments/docs2007/D1532v1r4b-AT_Attachment_with_Packet_Interface_-_7_Volume_1.pdf| id= INCITS 397-2005| title=AT Attachment with Packet Interface - 7 - Volume 1 - Register Delivered Command Set, Logical Register Set (ATA/ATAPI-7 V1) revision 4b|date= April 21 2004|publisher=ANSI ASC T13|editor-last=Masiewicz |editor-first=John}}</ref><ref>{{cite techreport|url=http://www.t13.org/Documents/UploadedDocuments/docs2007/D1532v2r4b-AT_Attachment_with_Packet_Interface_-_7_Volume_2.pdf| id= INCITS 397-2005| title=AT Attachment with Packet Interface - 7 - Volume 2 - Parallel Transport Protocols and Physical Interconnect (ATA/ATAPI-7 V2) revision 4b |date= April 21 2004 |publisher=ANSI ASC T13 |editor-last=McLean |editor-first=Peter T.}}</ref><ref>{{cite techreport|url=http://www.t13.org/Documents/UploadedDocuments/docs2007/D1532v3r4b-AT_Attachment_with_Packet_Interface_-_7_Volume_3.pdf| id= INCITS 397-2005
| title=AT Attachment with Packet Interface - 7 - Volume 3 - Serial Transport Protocols and Physical Interconnect (ATA/ATAPI-7 V3) revision 4b|date= April 21 2004 |publisher=ANSI ASC T13 |editor-last=McLean |editor-first=Peter T.}}</ref>--><ref>{{cite tech report |url=http://www.t13.org/documents/uploadeddocuments/docs2008/d1699r6a-ata8-acs.pdf |id=INCITS 452-2008 |title=AT Attachment 8 - ATA/ATAPI Command Set (ATA8-ACS) revision 6a |date=September 6, 2008 |publisher=ANSI ASC T13 |editor-last=Stevens |editor-first=Curtis E. |access-date=June 21, 2016 |archive-date=October 10, 2014 |archive-url=https://web.archive.org/web/20141010045105/http://www.t13.org/documents/UploadedDocuments/docs2008/D1699r6a-ATA8-ACS.pdf |url-status=dead }}</ref> The "AT" in the IBM PC/AT referred to "Advanced Technology" so ATA has also been referred to as "Advanced Technology Attachment".<ref>William Rothwell, LPIC-2 Cert Guide: (201-400 and 202-400 exams), Pearson IT Certification - 2016, page 150</ref><ref name="David A. Deming 2014, page 32"/><ref>Nitin Vengurlekar, Murali Vallath, Rich Long, Oracle Automatic Storage Management: Under-the-Hood & Practical Deployment Guide, McGraw Hill Professional - 2007, page 6</ref><ref>Simon Collin, Dictionary of Computing: Over 10,000 Terms Clearly Defined, A&amp;C Black, 2009, page 67</ref> When a newer Serial ATA (SATA) was introduced in 2003, the original ATA was renamed to Parallel ATA, or PATA for short.<ref>Scott Mueller, Upgrading and Repairing PCs - Chapter 7. The ATA/IDE Interface, Que Publishing, Jun 22, 2015</ref>

Physical ATA interfaces became a standard component in all PCs, initially on host bus adapters, sometimes on a sound card but ultimately as two physical interfaces embedded in a [[Southbridge (computing)|Southbridge]] chip on a motherboard. Called the "primary" and "secondary" ATA interfaces, they were assigned to [[base addresses]] 0x1F0 and 0x170 on [[ISA bus]] systems. They were replaced by [[SATA]] interfaces.

=== IDE and ATA-1 ===
[[file:1992 80386 PC AMD 386DX-40 no onboard IDE floppy serial parallel sound video or network.jpg|thumb|left|Example of a 1992 80386 PC motherboard with nothing built in other than memory, keyboard, processor, cache, realtime clock, and slots. Such basic motherboards could have been outfitted with either the ST-506 or ATA interface, but usually not both. A single 2-drive ATA interface and a floppy interface was added to this system via the 16-bit ISA card]]

The first version of what is now called the ATA/ATAPI interface was developed by [[Western Digital]] under the name ''Integrated Drive Electronics'' (IDE). Together with [[Compaq]] (the initial customer), they worked with various disk drive manufacturers to develop and ship early products with the goal of remaining software compatible with the existing IBM PC hard drive interface.<ref>{{ cite web | title = System Architecture: a look at hard drives  |url=http://www.ackadia.com/computer/system-architecture/system-architecture-harddrive.php  |access-date=2008-07-25 | archive-url = https://web.archive.org/web/20060508023226/http://www.ackadia.com/computer/system-architecture/system-architecture-harddrive.php |archive-date = 2006-05-08|url-status=live}}</ref> The first such drives appeared internally in Compaq PCs in 1986<ref>{{ cite web | title = The PC Guide: Overview and History of the IDE/ATA Interface | url = http://www.pcguide.com/ref/hdd/if/ide/over.htm | archive-date = 2001-04-18 | archive-url = https://web.archive.org/web/20010418002244/http://www.pcguide.com:80/ref/hdd/if/ide/over.htm|access-date=2008-08-23 | author= Charles M. Kozierok | date = 2001-04-17 }}</ref><ref name="Milligan">{{ cite web |title=The History of CAM ATA | url = http://www.ata-atapi.com/histcam.html | access-date = 2008-08-27 | author = Gene Milligan | date = 2005-12-18 | archive-url = https://web.archive.org/web/20081004160101/http://www.ata-atapi.com/histcam.html | archive-date = 2008-10-04 | url-status = live }}</ref> and were first separately offered by [[Conner Peripherals]] as the CP342 in June 1987.<ref>{{ cite web | url = http://chmss.wikifoundry.com/page/Conner+CP341+Drive+%28ATA%2FIDE%29 | title = Conner CP341 Drive (ATA/IDE) |last=Burniece  |first=Tom  |date=July 21, 2011 | website = Wikifoundry | publisher = Computer History Museum Storage Special Interest Group | access-date = January 10, 2020 | archive-date = February 24, 2021 | archive-url = https://web.archive.org/web/20210224022517/http://chmss.wikifoundry.com/page/Conner+CP341+Drive+(ATA%2FIDE) | url-status = dead }}</ref>

The term ''Integrated Drive Electronics'' refers to the [[drive controller]] being integrated into the drive, as opposed to a separate controller situated at the other side of the connection cable to the drive. On an IBM PC compatible, [[CP/M]] machine, or similar, this was typically a card installed on a [[motherboard]]. The interface cards used to connect a parallel ATA drive to, for example, an [[Industry Standard Architecture|ISA Slot]], are not drive controllers: they are merely [[Host adapter|bridges between the host bus and the ATA interface]]. Since the original ATA interface is essentially just a 16-bit [[ISA bus]], the bridge was especially simple in case of an ATA connector being located on an ISA interface card. The integrated controller presented the drive to the host computer as an array of 512-byte blocks with a relatively simple command interface. This relieved the mainboard and interface cards in the host computer of the chores of stepping the disk head arm, moving the head arm in and out, and so on, as had to be done with earlier [[ST-506]] and [[Enhanced Small Disk Interface|ESDI]] hard drives. All of these low-level details of the mechanical operation of the drive were now handled by the controller on the drive itself. This also eliminated the need to design a single controller that could handle many different types of drives, since the controller could be unique for the drive. The host need only to ask for a particular sector, or block, to be read or written, and either accept the data from the drive or send the data to it.

The interface used by these drives was standardized in 1994 as ANSI standard X3.221-1994, ''AT Attachment Interface for Disk Drives''. After later versions of the standard were developed, this became known as "ATA-1".<ref>{{cite web |title=The PC Guide: ATA (ATA-1) |url=http://www.pcguide.com/ref/hdd/if/ide/stdATA-c.html |access-date=2008-08-23 |author=Charles M. Kozierok |date=2001-04-17}}</ref><ref>{{cite book |last=Technical Committee T13 AT Attachment |title=AT Attachment Interface for Disk Drives (ATA-1) |publisher= Global Engineering Documents |year=1994}}</ref>

A short-lived, seldom-used implementation of ATA was created for the [[IBM Personal Computer XT|IBM XT]] and similar machines that used the 8-bit version of the ISA bus. It has been referred to as [[Industry Standard Architecture#XT-IDE|"XT-IDE"]], "XTA" or "XT Attachment".<ref>{{ cite web | title = Data Recovery and Hard Disk Drive Glossary of Terms | url = http://datarecoveryspecialist.com:80/glossaryofterms.htm | archive-url = https://web.archive.org/web/20120711155459/http://datarecoveryspecialist.com/glossaryofterms.htm | url-status = dead | archive-date = 2012-07-11 | access-date = 2012-07-11 | author = Independent Technology Service | year = 2008 }}</ref>

=== EIDE and ATA-2 ===
{{redirect|EIDE||Eide (disambiguation)}}

In 1994, about the same time that the ATA-1 standard was adopted, Western Digital introduced drives under a newer name, Enhanced IDE (EIDE). These included most of the features of the forthcoming ATA-2 specification and several additional enhancements. Other manufacturers introduced their own variations of ATA-1 such as "Fast ATA" and "Fast ATA-2".

The new version of the ANSI standard, ''AT Attachment Interface with Extensions ATA-2'' (X3.279-1996), was approved in 1996. It included most of the features of the manufacturer-specific variants.<ref>{{cite web |title=The PC Guide: ATA (ATA-2) |url=http://www.pcguide.com/ref/hdd/if/ide/stdATA2-c.html |access-date=2008-08-23 |author=Charles M. Kozierok |date=2001-04-17}}</ref><ref name=ATA2>{{cite book |last=Technical Committee T13 AT Attachment |title=AT Attachment Interface with Extensions (ATA-2) |publisher=Global Engineering Documents |year=1996}}</ref>

ATA-2 also was the first to note that devices other than hard drives could be attached to the interface:
{{blockquote|3.1.7 Device: Device is a storage peripheral. Traditionally, a device on the ATA interface has been a hard disk drive, but any form of storage device may be placed on the ATA interface provided it adheres to this standard.|''AT Attachment Interface with Extensions (ATA-2)'', page 2<ref name=ATA2/>}}

=== ATAPI ===
{{main|ATA Packet Interface}}

ATA was originally designed for, and worked only with, [[hard disk drive]]s and devices that could emulate them. The introduction of ATAPI (ATA Packet Interface) by a group called the [[Small Form Factor committee]] (SFF) allowed ATA to be used for a variety of other devices that require functions beyond those necessary for hard disk drives. For example, any removable media device needs a "media eject" command, and a way for the host to determine whether the media is present, and these were not provided in the ATA protocol.

ATAPI is a protocol allowing the ATA interface to carry [[SCSI]] commands and responses; therefore, all ATAPI devices are actually "speaking SCSI" other than at the electrical interface. The SCSI commands and responses are embedded in "packets" (hence "ATA Packet Interface") for transmission on the ATA cable. This allows any device class for which a SCSI command set has been defined to be interfaced via ATA/ATAPI.

ATAPI devices are also "speaking ATA", as the ATA physical interface and protocol are still being used to send the packets. On the other hand, ATA hard drives and solid state drives do not use ATAPI.

ATAPI devices include CD-ROM and [[DVD-ROM]] drives, [[tape drive]]s, and large-capacity [[floppy disk|floppy]] drives such as the [[Zip drive]] and [[SuperDisk drive]]. Some early ATAPI devices were simply SCSI devices with an ATA/ATAPI to SCSI protocol converter added on.{{cn|date=May 2024}}

The SCSI commands and responses used by each class of ATAPI device (CD-ROM, tape, etc.) are described in other documents or specifications specific to those device classes and are not within ATA/ATAPI or the [[T13 subcommittee|T13]] committee's purview. <!-- ATAPI Packet Commands for Block Devices (SFF-8070i) ATAPI Packet Commands for CD-ROMs (SFF-8020i) --> One commonly used set is defined in the [[MultiMedia Commands|MMC]] SCSI command set.

ATAPI was adopted as part of ATA in INCITS 317-1998, ''AT Attachment with Packet Interface Extension (ATA/ATAPI-4)''.<ref>{{cite web |title=The PC Guide: SFF-8020 / ATA Packet Interface (ATAPI) |url=http://www.pcguide.com/ref/hdd/if/ide/stdATAPI-c.html |access-date=2008-08-23 |author=Charles M. Kozierok |date=2001-04-17}}</ref><ref>{{cite web |title=The PC Guide: ATA/ATAPI-4 |url=http://www.pcguide.com/ref/hdd/if/ide/stdATA4-c.html |access-date=2008-08-23 |author=Charles M. Kozierok |date=2001-04-17}}</ref><ref>{{cite book |last=Technical Committee T13 AT Attachment |url=http://www.t13.org/ |title=AT Attachment with Packet Interface Extension (ATA/ATAPI-4) |publisher=Global Engineering Documents |year=1998}}</ref>

=== UDMA and ATA-4 ===
{{See also|UDMA}}

The ATA/ATAPI-4 standard also introduced several "[[UDMA|Ultra DMA]]" transfer modes. These initially supported speeds from 16 to 33&nbsp;MB/s. In later versions, faster Ultra DMA modes were added, requiring new 80-wire cables to reduce crosstalk. The latest versions of Parallel ATA support up to 133&nbsp;MB/s.

=== Ultra ATA ===
Ultra ATA, abbreviated UATA, is a designation that has been primarily used by [[Western Digital Corporation|Western Digital]] for different speed enhancements to the ATA/ATAPI standards. For example, in 2000 Western Digital published a document describing "Ultra ATA/100", which brought performance improvements for the then-current ATA/ATAPI-5 standard by improving maximum speed of the Parallel ATA interface from 66 to 100&nbsp;MB/s.<ref>{{cite web|url=http://www.wdc.com/wdproducts/library/other/2579-001013.pdf |archive-url=https://ghostarchive.org/archive/20221009/http://www.wdc.com/wdproducts/library/other/2579-001013.pdf |archive-date=2022-10-09 |url-status=live|title=Ultra ATA/100 Extends Existing Technology While Increasing Performance and Data Integrity|author=Western Digital Corporation}}</ref> Most of Western Digital's changes, along with others, were included in the ATA/ATAPI-6 standard (2002).

=== x86 BIOS size limitations ===
{{See also|Logical block addressing#Enhanced BIOS|l1=Enhanced BIOS}}
<!-- Also, do we need to mention the earlier 504MB limit in earlier BIOSes, and make clear that it was not the interface's problem but rather the BIOS... or was it? Or is that so old that we don't need to bother? [_maybe the words "such as" already allow for the 504MB, 32MB, and other random limits_]-->

Initially, the size of an ATA drive was stored in the system [[x86]] BIOS using a type number (1 through 45) that predefined the C/H/S parameters<ref name=pdef>{{cite web| url = http://www.kva.kursk.ru/bios1/HTML1/standard.html| title = kursk.ru – Standard CMOS Setup| access-date = 2011-05-27| archive-date = 2018-10-04| archive-url = https://web.archive.org/web/20181004103524/http://www.kva.kursk.ru/bios1/HTML1/standard.html| url-status = dead}}</ref> and also often the landing zone, in which the drive heads are parked while not in use. Later, a "user definable" format<ref name=pdef/> called C/H/S or cylinders, heads, sectors was made available. These numbers were important for the earlier ST-506 interface, but were generally meaningless for ATA—the CHS parameters for later ATA large drives often specified impossibly high numbers of heads or sectors that did not actually define the internal physical layout of the drive at all. From the start, and up to ATA-2, every user had to specify explicitly how large every attached drive was. From ATA-2 on, an "identify drive" command was implemented that can be sent and which will return all drive parameters.

Owing to a lack of foresight by motherboard manufacturers, the system BIOS was often hobbled by artificial C/H/S size limitations due to the manufacturer assuming certain values would never exceed a particular numerical maximum.

The first of these BIOS limits occurred when ATA drives reached sizes in excess of 504 [[Mebibyte|MiB]], because some motherboard BIOSes would not allow C/H/S values above 1024 cylinders, 16 heads, and 63 sectors. Multiplied by 512 bytes per sector, this totals {{gaps|528|482|304}} bytes which, divided by {{gaps|1|048|576}} bytes per [[Mebibyte|MiB]], equals 504 [[Mebibyte|MiB]] (528 [[Megabyte|MB]]).

The second of these BIOS limitations occurred at 1024 [[Cylinder-head-sector#Cylinders|cylinders]], 256 [[Cylinder-head-sector#Heads|heads]], and 63 [[Disk sector|sectors]], and a problem in [[MS-DOS]] limited the number of heads to 255. This totals to {{gaps|8|422|686|720}} bytes (8032.5 [[Mebibyte|MiB]]), commonly referred to as the 8.4 gigabyte barrier. This is again a limit imposed by x86 BIOSes, and not a limit imposed by the ATA interface.

It was eventually determined that these size limitations could be overridden with a small program loaded at startup from a hard drive's boot sector. Some hard drive manufacturers, such as Western Digital, started including these override utilities with large hard drives to help overcome these problems. However, if the computer was booted in some other manner without loading the special utility, the invalid BIOS settings would be used and the drive could either be inaccessible or appear to the operating system to be damaged.<!-- INT 13/48, EDD compatible !? -->

Later, an extension to the x86 BIOS [[INT 13H|disk services]] called the "[[Enhanced Disk Drive]]" (EDD) was made available, which makes it possible to address drives as large as 2<sup>64</sup> sectors.<ref>{{cite web |url = http://home.teleport.com/~brainy/interrupts.htm |title = teleport.com – Interrupts Page |archive-url=https://web.archive.org/web/20011102202657/http://home.teleport.com/~brainy/interrupts.htm |archive-date=2 November 2001 |url-status=dead}}</ref>

=== Interface size limitations ===
The first drive interface used 22-bit addressing mode which resulted in a maximum drive capacity of two gigabytes. Later, the first formalized ATA specification used a 28-bit addressing mode through [[LBA28]], allowing for the addressing of 2<sup>28</sup> ({{val|268435456}}) sectors (blocks) of 512 bytes each, resulting in a maximum capacity of 128&nbsp;[[Gibibyte|GiB]] (137&nbsp;[[Gigabyte|GB]]).

ATA-6 introduced 48-bit addressing, increasing the limit to 128 [[Pebibyte|PiB]] (144 [[Petabyte|PB]]). As a consequence, any ATA drive of capacity larger than about 137&nbsp;GB must be an ATA-6 or later drive. Connecting such a drive to a host with an ATA-5 or earlier interface will limit the usable capacity to the maximum of the interface.

Some operating systems, including [[Windows XP]] pre-SP1, and [[Windows 2000]] pre-SP3, disable [[LBA48]] by default, requiring the user to take extra steps to use the entire capacity of an ATA drive larger than about 137 gigabytes.<ref>{{Cite web|url=http://www.48bitlba.com/enablebiglba.htm |title=EnableBigLba Registry Setting in Windows 2000 and XP |author=FryeWare |year=2005 |access-date=2011-12-29}} The setting is <code>HKEY_LOCAL_MACHINE\SYSTEM\CurrentControlSet\Services\atapi\Parameters\EnableBigLba = 1</code>.</ref>

Older operating systems, such as [[Windows 98]], do not support 48-bit LBA at all. However, members of the third-party group MSFN<ref>{{Cite web|title=Enable48BitLBA - Break the 137 GB barrier!|url=http://www.msfn.org/board/topic/78592-enable48bitlba-break-the-137gb-barrier/|author=LLXX|version=1.1|date=2006-07-12|access-date=2013-09-03|archive-date=2013-12-12|archive-url=https://web.archive.org/web/20131212235154/http://www.msfn.org/board/topic/78592-enable48bitlba-break-the-137gb-barrier/|url-status=dead}}</ref> have modified the Windows 98 disk drivers to add unofficial support for 48-bit LBA to [[Windows 95 OSR2]], [[Windows 98]], [[Windows 98 SE]] and [[Windows ME]].

Some 16-bit and 32-bit operating systems supporting LBA48 may still not support disks larger than 2 [[TiB]] due to using 32-bit arithmetic only; a limitation also applying to many [[boot sector]]s.

=== Primacy and obsolescence ===
Parallel ATA (then simply called ATA or IDE) became the primary storage device interface for PCs soon after its introduction. In some systems, a third and fourth motherboard interface was provided, allowing up to eight ATA devices to be attached to the motherboard. Often, these additional connectors were implemented by inexpensive [[RAID]] controllers.

Soon after the introduction of [[Serial ATA]] (SATA) in 2003, use of Parallel ATA declined. Some PCs and laptops of the era have a SATA hard disk and an optical drive connected to PATA.

As of 2007, some PC [[chipset]]s, for example the Intel ICH10, had removed support for PATA. Motherboard vendors still wishing to offer Parallel ATA with those chipsets must include an additional interface chip. In more recent computers, the Parallel ATA interface is rarely used even if present, as four or more Serial ATA connectors are usually provided on the motherboard and SATA devices of all types are common.

With [[Western Digital]]'s withdrawal from the PATA market, hard disk drives with the PATA interface were no longer in production after December 2013 for other than specialty applications.<ref>{{cite news |url=http://www.myce.com/news/western-digital-stops-sales-of-pata-drives-69960/#! |title=Western Digital stops sales of PATA drives |work=Myce.com |date=2013-12-20 |access-date=2013-12-25}}</ref>

== Interface ==
Parallel ATA cables transfer data 16 bits at a time. The traditional cable uses 40-pin female [[IDC (electrical connector)|insulation displacement connectors]] (IDC) attached to a 40- or 80-conductor [[ribbon cable]]. Each cable has two or three connectors, one of which plugs into a [[host adapter]] interfacing with the rest of the computer system. The remaining connector(s) plug into storage devices, most commonly hard disk drives or optical drives. Each connector has 39 physical pins arranged into two rows (2.54&nbsp;mm, {{frac|1|10}}-inch pitch), with a gap or key at pin 20. Earlier connectors may not have that gap, with all 40 pins available. Thus, later cables with the gap filled in are incompatible with earlier connectors, although earlier cables are compatible with later connectors.

Round parallel ATA cables (as opposed to ribbon cables) were eventually made available for '[[case mod]]ders' for cosmetic reasons, as well as claims of improved [[computer cooling#Rounded cables|computer cooling]] and were easier to handle; however, only ribbon cables are supported by the ATA specifications.

; Pin 20: In the ATA standard, pin 20 is defined as a [[Keying (electrical connector)|mechanical key]] and is not used. The pin's socket on the female connector is often blocked, requiring pin 20 to be omitted from the male cable or drive connector; it is thus impossible to plug it in the wrong way round. However, some [[flash memory]] drives can use pin 20 as VCC_in to power the drive without requiring a special power cable; this feature can only be used if the equipment supports this use of pin 20.<ref>{{cite web| url = http://www.transcendusa.com/Support/FAQ/index.asp?axn=Detail&LangNo=0&FAQNo=212| title = Welcome to Transcend website| access-date = 2007-02-01| archive-date = 2011-09-27| archive-url = https://web.archive.org/web/20110927172830/http://www.transcendusa.com/Support/FAQ/index.asp?axn=Detail&LangNo=0&FAQNo=212| url-status = dead}}</ref>

; Pin 28: Pin 28 of the gray (slave/middle) connector of an 80-conductor cable is not attached to any conductor of the cable. It is attached normally on the black (master drive end) and blue (motherboard end) connectors. This enables [[#Cable_select|cable select]] functionality.

; Pin 34: Pin 34 is connected to ground inside the blue connector of an 80-conductor cable but not attached to any conductor of the cable, allowing for detection of such a cable. It is attached normally on the gray and black connectors.<ref>{{cite web |url=http://www.t10.org/t13/project/d1321r3-ATA-ATAPI-5.pdf |archive-url=https://web.archive.org/web/20060527053621/http://www.t10.org/t13/project/d1321r3-ATA-ATAPI-5.pdf |url-status=dead |archive-date=2006-05-27 |title=Information Technology - AT Attachment with Packet Interface - 5 (ATA/ATAPI-5) - Working Draft |page=315 |date=2000-02-29 |access-date=2013-08-25}}</ref>

=== 44-pin variant ===
A 44-pin variant PATA connector is used for 2.5 inch drives inside laptops. The pins are closer together (2.0&nbsp;mm pitch) and the connector is physically smaller than the 40-pin connector. The extra pins carry power.

=== 80-conductor variant ===
[[file:Samsung HS081HA - 80 pin parallel ATA interface-9696.jpg|thumb|80 pin parallel ATA interface on a 1.8" hard disk]]
[[file:ATA cables.jpg|thumb|300px|Comparison between ATA cables: 40-conductor ribbon cable (top), and 80-conductor ribbon cable (bottom). In both cases, a 40-pin female connector is used.]]

ATA's cables have had 40 conductors for most of its history (44 conductors for the smaller form-factor version used for 2.5" drives—the extra four for power), but an 80-conductor version appeared with the introduction of the ''UDMA/66'' mode. All of the additional conductors in the new cable are [[ground (electricity)|grounds]], interleaved with the signal conductors to reduce the effects of [[capacitive coupling]] between neighboring signal conductors, reducing [[Crosstalk (electronics)|crosstalk]]. Capacitive coupling is more of a problem at higher transfer rates, and this change was necessary to enable the 66 megabytes per second (MB/s) transfer rate of ''UDMA4'' to work reliably. The faster ''UDMA5'' and ''UDMA6'' modes also require 80-conductor cables.

Though the number of conductors doubled, the number of connector pins and the pinout remain the same as 40-conductor cables, and the external appearance of the connectors is identical. Internally, the connectors are different; the connectors for the 80-conductor cable connect a larger number of ground conductors to the ground pins, while the connectors for the 40-conductor cable connect ground conductors to ground pins one-to-one. 80-conductor cables usually come with three differently colored connectors (blue, black, and gray for controller, master drive, and slave drive respectively) as opposed to uniformly colored 40-conductor cable's connectors (commonly all gray). The gray connector on 80-conductor cables has pin 28 CSEL not connected, making it the slave position for drives configured cable select.

=== Multiple devices on a cable ===
If two devices are attached to a single cable, one must be designated as ''Device 0'' (in the past, commonly designated ''master'') and the other as ''Device 1'' (in the past, commonly designated as ''slave'').<ref>{{Cite web |date=2020-05-12 |title=An Introduction to Parallel ATA (PATA) - Definition and History |url=https://www.minitool.com/lib/pata.html |access-date=2023-12-12 |website=MiniTool |language=en-US}}</ref> This distinction is necessary to allow both drives to share the cable without conflict. The ''Device 0'' drive is the drive that usually appears "first" to the computer's [[BIOS]] and/or [[operating system]]. In most personal computers the drives are often designated as "C:" for the ''Device 0'' and "D:" for the ''Device 1'' referring to one active primary partitions on each.

The mode that a device must use is often set by a [[Jumper (computing)|jumper setting]] on the device itself, which must be manually set to ''Device 0'' (''Master'') or ''Device 1'' (''Slave''). If there is a single device on a cable, it should be configured as ''Device 0''. However, some certain era drives have a special setting called ''Single'' for this configuration (Western Digital, in particular). Also, depending on the hardware and software available, a ''Single'' drive on a cable will often work reliably even though configured as the ''Device 1'' drive (most often seen where an optical drive is the only device on the secondary ATA interface).

The words ''primary'' and ''secondary'' typically refers to the two IDE cables, which can have two drives each (primary master, primary slave, secondary master, secondary slave).

There are many debates about how much a slow device can impact the performance of a faster device on the same cable. On early ATA host adapters, both devices' data transfers can be constrained to the speed of the slower device, if two devices of different speed capabilities are on the same cable. For all modern ATA host adapters, this is not true, as modern ATA host adapters support ''independent device timing''. This allows each device on the cable to transfer data at its own best speed. Even with earlier adapters without independent timing, this effect applies only to the data transfer phase of a read or write operation.<ref>{{cite web |url=http://www.pcguide.com/ref/hdd/if/ide/confTiming-c.html |title=Independent Master/Slave Device Timing |access-date=2008-08-08 |author=Charles M. Kozierok |date=2001-04-17 |work=The PC Guide}}</ref> This is caused by the omission of both overlapped and queued feature sets from most parallel ATA products. Only one device on a cable can perform a read or write operation at one time; therefore, a fast device on the same cable as a slow device under heavy use will find it has to wait for the slow device to complete its task first. However, most modern devices will report write operations as complete once the data is stored in their onboard cache memory, before the data is written to the (slow) magnetic storage. This allows commands to be sent to the other device on the cable, reducing the impact of the "one operation at a time" limit. The impact of this on a system's performance depends on the application. For example, when copying data from an optical drive to a hard drive (such as during software installation), this effect probably will not matter. Such jobs are necessarily limited by the speed of the optical drive no matter where it is. But if the hard drive in question is also expected to provide good throughput for other tasks at the same time, it probably should not be on the same cable as the optical drive.

=== Cable select ===
A drive mode called ''cable select'' was described as optional in ATA-1 and has come into fairly widespread use with ATA-5 and later. A drive set to "cable select" automatically configures itself as ''Device 0'' or ''Device 1'', according to its position on the cable. Cable select is controlled by pin 28. The host adapter grounds this pin; if a device sees that the pin is grounded, it becomes the ''Device 0'' (master) device; if it sees that pin 28 is open, the device becomes the ''Device 1'' (slave) device.

This setting is usually chosen by a [[Jumper (computing)|jumper setting]] on the drive called "cable select", usually marked ''CS'', which is separate from the ''Device 0/1'' setting.

If two drives are configured as ''Device 0'' and ''Device 1'' manually, this configuration does not need to correspond to their position on the cable. Pin 28 is only used to let the drives know their position on the cable; it is not used by the host when communicating with the drives. In other words, the manual master/slave setting using jumpers on the drives takes precedence and allows them to be freely placed on either connector of the ribbon cable.

With the 40-conductor cable, it was very common to implement cable select by simply cutting the pin 28 wire between the two device connectors; putting the slave ''Device 1'' device at the end of the cable, and the master ''Device 0'' on the middle connector. This arrangement eventually was standardized in later versions. However, it had one drawback: if there is just one master device on a 2-drive cable, using the middle connector, this results in an unused stub of cable, which is undesirable for physical convenience and electrical reasons. The stub causes [[signal reflections]], particularly at higher transfer rates.

Starting with the 80-conductor cable defined for use in ATAPI5/UDMA4, the master ''Device 0'' device goes at the far-from-the-host end of the {{convert|18|in|mm|adj=on}} cable on the black connector, the slave ''Device 1'' goes on the grey middle connector, and the blue connector goes to the host (e.g. motherboard IDE connector, or IDE card). So, if there is only one (''Device 0'') device on a two-drive cable, using the black connector, there is no cable stub to cause reflections (the unused connector is now in the middle of the ribbon). Also, cable select is now implemented in the grey middle device connector, usually simply by omitting the pin 28 contact from the connector body.

=== Serialized, overlapped, and queued operations ===
The parallel ATA protocols up through ATA-3 require that once a command has been given on an ATA interface, it must complete before any subsequent command may be given. Operations on the devices must be serialized{{mdashb}}with only one operation in progress at a time{{mdashb}}with respect to the ATA host interface. A useful mental model is that the host ATA interface is busy with the first request for its entire duration, and therefore can not be told about another request until the first one is complete. The function of serializing requests to the interface is usually performed by a device driver in the host operating system.

The ATA-4 and subsequent versions of the specification have included an "overlapped feature set" and a "queued feature set" as optional features, both being given the name "[[Tagged Command Queuing]]" (TCQ), a reference to a set of features from SCSI which the ATA version attempts to emulate. However, support for these is extremely rare in actual parallel ATA products and device drivers because these feature sets were implemented in such a way as to maintain software compatibility with its heritage as originally an extension of the ISA bus. This implementation resulted in excessive CPU utilization which largely negated the advantages of command queuing. By contrast, overlapped and queued operations have been common in other storage buses; in particular, SCSI's version of tagged command queuing had no need to be compatible with APIs designed for ISA, allowing it to attain high performance with low overhead on buses which supported first party DMA like PCI. This has long been seen as a major advantage of SCSI.

The [[Serial ATA]] standard has supported [[Native Command Queuing|native command queueing]] (NCQ) since its first release, but it is an optional feature for both host adapters and target devices. Many obsolete PC motherboards do not support NCQ, but modern SATA hard disk drives and SATA [[solid-state drive]]s usually support NCQ, which is not the case for removable (CD/DVD) drives because the ATAPI command set used to control them prohibits queued operations.

=== HDD passwords and security ===
{{redirect|ATA Secure Erase|ATA Secure Erase with flash memory|Write amplification#Secure erase|general use|Disk formatting#Recovery of data from a formatted disk}}

ATA devices may support an optional security feature which is defined in an ATA specification, and thus not specific to any brand or device. The security feature can be enabled and disabled by sending special ATA commands to the drive. If a device is locked, it will refuse all access until it is unlocked. A device can have two passwords: A User Password and a Master Password; either or both may be set. There is a Master Password identifier feature which, if supported and used, can identify the current Master Password (without disclosing it). The master password, if set, can used by the administrator to reset user password, if the end user forgot the user password. On some laptops and some business computers, their [[BIOS]] can control the ATA passwords.<ref>{{Cite web |url=http://h10032.www1.hp.com/ctg/Manual/c01580453|title=Security User Guide |publisher=HP |location=US |date=June 2008 |id=463798-003 |edition=third}}</ref>

A device can be locked in two modes: High security mode or Maximum security mode. Bit 8 in word 128 of the IDENTIFY response shows which mode the disk is in: 0 = High, 1 = Maximum. In High security mode, the device can be unlocked with either the User or Master password, using the "SECURITY UNLOCK DEVICE" ATA command. There is an attempt limit, normally set to 5, after which the disk must be power cycled or hard-reset before unlocking can be attempted again. Also in High security mode, the SECURITY ERASE UNIT command can be used with either the User or Master password. In Maximum security mode, the device can be unlocked only with the User password. If the User password is not available, the only remaining way to get at least the bare hardware back to a usable state is to issue the SECURITY ERASE PREPARE command, immediately followed by SECURITY ERASE UNIT. In Maximum security mode, the SECURITY ERASE UNIT command requires the Master password and will completely erase all data on the disk. Word 89 in the IDENTIFY response indicates how long the operation will take.<ref>{{cite web| url = http://www.rockbox.org/lock.html| title = Rockbox – Unlocking a password protected harddisk}}</ref> While the ATA lock is intended to be impossible to defeat without a valid password, there are purported workarounds to unlock a device.{{Citation needed|date=July 2019}}

For [[NVMe]] drives, the security features, including lock passwords, were defined in the [[Opal Storage Specification|OPAL]] standard.<ref>{{cite web | url=https://trustedcomputinggroup.org/resource/tcg-storage-opal-and-nvme/ | title=TCG Storage, Opal, and NVMe }}</ref>

For [[Data sanitization|sanitizing]] entire disks, the built-in Secure Erase command is effective when implemented correctly.<ref name="Wei2011">{{ cite q | Q115346857 |url=https://www.usenix.org/legacy/events/fast11/tech/full_papers/Wei.pdf | journal = FAST'11: Proceedings of the 9th USENIX conference on File and storage technologies | access-date = 2018-01-08 | ref = {{sfnref|Wei|2011}} }}</ref> There have been a few reported instances of failures to erase some or all data.<ref>{{cite web |url=http://www.hddoracle.com/viewtopic.php?f=56&t=1412 |title=Beware – When SECURE ERASE doesn't erase at all |publisher=The HDD Oracle |date=2015-11-15 |access-date=2018-01-08}}</ref><ref>{{cite web |url=https://tinyapps.org/docs/wipe_drives_hdparm.html |title=ATA Secure Erase (SE) and hdparm |date=2016-11-06 |access-date=2018-01-08}}</ref><ref name="Wei2011" /> On some laptops and some business computers, their [[BIOS]] can utilize Secure Erase to erase all data of the disk.

=== External parallel ATA devices ===
[[file:LG Super Multi GSA-E40N - PATA 2 USB Adapter-8672.jpg|thumb|PATA to USB Adapter. It is mounted on the rear of a DVD-RW optical drive inside an external case]]

Due to a short cable length specification and shielding issues it is extremely uncommon to find external PATA devices that directly use PATA for connection to a computer. A device connected externally needs additional cable length to form a U-shaped bend so that the external device may be placed alongside, or on top of the computer case, and the standard cable length is too short to permit this. For ease of reach from motherboard to device, the connectors tend to be positioned towards the front edge of motherboards, for connection to devices protruding from the front of the computer case. This front-edge position makes extension out the back to an external device even more difficult. Ribbon cables are poorly shielded, and the standard relies upon the cabling to be installed inside a shielded computer case to meet RF emissions limits.

External hard disk drives or optical disk drives that have an internal PATA interface, use some other interface technology to bridge the distance between the external device and the computer. USB is the most common external interface, followed by Firewire. A bridge chip inside the external devices converts from the USB interface to PATA, and typically only supports a single external device without cable select or master/slave.

== Specifications ==
The following table shows the names of the versions of the ATA standards and the transfer modes and rates supported by each. Note that the transfer rate for each mode (for example, 66.7&nbsp;MB/s for UDMA4, commonly called "Ultra-DMA 66", defined by ATA-5) gives its maximum theoretical transfer rate on the cable. This is simply two bytes multiplied by the effective clock rate, and presumes that every clock cycle is used to transfer end-user data. In practice, of course, protocol overhead reduces this value.

Congestion on the host bus to which the ATA adapter is attached may also limit the maximum burst transfer rate. For example, the maximum data transfer rate for [[conventional PCI]] bus is 133&nbsp;MB/s, and this is shared among all active devices on the bus.

In addition, no ATA [[hard drive]]s existed in 2005 that were capable of measured sustained transfer rates of above 80&nbsp;MB/s. Furthermore, sustained transfer rate tests do not give realistic throughput expectations for most workloads: They use I/O loads specifically designed to encounter almost no delays from seek time or rotational latency. Hard drive performance under most workloads is limited first and second by those two factors; the transfer rate on the bus is a distant third in importance. Therefore, transfer speed limits above 66&nbsp;MB/s really affect performance only when the hard drive can satisfy all I/O requests by reading from its internal [[disk buffer|cache]]—a very unusual situation, especially considering that such data is usually already buffered by the operating system.

{{As of|2021|7}}, mechanical hard disk drives can transfer data at up to 524&nbsp;MB/s,<ref name="TomMach2">{{cite news |title=Seagate Lists the Mach.2: The World's Fastest HDD |publisher=tomshardware.com |author=Anton Shilov |url=https://www.tomshardware.com/uk/news/seagate-lists-dual-actuator-hdd-exos-2x14 |date=2021-05-21 |access-date=2021-07-20 |archive-url=https://archive.today/20210720224703/https://www.tomshardware.com/uk/news/seagate-lists-dual-actuator-hdd-exos-2x14 |archive-date=2021-07-20 |url-status=live }}</ref> which is far beyond the capabilities of the PATA/133 specification. High-performance [[solid state drives]] can transfer data at up to 7000–7500&nbsp;MB/s.<ref name="TomOptane">{{cite news |title=Intel Optane SSD DC P5800X Review: The Fastest SSD Ever Made |publisher=tomshardware.com |author=Sean Webster |url=https://www.tomshardware.com/reviews/intel-optane-ssd-dc-p5800x-review/3 |date=2021-07-02 |access-date=2021-07-20 |archive-url=https://archive.today/20210720224808/https://www.tomshardware.com/reviews/intel-optane-ssd-dc-p5800x-review/3 |archive-date=2021-07-20 |url-status=live }}</ref>

Only the Ultra DMA modes use [[Cyclic redundancy check|CRC]] to detect errors in data transfer between the controller and drive. This is a 16-bit CRC, and it is used for data blocks only. Transmission of command and status blocks do not use the fast signaling methods that would necessitate CRC. For comparison, in Serial ATA, 32-bit CRC is used for both commands and data.<ref>{{cite web |title=Serial ATA—A Comparison with Ultra ATA Technology |url=http://www.serialata.org/docs/serialata%20-%20a%20comparison%20with%20ultra%20ata%20technology.pdf |archive-url=https://web.archive.org/web/20071203002431/http://www.serialata.org/docs/serialata%2520-%2520a%2520comparison%2520with%2520ultra%2520ata%2520technology.pdf |archive-date=2007-12-03 |url-status=dead}} www.serialata.org</ref>

=== Features introduced with each ATA revision ===
{| class="wikitable" style="text-align:left"
|-
! Standard
! Other names
! New transfer modes
! Maximum disk size<br />(512 byte sector)
! Other significant changes
! ANSI reference
|-
| nowrap|IDE (pre-ATA) || IDE || [[Programmed input/output|PIO]] 0 || 2&nbsp;[[Gibibyte|GiB]] (2.1&nbsp;[[Gigabyte|GB]]) || 22-bit [[logical block addressing]] (LBA) || –
|-
| {{nowrap|ATA-1}} || ATA, IDE || {{nowrap|PIO 0, 1, 2}}<br />{{nowrap|[[WDMA (computer)|Single-word DMA]] 0, 1, 2}}<br />Multi-word DMA 0 || 128&nbsp;[[Gibibyte|GiB]] (137&nbsp;[[Gigabyte|GB]]) || 28-bit logical block addressing (LBA) || [http://www.t13.org/documents/UploadedDocuments/project/d0791r4c-ATA-1.pdf X3.221-1994] {{Webarchive|url=https://web.archive.org/web/20120321035657/http://www.t13.org/Documents/UploadedDocuments/project/d0791r4c-ATA-1.pdf |date=2012-03-21 }}<br />(obsolete since 1999)
|-
| {{nowrap|ATA-2}} || EIDE, {{nowrap|Fast ATA}}, {{nowrap|Fast IDE}}, {{nowrap|Ultra ATA}} || PIO 3, 4<br />[[WDMA (computer)|Multi-word DMA]] 1, 2 || || 44-pin Small Form Factor connector, for ≤2.5″ drives, and [[PCMCIA]] connector. Identify drive command.<ref>{{cite web| url = http://www.mpcclub.com/wiki/images/9/9a/Em8550datasheet.pdf| title = mpcclub.com – Em8550datasheet.pdf| access-date = 2011-05-18| archive-date = 2011-07-25| archive-url = https://web.archive.org/web/20110725070824/http://www.mpcclub.com/wiki/images/9/9a/Em8550datasheet.pdf| url-status = dead}}<!--Page 35--></ref><!--and Page 51 in ATA2 spec Opcode ECh, PIO--> [[Plug and play]] support. || [http://www.t13.org/Documents/UploadedDocuments/project/d0948r4c-ATA-2.pdf X3.279-1996] {{Webarchive|url=https://web.archive.org/web/20110728081254/http://www.t13.org/Documents/UploadedDocuments/project/d0948r4c-ATA-2.pdf |date=2011-07-28 }}<br />(obsolete since 2001)
|-
| {{nowrap|ATA-3}} || EIDE || [[WDMA (computer)|Single-word DMA]] modes dropped<ref>{{cite web| url = http://www.pcguide.com/ref/hdd/if/ide/modesDMA-c.html| title = Direct Memory Access (DMA) Modes and Bus Mastering DMA}}</ref> || || [[Self-Monitoring, Analysis and Reporting Technology|S.M.A.R.T.]], Security || [http://www.t13.org/Documents/UploadedDocuments/project/d2008r7b-ATA-3.pdf X3.298-1997] {{Webarchive|url=https://web.archive.org/web/20140722012229/http://www.t13.org/Documents/UploadedDocuments/project/d2008r7b-ATA-3.pdf |date=2014-07-22 }}<br />(obsolete since 2002)
|-
| {{nowrap|ATA/ATAPI-4}} || ATA-4, {{nowrap|Ultra ATA/33}} || {{nowrap|Ultra DMA 0, 1, 2}},<br />also known as UDMA/33 || || AT Attachment Packet Interface (ATAPI) (support for CD-ROM, tape drives etc.), Optional overlapped and queued command set features, [[Host Protected Area]] (HPA), [[CompactFlash]] Association (CFA) feature set for solid state drives || [http://www.t13.org/documents/UploadedDocuments/project/d1153r18-ATA-ATAPI-4.pdf NCITS 317-1998] {{Webarchive|url=https://web.archive.org/web/20140722012712/http://www.t13.org/Documents/UploadedDocuments/project/d1153r18-ATA-ATAPI-4.pdf |archive-url=https://ghostarchive.org/archive/20221009/http://www.t13.org/Documents/UploadedDocuments/project/d1153r18-ATA-ATAPI-4.pdf |archive-date=2022-10-09 |url-status=live |date=2014-07-22 }} {{anchor|NCITS_317-1998}}
|-
| {{nowrap|ATA/ATAPI-5}} || ATA-5, {{nowrap|Ultra ATA/66}} || Ultra DMA 3, 4,<br />also known as UDMA/66 || || 80-wire cables; [[CompactFlash]] connector || [http://www.t13.org/documents/UploadedDocuments/project/d1321r3-ATA-ATAPI-5.pdf NCITS 340-2000] {{Webarchive|url=https://web.archive.org/web/20140722012756/http://www.t13.org/Documents/UploadedDocuments/project/d1321r3-ATA-ATAPI-5.pdf |archive-url=https://ghostarchive.org/archive/20221009/http://www.t13.org/Documents/UploadedDocuments/project/d1321r3-ATA-ATAPI-5.pdf |archive-date=2022-10-09 |url-status=live |date=2014-07-22 }}
|-
| {{nowrap|ATA/ATAPI-6}} || ATA-6, {{nowrap|Ultra ATA/100}} || UDMA 5,<br />also known as UDMA/100|| 128&nbsp;[[Pebibyte|PiB]] (144&nbsp;[[Petabyte|PB]]) || 48-bit LBA, [[Device Configuration Overlay]] (DCO),<br />[[Automatic Acoustic Management]] (AAM)<br /> [[Cylinder-head-sector|CHS]] method of addressing data obsolete || [http://www.t13.org/Documents/UploadedDocuments/project/d1410r3b-ATA-ATAPI-6.pdf NCITS 361-2002] {{Webarchive|url=https://web.archive.org/web/20110915154404/http://www.t13.org/Documents/UploadedDocuments/project/d1410r3b-ATA-ATAPI-6.pdf |date=2011-09-15 }}
|-
| {{nowrap|ATA/ATAPI-7}} || ATA-7, {{nowrap|Ultra ATA/133}} || UDMA 6,<br />also known as UDMA/133<br />SATA/150 || || [[Serial ATA|SATA]] 1.0, Streaming feature set, long logical/physical sector feature set for non-packet devices || {{nowrap|[http://www.t13.org/Documents/UploadedDocuments/docs2007/D1532v1r4b-AT_Attachment_with_Packet_Interface_-_7_Volume_1.pdf INCITS 397-2005 (vol 1)] {{Webarchive |url=https://web.archive.org/web/20200806045654/https://www.t13.org/Documents/UploadedDocuments/docs2007/D1532v1r4b-AT_Attachment_with_Packet_Interface_-_7_Volume_1.pdf |date=2020-08-06}}}} {{nowrap|[http://www.t13.org/Documents/UploadedDocuments/docs2007/D1532v2r4b-AT_Attachment_with_Packet_Interface_-_7_Volume_2.pdf INCITS 397-2005 (vol 2)] {{Webarchive |url=https://web.archive.org/web/20200616160900/https://www.t13.org/Documents/UploadedDocuments/docs2007/D1532v2r4b-AT_Attachment_with_Packet_Interface_-_7_Volume_2.pdf |date=2020-06-16}}}} {{nowrap|[http://www.t13.org/Documents/UploadedDocuments/docs2007/D1532v3r4b-AT_Attachment_with_Packet_Interface_-_7_Volume_3.pdf INCITS 397-2005 (vol 3)] {{Webarchive |url=https://web.archive.org/web/20200615183913/https://www.t13.org/Documents/UploadedDocuments/docs2007/D1532v3r4b-AT_Attachment_with_Packet_Interface_-_7_Volume_3.pdf |date=2020-06-15}}}}
|-
| {{nowrap|ATA/ATAPI-8}} || ATA-8 || SATA/300<br />SATA/600 || || [[Hybrid drive]] featuring non-volatile cache to speed up critical OS files || [http://www.t13.org/documents/uploadeddocuments/docs2008/d1699r6a-ata8-acs.pdf INCITS 452-2008] {{Webarchive|url=https://web.archive.org/web/20141010045105/http://www.t13.org/documents/UploadedDocuments/docs2008/D1699r6a-ATA8-ACS.pdf |date=2014-10-10 }}
|-
| {{nowrap|ACS-2}} || — ||&nbsp;— || ||Data Set Management, Extended Power Conditions, CFast, additional stats., etc. || [http://www.t13.org/documents/UploadedDocuments/docs2011/d2015r7-ATAATAPI_Command_Set_-_2_ACS-2.pdf INCITS 482-2012] {{Webarchive|url=https://web.archive.org/web/20160701095638/http://www.t13.org/documents/UploadedDocuments/docs2011/d2015r7-ATAATAPI_Command_Set_-_2_ACS-2.pdf |date=2016-07-01 }}
|-
| {{nowrap|ACS-3}} || — ||&nbsp;— || || ||
|-
| {{nowrap|ACS-4}} || — ||&nbsp;— || || Zoned ATA Command ||
|}

=== Speed of defined transfer modes ===
{| class="wikitable sortable" style="text-align:center"
|+ Transfer modes
! Mode || # ||Maximum transfer<br /> rate(MB/s) || Cycle time
|-
| rowspan=5 | [[Programmed input/output|PIO]]
| 0 || 3.3 || 600 ns
|-
| 1 || 5.2 || 383 ns
|-
| 2 || 8.3 || 240 ns
|-
| 3 || 11.1 || 180 ns
|-
| 4 || 16.7 || 120 ns
|- style="background:#f5fffa"
| rowspan=3 | [[WDMA (computer)|Single-word DMA]]
| 0 || 2.1 || 960 ns
|- style="background:#f5fffa"
| 1 || 4.2 || 480 ns
|- style="background:#f5fffa"
| 2 || 8.3 || 240 ns
|-
| rowspan=5 | [[WDMA (computer)|Multi-word DMA]]
| 0 || 4.2 || 480 ns
|-
| 1 || 13.3 || 150 ns
|-
| 2 || 16.7 || 120 ns
|-
| 3<ref name=CompactFlash>[[CompactFlash]] 2.1</ref> || 20 || 100 ns
|-
| 4<ref name=CompactFlash /> || 25 || 80 ns
|- style="background:#f5fffa"
| rowspan=8 | [[UDMA|Ultra DMA]]
| 0 || 16.7 || 240 ns ÷ 2
|- style="background:#f5fffa"
| 1 || 25.0 || 160 ns ÷ 2
|- style="background:#f5fffa"
| 2 (Ultra ATA/33) || 33.3 || 120 ns ÷ 2
|- style="background:#f5fffa"
| 3 || 44.4 || 90 ns ÷ 2
|- style="background:#f5fffa"
| 4 (Ultra ATA/66)|| 66.7 || 60 ns ÷ 2
|- style="background:#f5fffa"
| 5 (Ultra ATA/100)|| 100 || 40 ns ÷ 2
|- style="background:#f5fffa"
| 6 (Ultra ATA/133)|| 133 || 30 ns ÷ 2
|- style="background:#f5fffa"
| 7 (Ultra ATA/167)<ref>{{cite web |url = http://compactflash.org/2010/cf-6-0-introduces-industry-leading-performance-and-feature-enhancements/ |title = CompactFlash 6.0 |archive-url=https://web.archive.org/web/20101121233926/http://compactflash.org/2010/cf-6-0-introduces-industry-leading-performance-and-feature-enhancements/ |archive-date=21 November 2010 |url-status=dead}}</ref>|| 167 || 24 ns ÷ 2
|}

== Related standards, features, and proposals ==
=== ATAPI Removable Media Device (ARMD) ===
{{main|ATA Packet Interface}}
ATAPI devices with removable media, other than CD and DVD drives, are classified as ARMD (ATAPI Removable Media Device) and can appear as either a super-floppy (non-partitioned media) or a hard drive (partitioned media) to the [[operating system]]. These can be supported as bootable devices by a BIOS complying with the '''ATAPI Removable Media Device BIOS Specification''',<ref>
{{cite web
 | url = http://www.phoenix.com/NR/rdonlyres/EDD1AAA0-177E-4024-A0B1-E4BD06B673F7/0/specsatapi.pdf
 | archive-url = https://web.archive.org/web/20100102024104/http://www.phoenix.com/NR/rdonlyres/EDD1AAA0-177E-4024-A0B1-E4BD06B673F7/0/specsatapi.pdf
 | title = ATAPI Removable Media Device BIOS Specification, Version&nbsp;1.0
 | date = 1997-01-30 | access-date = 2015-08-25 | archive-date = 2010-01-02
 | author1 = Curtis E. Stevens | author2 = Paul J. Broyles
 | website = phoenix.com
}}</ref> originally developed by [[Compaq|Compaq Computer Corporation]] and [[Phoenix Technologies]]. It specifies provisions in the [[BIOS]] of a [[personal computer]] to allow the computer to be [[booting|bootstrapped]] from devices such as [[Iomega Zip drive|Zip drives]], [[Iomega Jaz drive|Jaz drives]], [[SuperDisk]] (LS-120) drives, and similar devices.

These devices have removable media like [[Floppy disk|floppy disk drives]], but capacities more commensurate with [[hard drive]]s, and programming requirements unlike either. Due to limitations in the floppy controller interface most of these devices were [[ATA Packet Interface|ATAPI]] devices, connected to one of the host computer's ATA interfaces, similarly to a hard drive or [[CD-ROM]] device. However, existing BIOS standards did not support these devices. An ARMD-compliant BIOS allows these devices to be booted from and used under the operating system without requiring device-specific code in the OS.

A BIOS implementing ARMD allows the user to include ARMD devices in the boot search order. Usually an ARMD device is configured earlier in the boot order than the hard drive. Similarly to a floppy drive, if bootable media is present in the ARMD drive, the BIOS will boot from it; if not, the BIOS will continue in the search order, usually with the hard drive last.

There are two variants of ARMD, ARMD-FDD and ARMD-HDD. Originally ARMD caused the devices to appear as a sort of very large floppy drive, either the primary floppy drive device 00h or the secondary device 01h. Some operating systems required code changes to support floppy disks with capacities far larger than any standard floppy disk drive. Also, standard-floppy disk drive emulation proved to be unsuitable for certain high-capacity floppy disk drives such as [[Iomega Zip drive]]s. Later the ARMD-HDD, ARMD-"Hard disk device", variant was developed to address these issues. Under ARMD-HDD, an ARMD device appears to the BIOS and the operating system as a hard drive.

=== ATA over Ethernet ===
In August 2004, Sam Hopkins and Brantley Coile of [[Coraid]] specified a lightweight [[ATA over Ethernet]] protocol to carry ATA commands over [[Ethernet]] instead of directly connecting them to a PATA host adapter. This permitted the established block protocol to be reused in [[storage area network]] (SAN) applications.

=== Compact Flash ===
[[File:Compact Flash is just a miniature IDE-ATA interface.jpg|thumb|Compact flash is a miniature ATA interface, modified to be able to supply power.]]

[[Compact Flash#Technical details|Compact Flash]] (CF) in its ''IDE mode'' is essentially a miniaturized ATA interface, intended for use on devices that use flash memory storage. No interfacing chips or circuitry are required, other than to directly adapt the smaller CF socket onto the larger ATA connector. (Although most CF cards only support IDE mode up to PIO4, making them much slower in IDE mode than their CF capable speed<ref>{{cite web |url=http://support.fccps.cz/download/adv/frr/cf.html |title=CompactFlash cards and DMA/UDMA support in True IDE (tm) mode |first=Frank |last=Rysanek |publisher=FCC PS |location=Czechoslovakia |access-date=2019-06-17}}</ref>)

The ATA connector specification does not include pins for supplying power to a CF device, so power is inserted into the connector from a separate source. The exception to this is when the CF device is connected to a 44-pin ATA bus designed for 2.5-inch hard disk drives, commonly found in notebook computers, as this bus implementation must provide power to a standard hard disk drive.

CF devices can be designated as devices 0 or 1 on an ATA interface, though since most CF devices offer only a single socket, it is not necessary to offer this selection to end users. Although CF can be [[hot-pluggable]] with additional design methods, by default when wired directly to an ATA interface, it is not intended to be hot-pluggable.

== See also ==
* {{anl|Advanced Host Controller Interface}}
* {{anl|Compact Flash}}
* {{anl|CE-ATA}}
* {{anl|FATA (hard drive)}}
* {{anl|INT 13H}}
* {{anl|IT8212}}
* {{anl|Master/slave (technology)}}
* {{anl|List of device bandwidths}}

== References ==
{{refs}}

== Notes ==
{{notelist}}

== External links ==
* [http://www.ce-ata.org/ CE-ATA Workgroup]

{{Computer bus}}

{{Authority control}}

{{DEFAULTSORT:Parallel Ata}}
[[Category:AT Attachment]]
[[Category:Computer storage buses]]
[[Category:Computer connectors]]
[[Category:Computer hardware standards]]