Editing Pentium II

{{Short description|Intel microprocessor}}
{{Use mdy dates|date=October 2019}}
{{Infobox CPU
| name        = Intel Pentium II
| image       = Pentium_II_original_case_badge.png
| caption     = Original Pentium II MMX case badge
| produced-start = {{Start date and age|1997|05|07}}
| produced-end = {{End date and age|2003|12|26}} (all, including embedded units)<ref name="embdiscontinued">{{cite web |url=http://developer.intel.com/design/pcn/Processors/D0102659.pdf |title=Product Change Notification #102659-02|date=August 14, 2002 |publisher=Intel|archive-url=https://web.archive.org/web/20030320150351/http://developer.intel.com/design/pcn/Processors/D0102659.pdf |archive-date=March 20, 2003|url-status=dead|access-date=October 14, 2019}}</ref><br>{{End date and age|2005|01|01}} (discontinuation and end of life)
| slowest     = 233  | slow-unit     = MHz
| fastest     = 450  | fast-unit     = MHz
| fsb-slowest = 66   | fsb-slow-unit = MT/s
| fsb-fastest = 100  | fsb-fast-unit = MT/s
| manuf1      = Intel
| core1       = Klamath (desktop)
| core2       = Deschutes (desktop)
| core3       = Tonga (mobile)
| core4       = Dixon (mobile)
| size-from   = 350 nm
| size-to     = 180 nm
| arch        = [[IA-32]]
| microarch   = [[P6 (microarchitecture)|P6]]
| sock1       = [[Slot 1]]
| sock2       = [[MMC-1]]
| sock3       = [[MMC-2]]
| sock4       = [[Mini-Cartridge]]
| sock5       = PPGA-B615 ([[Micro-PGA1|μPGA1]])
| numcores    = 1
| predecessor = [[Pentium (original)|Pentium]], [[Pentium Pro]], [[Pentium MMX]]
| successor   = [[Pentium III]] (SSE successor), [[Celeron]], [[Pentium 4]] (SSE2 successor)
| extensions  = [[MMX (instruction set)|MMX]], [[Physical Address Extension|PAE]]
| support status = Unsupported
|soldby=Intel|designfirm=Intel|cpuid=Klamath: 80522<br/>Deschutes and Tonga: 80523<br/>Dixon: 80524|l1cache=32 KB (16 KB data + 16 KB instructions)|l2cache=256–512 KB|transistors1='''Klamath''': 7.5 million|transistors3='''Tonga''': 7.5 million|transistors2='''Deschutes''': 7.5 million|transistors4='''Dixon''': 27.4 million}}

[[Image:Pentium II.jpg|thumb|right|upright=1.2|Pentium II processor with MMX technology, [[Slot 1|SECC cartridge]].]]
The '''Pentium II'''<ref>{{cite web |title=Microprocessor Hall of Fame |url=http://www.intel.com/museum/online/hist%5Fmicro/hof/ |publisher=Intel |access-date=2007-08-11 |archive-url = https://web.archive.org/web/20070706032836/http://www.intel.com/museum/online/hist_micro/hof/ <!-- Bot retrieved archive --> |archive-date = 2007-07-06}}</ref> is a brand of sixth-generation [[Intel]] [[x86]] [[microprocessor]]s based on the [[P6 (microarchitecture)|P6]] [[microarchitecture]], introduced on May 7, 1997. It combined the ''P6'' microarchitecture seen on the [[Pentium Pro]] with the [[MMX (instruction set)|MMX instruction set]] of the [[Pentium MMX]], and is the second processor using the [[Pentium (brand)|Pentium]] brand.

Containing 7.5 million [[transistor]]s (27.4 million in the case of the mobile Dixon with 256&nbsp;[[Kilobyte|KB]] on-die [[CPU Cache|L2 cache]]), the Pentium II featured an improved version of the first ''P6''-generation core of the Pentium Pro, which contained 5.5 million transistors. However, its L2 cache subsystem was a downgrade when compared to the Pentium Pro's. In 1998, Intel stratified the Pentium II family by releasing the Pentium II-based [[Celeron]] line of processors for low-end computers and the Intel [[Pentium II Xeon]] line for servers and workstations. The Celeron was characterized by a reduced or omitted (in some cases present but disabled) on-die full-speed L2 cache and a 66 MT/s FSB. The Xeon was characterized by a range of full-speed L2 cache (from 512&nbsp;KB to 2048&nbsp;KB), a 100&nbsp;MT/s FSB, a different physical interface ([[Slot 2]]), and support for [[symmetric multiprocessing]].

In February 1999, the Pentium II was replaced by the nearly identical [[Pentium III]], which only added the then-new [[Streaming SIMD Extensions|SSE]] instruction set. However, the older family would continue to be produced until June 2001 for desktop units,<ref>{{cite web |date=January 14, 2000 |url=http://developer.intel.com/design/pcn/Processors/D0000896.pdf |title=Product Change Notification #896|publisher=Intel |archive-url=https://web.archive.org/web/20000930070424/http://developer.intel.com/design/pcn/Processors/D0000896.pdf|archive-date=September 30, 2000 |url-status=dead|access-date=October 14, 2019}}</ref> September 2001 for mobile units,<ref>{{cite web |date=March 13, 2000 |url=http://developer.intel.com/design/pcn/Processors/D0000954.pdf |title=Product Change Notification #954 |publisher=Intel |archive-url=https://web.archive.org/web/20000815204044/http://developer.intel.com/design/pcn/Processors/D0000954.pdf |archive-date=August 15, 2000 |url-status=dead|access-date=October 14, 2019}}</ref> and the end of 2003 for embedded devices.<ref name="embdiscontinued"/>

Intel officially declared end-of-life and discontinued Pentium II processors on January 1, 2005.

==Overview==
The Pentium II microprocessor was largely based upon the [[microarchitecture]] of its predecessor, the [[Pentium Pro]], but with some significant improvements.<ref>{{cite journal |title=MMX Microarchitecture of Pentium Processors With MMX Technology and Pentium II Microprocessors |journal=Intel Technology Journal |url=https://www.cs.nmsu.edu/~pfeiffer/classes/473/notes/micro.pdf |year=1997|page=5|access-date=September 1, 2017|archive-url=https://web.archive.org/web/20110112073044/http://www.cs.nmsu.edu/~pfeiffer/classes/473/notes/micro.pdf |archive-date=January 12, 2011|url-status=dead}}</ref>

Unlike previous Pentium and Pentium Pro processors, the Pentium II CPU was packaged in a [[Slot 1|slot]]-based module rather than a [[CPU socket]]. The processor and associated components were carried on a [[daughterboard]] similar to a typical expansion board within a plastic cartridge. A fixed or removable [[heatsink]] was carried on one side, sometimes using its own fan.<ref>Pabst, Thomas. [https://archive.today/20120918142840/http://www.tomshardware.com/1998/05/03/intel/ Intel's Slot 1 CPUs Uncovered], Tom's Hardware, May 3, 1998.</ref>

This larger package was a compromise allowing Intel to separate the secondary [[CPU cache|cache]] from the processor while still keeping it on a closely coupled [[back-side bus]]. The L2 cache ran at half the processor's clock frequency, unlike the Pentium Pro, whose off die L2 cache ran at the same frequency as the processor. However, its associativity was increased to 16-way (compared to 4-way on the Pentium Pro) and its size was always 512&nbsp;KB, twice of the smallest option of 256&nbsp;KB on the Pentium Pro. Off-package cache solved the Pentium Pro's low yield issues, allowing Intel to introduce the Pentium II at a mainstream price level.<ref name=TomsPIIKlamath>Pabst, Thomas. [https://web.archive.org/web/20060329130136/http://www.tomshardware.com/1997/03/01/the_intel_pentium_ii_/ The Intel Pentium II ('Klamath') CPU], Tom's Hardware, March 1, 1997.</ref><ref name=AnandP2klamath>Lal Shimpi, Anand. [http://www.anandtech.com/showdoc.aspx?i=125&p=1 Intel Pentium II], Anandtech, May 30, 1997.</ref>

Intel improved [[16-bit]] code execution performance on the Pentium II, an area in which the Pentium Pro was at a notable handicap, by adding segment register caches. Most consumer software of the day was still using at least some 16-bit code, because of a variety of factors. The issues with partial registers was also addressed by adding an internal flag to skip pipeline flushes whenever possible.<ref>{{cite web |url=http://qcd.phys.cmu.edu/QCDcluster/intel/vtune/reference/LipsPro_Partial_Stall.htm|title=Partial Register Stall|website=qcd.phys.cmu.edu |access-date=April 23, 2019|archive-date=January 6, 2018|archive-url=https://web.archive.org/web/20180106083054/http://qcd.phys.cmu.edu/QCDcluster/intel/vtune/reference/LipsPro_Partial_Stall.htm|url-status=dead}}</ref> To compensate for the slower L2 cache, the Pentium II featured 32&nbsp;KB of L1 cache, double that of the Pentium Pro, as well as 4 write buffers (vs. 2 on the Pentium Pro); these can also be used by either pipeline, instead of each one being fixed to one pipeline.<ref name="PIIMANUAL">{{cite web|url=https://ftp.utcluj.ro/pub/docs/publicatii/intel/pentiumII.pdf|title=Pentium II Processor Developer's Manual|year=1997|access-date=September 1, 2017|pages=2–14}}</ref><ref>[http://www.pcguide.com/ref/cpu/fam/g6PII-c.html], PC Guide, accessed July 16, 2016.</ref> The Pentium II was also the first P6-based CPU to implement the [[MMX (instruction set)|Intel MMX]] integer [[SIMD]] instruction set which had already been introduced on the [[Pentium MMX]].<ref name=TomsPIIKlamath />

The Pentium II was a more consumer-oriented version of the Pentium Pro. It was cheaper to manufacture because of the separate, slower L2 cache memory. The improved 16-bit performance and MMX support made it a better choice for consumer-level operating systems, such as [[Windows 9x]], and multimedia applications. The slower and cheaper L2 cache's performance penalty was mitigated by the doubled L1 cache and architectural improvements for legacy code. General processor performance was increased while costs were cut.<ref name=TomsPIIKlamath /><ref>Pabst, Thomas. [https://archive.today/20130204145622/http://www.tomshardware.com/1997/04/30/the_empire_strikes_back/ The Empire Strikes Back: Intel's Pentium II CPU], Tom's Hardware, April 30, 1997.</ref>

All ''Klamath'' and some early ''Deschutes'' Pentium IIs use a combined L2 cache controller / [[tag RAM]] chip that only allows for 512&nbsp;MB to be cached; while more RAM could be installed in theory, this would result in very slow performance. While this limit was practically irrelevant for the average home user at the time, it was a concern for some workstation or server users. Presumably, Intel put this limitation deliberately in place to distinguish the Pentium II from the more upmarket Pentium Pro line, which has a full 4&nbsp;GB cacheable area. The '82459AD' revision of the chip on some 333&nbsp;MHz and all 350&nbsp;MHz and faster Pentium IIs lifted this restriction and also offered a full 4 GB cacheable area.<ref>[http://www.tomshardware.com/reviews/overclocking-special,94-2.html], Tom's Hardware, accessed July 16, 2016.</ref><ref>[http://www.pcguide.com/ref/mbsys/cache/charCacheability-c.html], PC Guide, accessed July 16, 2016.</ref>

==Variants==
==={{Anchor|Klamath}}Klamath===
The original ''Klamath'' Pentium II microprocessor (Intel product code 80522) ran at 233, 266, and 300&nbsp;[[Megahertz|MHz]] and was produced in a 0.35 [[micrometre|μm]] process.<ref name=TomsPIIKlamath /><ref name=sandpileP2>[http://sandpile.org/impl/p2.htm IA-32 implementation Intel P2 (incl. Celeron and Xeon)] {{webarchive|url=https://archive.today/20070927222115/http://sandpile.org/impl/p2.htm |date=2007-09-27 }}, SandPile.org, accessed May 5, 2007.</ref> The 300&nbsp;MHz version, however, only became available in large quantities later in 1997.<ref name=sandpileP2 /> These CPUs had a 66&nbsp;MHz [[front-side bus]] and were initially used on motherboards equipped with the aging [[List of Intel chipsets#Pentium Pro/II/III chipsets|Intel 440FX]] ''Natoma'' chipset designed for the Pentium Pro.<ref>[http://www.pcguide.com/ref/mbsys/chip/pop/g6I440FX-c.html Intel 440FX], PCGuide, accessed May 5, 2007.</ref> Pentium II-based systems using the [[List of Intel chipsets|Intel 440LX]] ''Balboa'' chipset widely popularized [[SDRAM]] (which was to replace [[Dynamic random access memory|EDO RAM]] and was already introduced with 430VX), and the [[Accelerated Graphics Port|AGP]] graphics bus.<ref>[http://www.pcguide.com/ref/mbsys/chip/pop/g6I440LX-c.html Intel 440LX], PCGuide, accessed May 5, 2007.</ref>

On July 14, 1997, Intel announced a version of the Pentium II ''Klamath'' with 2× 72-bit ECC L2 cache for entry-level servers, as opposed to the 2× 64-bit non-ECC L2 cache on regular models.<ref>[http://www.intel.com/pressroom/archive/releases/1997/SP071497.HTM], Intel, accessed February 4, 2017.</ref> The extra bits give it error-correction capability built into hardware, without impacting performance. The variant can be determined through the CPU part number.

In Intel's "Family/Model/Stepping" scheme, Klamath CPUs are family 6, model 3.

==={{Anchor|Deschutes}}Deschutes===
The ''Deschutes'' core Pentium II (80523), which debuted at 333&nbsp;MHz in January 1998, was produced with a 0.25 [[micrometre|μm]] process and has a significantly lower power draw.<ref name=sandpileP2 /> The die size is 113&nbsp;mm<sup>2</sup>. The 333&nbsp;MHz variant was the final Pentium II CPU that used the older 66&nbsp;MT/s [[front-side bus]]; all subsequent Deschutes-core models used a 100&nbsp;MT/s FSB. Later in 1998, Pentium IIs running at 266, 300, 350, 400, and 450&nbsp;MHz were also released.<ref name=sandpileP2/> The ''Deschutes'' core introduced FXSAVE and FXRSTOR instructions for fast FPU context save and restore.<ref>{{cite web|url=http://techweb.cmp.com/eet/news/98/995news/field.html |archive-url=https://web.archive.org/web/19981205135433/http://techweb.cmp.com/eet/news/98/995news/field.html |url-status=dead |archive-date=1998-12-05 |title=EE Times - News |access-date=2019-10-14}}</ref> Towards the end of its design life, Deschutes chips capable of 500&nbsp;MHz within Intel cooling and design specifications were produced. However, these were not marketed. Rather than destroy already multiplier-locked units, those Deschutes units that had been tested and locked with a multiplier of 5 were sold as being 333&nbsp;MHz. This was accomplished by disabling the 100&nbsp;MHz bus option. [[Overclockers]], upon learning of this, purchased the units in question and ran them well over 500&nbsp;MHz; most notably, when overclocking, the final batch of "333 MHz" CPUs were capable of speeds much higher than CPUs sold at 350, 400, or 450&nbsp;MHz.{{Citation needed|date=August 2012}}

Concurrent with the release of Deschutes cores supporting a 100&nbsp;MT/s front-side bus was Intel's release of the [[Intel 440BX|440BX]] ''Seattle'' chipset and its derivatives, the 440MX, 450NX, and 440ZX chipsets. Replacing the aged 66&nbsp;MHz FSB, which had been on the market since 1993, the 100&nbsp;MHz FSB resulted in solid performance improvements for the Pentium II lineup. Pentium II chips starting with 350&nbsp;MHz were released in both SECC and SECC2 form factors. Late Pentium IIs also marked the switch to [[flip-chip]] based packaging with direct heatsink contact to the die, as opposed to traditional bonding.

While ''Klamath'' features 4 cache chips and simulates dual-porting through interleaving (2x 64-bit) for a slight performance improvement on concurrent accesses, ''Deschutes'' only sports 2 cache chips and offers slightly lower L2 cache performance at the same clockspeed. Furthermore, ''Deschutes'' always features ECC-enabled L2 cache.<ref>{{cite journal |title=333: Pentium II, die Dritte|series=Trends & News |language=de |author-first1=Georg |author-last1=Schnurer |date=January 29, 1998 |journal=[[c't – magazin für computertechnik]] |volume=1998 |issue=3 |page=122 |publisher=[[Heise Verlag]] |url=https://www.heise.de/ct/artikel/333-Pentium-II-die-Dritte-286144.html |access-date=September 6, 2017 |url-status=live |archive-url=https://web.archive.org/web/20170222153434/https://www.heise.de/ct/artikel/333-Pentium-II-die-Dritte-286144.html |archive-date=February 22, 2017}}</ref>

[[File:Pentium II Xeon 450 512.jpg|thumb|right|Pentium II Xeon 450 MHz with 512&nbsp;KB cache. Cartridge cover has been removed.]]
The [[Pentium II Xeon]] was a high-end version of Deschutes core intended for use on [[workstation]]s and [[Server (computing)|server]]s. Principally, it used a different type of slot ([[Slot 2]]), case, board design, and more expensive full-speed custom L2 cache, which was off-die. Versions were produced with 512&nbsp;KB, 1&nbsp;MB or 2&nbsp;MB L2 caches by varying the number of 512&nbsp;KB chips incorporated on the board.<ref>Pabst, Thomas. [https://archive.today/20120919073858/http://www.tomshardware.com/1998/07/02/intel/ Intel's Pentium II Xeon Processor], Tom's Hardware, July 2, 1998.</ref>

[[File:KL Intel PPro Overdrive P6T Top.jpg|thumb|Pentium II Overdrive without heatsink. Deschutes core on left, cache on right]]

In Intel's "Family/Model/Stepping" scheme, Deschutes CPUs are family 6, model 5 and have the part number 80523.

====Pentium II OverDrive====
In 1998, the 0.25 μm Deschutes core was utilized in the creation of the [[Intel Pentium II Overdrive#Socket 8|Pentium II Overdrive]] processor, which was aimed at allowing corporate [[Pentium Pro]] users to upgrade their aging servers. Combining the Deschutes core in a [[flip-chip]] package with a 512&nbsp;KB full-speed L2 cache chip from the Pentium II Xeon into a [[Socket 8]]-compatible module resulted in a 300 or 333&nbsp;MHz processor that could run on a 60 or 66&nbsp;MHz front-side bus. This combination brought together some of the more attractive aspects of the Pentium II and the Pentium II Xeon: [[MMX (instruction set)|MMX]] support/improved 16-bit performance and full-speed L2 cache, respectively.<ref>[https://web.archive.org/web/*/http://www.heise.de/ct/english/98/18/020/ Wayback machine archive of Heise, accessed June 17, 2009]</ref> The later "Dixon" mobile Pentium II would emulate this combination with 256&nbsp;KB of full-speed cache.

In Intel's "Family/Model/Stepping" scheme, the Pentium II OverDrive CPU identifies itself as family 6, model 3, though this is misleading, as it is not based on the family 6/model 3 Klamath core. As mentioned in the Pentium II Processor update documentation from Intel, "although this processor has a CPUID of 163xh, it uses a Pentium II processor CPUID 065xh processor core."<ref>{{Cite web|date=July 2002 |url=http://download.intel.com/design/PentiumII/specupdt/24333749.pdf|title=Intel Pentium II Processor Specification Update|archive-url=https://web.archive.org/web/20110831012432/http://download.intel.com/design/PentiumII/specupdt/24333749.pdf|url-status=dead|archive-date=August 31, 2011}}</ref>

==={{Anchor|Tonga}}Tonga===
The 0.25&nbsp;μm ''Tonga'' core was the first mobile Pentium II and had all of the features of the desktop models.

In Intel's "Family/Model/Stepping" scheme, Tonga CPUs are family 6, model 5.

==={{Anchor|Dixon}}Dixon===
[[File:Intel Pentium II Dixon die shot.jpg|thumb|Pentium II Dixon die]]
Later, in 1999, the 0.25; 0.18 (400&nbsp;[[Hertz|MHz]]) μm ''Dixon'' core with 256&nbsp;KB of on-die full speed cache was produced for the mobile market. Reviews showed that the Dixon core was the fastest type of Pentium II produced.<ref name=sandpileP2 />

In Intel's "Family/Model/Stepping" scheme, Dixon CPUs are family 6, model 6 and their Intel product code is 80524. These identifiers are shared with the ''Mendocino'' [[Mendocino (microprocessor)|Celeron]] processors.

==Core specifications==
===Desktop===
[[File:Pentium II inside front.jpg|thumb|A Pentium II ''Klamath'' backside with its plastic casing removed, showing the commodity L2 cache chips and the cache tag SRAM (center).]]
[[File:Intel Pentium II 400 SL357 SECC2.jpg|thumb|A Pentium II ''Deschutes'', SECC2 variant. CPU core in the middle, cache on the right.]]
[[File:Intel@250nm@P6@Deschutes@Pentium II@flipchip PB 713539-001 DSCx1 polysilicon microscope stitched@5x (38025161182).jpg|thumb|Deschutes die shot]]

====Klamath (80522)====
* L1 cache: 16 + 16&nbsp;KB (Data + Instructions)
* L2 cache: 512&nbsp;KB, as external chips on the CPU module clocked at half the CPU frequency.
* Packaging: [[Slot 1]] module
* [[MMX (instruction set)|MMX]]
* [[Front-side bus]]: 66&nbsp;MT/s, [[GTL+]]
* VCore: 2.8&nbsp;V
* [[Semiconductor device fabrication|Process]]: 350&nbsp;nm CMOS
* First release: May 7, 1997
* Clockrate: 233, 266, 300&nbsp;MHz

====Deschutes (80523)====
* L1 cache: 16 + 16&nbsp;KB (Data + Instructions)
* L2 cache: 512&nbsp;KB, as external chips on the CPU module clocked at half the CPU frequency.
* Packaging: [[Slot 1]] module
* [[MMX (instruction set)|MMX]]
* [[Front-side bus]]: 66, 100&nbsp;MT/s, [[GTL+]]
* VCore: 2.0&nbsp;V
* Process: 250&nbsp;nm CMOS
* First release: January 26, 1998
* Clockrate: 266–450&nbsp;MHz
** 66&nbsp;MT/s FSB : 266, 300, 333&nbsp;MHz
** 100&nbsp;MT/s FSB: 350, 400, 450&nbsp;MHz

===Deschutes (Pentium II Overdrive)===
* L1 cache: 16 + 16&nbsp;KB (Data + Instructions)
* L2 cache: 512&nbsp;KB external chip on CPU module running at 100% of CPU speed
* Socket: [[Socket 8]]
* [[Front-side bus]]: 60 or 66&nbsp;MT/s, [[GTL+]]
* VCore: 3.1–3.3&nbsp;V (Has on-board voltage regulator)
* Fabrication: 250&nbsp;nm
* Based on the [[#Deschutes|Deschutes]]-generation Pentium II
* First release: 1998
* Supports [[MMX (instruction set)|MMX]] technology
* The sSpec number SL2KE denotes a Pentium II Overdrive sold with an integrated heatsink/fan combination for Socket 8. [Note that the sSpec number SL2EA denotes a Pentium II Overdrive sold with an integrated heatsink but no fan for Slot 1.]

===Mobile===
====Tonga (80523)====
[[File:KL Intel PII Tonga.jpg|right|thumb|upright|Mobile Pentium II (Tonga).]]
'''Mobile Pentium II'''
* L1 cache: 16 + 16&nbsp;KB (Data + Instructions)
* L2 cache: 512&nbsp;KB, as external chips on the CPU module clocked at half the CPU frequency.
* Package: [[MMC-1]], [[MMC-2]], [[Mini-Cartridge]]
* [[MMX (instruction set)|MMX]]
* [[Front-side bus]]: 66&nbsp;MT/s, [[GTL+]]
* VCore: 1.6&nbsp;V
* Process: 250&nbsp;μm CMOS
* First release: April 2, 1998
* Clockrate: 233, 266, 300&nbsp;MHz

====Dixon (80524)====<!-- This section is linked from [[Pentium II]] -->
[[File:KL Intel PII Mobile.jpg|right|thumb|upright|Mobile Pentium II (Dixon) 400 MHz.]]
'''Mobile Pentium II PE ("Performance Enhanced")'''
* L1 cache: 16 + 16&nbsp;KB (Data + Instructions)
* L2 cache: 256&nbsp;KB, on-die, full speed.
* Package: [[BGA1]], [[MMC-1]], [[MMC-2]], [[Micro-PGA1|μPGA1]] PPGA-B615
* [[MMX (instruction set)|MMX]]
* [[Front-side bus]]: 66, 100&nbsp;MT/s, [[GTL+]]
* VCore: 1.5, 1.55, 1.6, 2.0&nbsp;V
* Process: 250, 180 (400 [[Hertz|MHz]]) &nbsp;nm CMOS
* First release: January 25, 1999
* Clockrate: 266, 300, 333, 366, 400&nbsp;MHz
* Containing 27.4 million [[transistor]]s
* [[Die (integrated circuit)|Die]] size ([[semiconductor]] chip) is 10.36&nbsp;mm x 17.36&nbsp;mm = 179.85&nbsp;mm<sup>2</sup>

==See also==
* [[List of Intel Pentium II microprocessors]]
* [[Intel Celeron]]

==References==
{{Reflist}}

==External links==
* [https://web.archive.org/web/20050419074301/http://users.erols.com/chare/remark.htm Listing of various PII, PIII, and Celeron alphanumeric model designations]
* [http://www.cpu-info.com/index2.php?mainid=html/cpu/iP2.php CPU-INFO: Intel Pentium II, indepth processor history] {{Webarchive|url=https://web.archive.org/web/20210417105338/https://www.namebrightstatic.com/images/header_bg.png |date=April 17, 2021 }}
* [http://smithsonianchips.si.edu/ice/cd/9706_542.pdf Construction Analysis: Intel 266MHz 32-Bit Pentium II (Klamath) Processor], Integrated Circuit Engineering Corporation
'''Intel datasheets'''
* [http://datasheets.chipdb.org/Intel/x86/Pentium%20II/24333503.PDF Pentium II (Klamath)]
* [http://datasheets.chipdb.org/Intel/x86/Pentium%20II/24365703.PDF Pentium II (Deschutes)]
* [http://datasheets.chipdb.org/Intel/x86/Pentium%20II/24366902.PDF Mobile Pentium II (Tonga)]
* [http://download.intel.com/design/mobile/datashts/24510301.pdf Mobile Pentium II in Micro-PGA and BGA packages (Dixon)]

{{s-start}}
{{s-bef|before = [[Pentium (original)]] }}
{{s-ttl|title  = Pentium II |years = 1997–1999 }}
{{s-aft|after  = [[Pentium III]] }}
{{s-end}}

{{Intel processors|p6}}

{{DEFAULTSORT:Pentium Ii}}
[[Category:Computer-related introductions in 1997]]
[[Category:Intel x86 microprocessors|Pentium 2]]
[[Category:Superscalar microprocessors]]
[[Category:32-bit microprocessors]]