Editing PowerPC

{{Short description|RISC instruction set architecture by AIM alliance}}
{{Use mdy dates|date=October 2013}}
{{Infobox CPU architecture
|name = PowerPC
|designer = [[AIM alliance|AIM]]
|bits = [[32-bit]]/[[64-bit]] (32 → 64)
|introduced = {{start date and age|1992|10}}
|version = 2.02<ref name=powerpc_archguide>{{cite web |url=https://www.ibm.com/developerworks/systems/library/es-archguide-v2.html |title=PowerPC Architecture Book, Version 2.02 |website=[[IBM]] |archive-url=https://web.archive.org/web/20201129235141/https://www.ibm.com/developerworks/systems/library/es-archguide-v2.html |archive-date=29 November 2020 |date=16 November 2005}}</ref>
|design = [[RISC]]
|type = [[Load–store architecture|Load–store]]
|encoding = Fixed/Variable (Book E)
|branching = [[Status register|Condition code]]
|endianness = [[Bi-endian|Big/Bi]]<!-- Except PowerPC 970 and many others -->
|extensions = [[AltiVec]], [[PowerPC AS]], APU
|open = 
|gpr = 32
|fpr = 32
|vpr = 32 (with [[AltiVec]])
|image=PowerPC logo.svg
|successor = [[Power ISA]]
}}
[[File:IBM PowerPC601 PPC601FD-080-2 top.jpg|thumb|IBM PowerPC 601 microprocessor]]

'''PowerPC''' (with the [[backronym]] '''Performance Optimization With Enhanced RISC – Performance Computing''', sometimes abbreviated as '''PPC''') is a [[reduced instruction set computer]] (RISC) [[instruction set architecture]] (ISA) created by the 1991 [[Apple Inc.|Apple]]–[[IBM]]–[[Motorola]] alliance, known as [[AIM alliance|AIM]]. PowerPC, as an evolving instruction set, has been named [[Power ISA]] since 2006, while the old name lives on as a [[trademark]] for some implementations of [[Power Architecture]]–based processors.

Originally intended for [[personal computer]]s, the architecture is well known for being used by Apple's desktop and laptop lines from 1994 until 2006, and in several [[videogame console]]s including Microsoft's [[Xbox 360]], Sony's [[PlayStation 3]], and Nintendo's [[GameCube]], [[Wii]], and [[Wii U]]. PowerPC was also used for the [[Curiosity (rover)|Curiosity]] and [[Perseverance (rover)|Perseverance]] rovers on Mars and a variety of satellites. It has since become a niche architecture for personal computers, particularly with [[AmigaOS 4]] implementations, but remains popular for [[embedded system]]s.

PowerPC was the cornerstone of AIM's [[PReP]] and [[Common Hardware Reference Platform]] (CHRP) initiatives in the 1990s. It is largely based on the earlier [[IBM POWER architecture]], and retains a high level of compatibility with it; the architectures have remained close enough that the same programs and [[operating system]]s will run on both if some care is taken in preparation; newer chips in the [[IBM Power microprocessors|Power series]] use the [[Power ISA]].

== History ==

The history of RISC began with IBM's [[IBM 801|801]] research project, on which [[John Cocke (computer scientist)|John Cocke]] was the lead developer, where he developed the concepts of [[Reduced instruction set computing|RISC]] in 1975–78. 801-based microprocessors were used in a number of IBM embedded products, eventually becoming the 16-register [[IBM ROMP]] processor used in the [[IBM RT PC]]. The RT PC was a rapid design implementing the RISC architecture. Between the years of 1982 and 1984, IBM started a project to build the fastest microprocessor on the market; this new [[32-bit]] architecture became referred to as the ''America Project'' throughout its development cycle, which lasted for approximately 5–6 years. The result is the [[IBM POWER Instruction Set Architecture|POWER instruction set architecture]], introduced with the [[RS/6000|RISC System/6000]] in early 1990.

The [[POWER1|original POWER microprocessor]], one of the first [[superscalar]] RISC implementations, is a high performance, multi-chip design. IBM soon realized that a single-chip microprocessor was needed in order to scale its RS/6000 line from lower-end to high-end machines. Work began on a one-chip POWER microprocessor, designated the RSC ([[RISC Single Chip]]). In early 1991, IBM realized its design could potentially become a high-volume microprocessor used across the industry.

=== Apple and Motorola involvement ===
Apple had already realized the limitations and risks of its dependency upon a single CPU vendor at a time when Motorola was falling behind on delivering the [[Motorola 68040|68040]] CPU. Furthermore, Apple had conducted its own research and made an experimental quad-core CPU design called Aquarius,<ref name="Apple: The Inside Story"/>{{rp|86–90}} which convinced the company's technology leadership that the future of computing was in the RISC methodology.<ref name="Apple: The Inside Story"/>{{rp|287–288}} IBM approached Apple with the goal of collaborating on the development of a family of single-chip microprocessors based on the POWER architecture. Soon after, Apple, being one of Motorola's largest customers of desktop-class microprocessors,<ref>{{cite web | title = Tech Files Columns, 1987–1990 | url = http://www.joelwest.org/Press/TechFiles.html#01.03.89 | url-status = live | archive-url = https://web.archive.org/web/20130606044423/http://www.joelwest.org/Press/TechFiles.html#01.03.89 | archive-date = June 6, 2013 | df = mdy-all }}</ref> asked Motorola to join the discussions due to their long relationship, Motorola having had more extensive experience with manufacturing high-volume microprocessors than IBM, and to form a second source for the microprocessors. This three-way collaboration between Apple, IBM, and Motorola became known as the [[AIM alliance]].

In 1991, the PowerPC was just one facet of a larger alliance among these three companies. At the time, most of the personal computer industry was shipping systems based on the Intel 80386 and 80486 chips, which have a [[complex instruction set computer]] (CISC) architecture, and development of the [[P5 (microarchitecture)|Pentium]] processor was well underway. The PowerPC chip was one of several joint ventures involving the three alliance members, in their efforts to counter the growing Microsoft-Intel dominance of personal computing.

For Motorola, POWER looked like an unbelievable deal. It allowed the company to sell a widely tested and powerful RISC CPU for little design cash on its own part. It also maintained ties with an important customer, Apple, and seemed to offer the possibility of adding IBM too, which might buy smaller versions from Motorola instead of making its own.

At this point Motorola already had its own RISC design in the form of the [[Motorola 88000|88000]], which was doing poorly in the market. Motorola was doing well with its [[Motorola 68000|68000]] family and the majority of the funding was focused on this. The 88000 effort was somewhat starved for resources.

The 88000 was already in production, however; [[Data General]] was shipping 88000 machines and Apple already had 88000 prototype machines running. The 88000 had also achieved a number of embedded design wins in telecom applications. If the new POWER one-chip version could be made bus-compatible at a hardware level with the 88000, that would allow both Apple and Motorola to bring machines to market far faster since they would not have to redesign their board architecture.

The result of these various requirements is the PowerPC (''performance computing'') specification. The differences between the earlier POWER instruction set and that of PowerPC is outlined in Appendix E of the manual for PowerPC ISA v.2.02.<ref name=powerpc_archguide />

=== Operating systems ===
Since 1991, IBM had a long-standing desire for a unifying operating system that would simultaneously host all existing operating systems as personalities upon one microkernel. From 1991 to 1995, the company designed and aggressively evangelized what would become [[Workplace OS]], primarily targeting PowerPC.<ref name="Apple: The Inside Story">{{cite book | title=Apple: The Inside Story of Intrigue, Egomania and Business Blunders | first=Jim | last=Carlton | orig-year=1997 | date=1999 | publisher=Random House | isbn=978-0099270737 | oclc=925000937 | url=https://archive.org/details/appleinsidestory0000carl | url-access=registration}}</ref>{{rp|290–291}}

When the first PowerPC products reached the market, they were met with enthusiasm. In addition to Apple, both IBM and the Motorola Computer Group offered systems built around the processors. [[Microsoft]] released [[Windows NT 3.51]] for the architecture, which was used in Motorola's PowerPC servers, and [[Sun Microsystems]] offered a version of its [[Solaris (operating system)|Solaris]] OS. IBM ported its [[IBM AIX|AIX]] [[Unix]]. Workplace OS featured a new port of [[OS/2]] (with Intel emulation for application compatibility), pending a successful launch of the PowerPC 620. Throughout the mid-1990s, PowerPC processors achieved [[Benchmark (computing)|benchmark]] test scores that matched or exceeded those of the fastest x86 CPUs.

Ultimately, demand for the new architecture on the desktop never truly materialized. Windows, OS/2, and Sun customers, faced with the lack of application software for the PowerPC, almost universally ignored the chip. IBM's Workplace OS platform (and thus, OS/2 for PowerPC) was summarily canceled upon its first developers' release in December 1995 due to the simultaneous buggy launch of the PowerPC 620. The PowerPC versions of Solaris and Windows were discontinued after only a brief period on the market. Only on the Macintosh, due to Apple's persistence, did the PowerPC gain traction. To Apple, the performance of the PowerPC was a bright spot in the face of increased competition from Windows 95 and Windows NT-based PCs.

With the cancellation of Workplace OS, the general PowerPC platform (especially AIM's [[Common Hardware Reference Platform]]) was instead seen as a hardware-only compromise to run many operating systems one at a time upon a single unifying vendor-neutral hardware platform.<ref name="Apple: The Inside Story"/>{{rp|287–288}}

In parallel with the alliance between IBM and Motorola, both companies had development efforts underway internally. The [[PowerQUICC]] line was the result of this work inside Motorola. The 4xx series of embedded processors was underway inside IBM. The IBM embedded processor business grew to nearly US$100 million in revenue and attracted hundreds of customers.

{{Blockquote|text=The development of the PowerPC is centered at an Austin, Texas, facility called the Somerset Design Center. The building is named after the site in Arthurian legend where warring forces put aside their swords, and members of the three teams that staff the building say the spirit that inspired the name has been a key factor in the project's success thus far.|source=''MacWeek''<ref name="MacWeek Vol7 Num12">{{cite magazine | magazine=[[MacWeek]] | title=Forces Gather for PowerPC Roundtable | volume=7 | issue=12 | date=March 22, 1993 | url=https://archive.org/details/MacWEEKV07N12/page/n37/mode/1up | page=38| access-date=October 3, 2017}}</ref>}}

{{Quote|text=Part of the culture here is not to have an IBM or Motorola or Apple culture, but to have our own.|source=Motorola's Russell Stanphill, codirector of Somerset<ref name="MacWeek Vol7 Num12"/>}}

=== Breakup of AIM ===
[[File:PowerISA-evolution.svg|thumb|A schematic showing the evolution of the different [[IBM POWER Instruction Set Architecture|POWER]], PowerPC and [[Power ISA|Power]] [[Instruction set architecture|ISAs]]]]

Toward the close of the decade, manufacturing issues began plaguing the AIM alliance in much the same way they did Motorola, which consistently pushed back deployments of new processors for Apple and other vendors: first from Motorola in the 1990s with the PowerPC 7xx and 74xx processors, and IBM with the 64-bit PowerPC 970 processor in 2003. In 2004, Motorola exited the chip manufacturing business by spinning off its semiconductor business as an independent company called [[Freescale Semiconductor]]. Around the same time, IBM exited the 32-bit embedded processor market by selling its line of PowerPC products to [[Applied Micro Circuits Corporation]] (AMCC) and focusing on 64-bit chip designs, while maintaining its commitment of PowerPC CPUs toward game console makers such as [[Nintendo]]'s [[GameCube]], [[Wii]] and [[Wii U]], [[Sony Interactive Entertainment|Sony]]'s [[PlayStation 3]] and [[Microsoft]]'s [[Xbox 360]], of which the latter two both use 64-bit processors. In 2005, Apple announced they would no longer use PowerPC processors in their Apple Macintosh computers, favoring [[Intel]]-produced processors instead, citing the performance limitations of the chip for future personal computer hardware specifically related to heat generation and energy usage, as well as the inability of IBM to move the 970 processor to the 3&nbsp;GHz range. The IBM-Freescale alliance was replaced by an [[open standards]] body called Power.org. Power.org operates under the governance of the IEEE with IBM continuing to use and evolve the PowerPC processor on game consoles and Freescale Semiconductor focusing solely on embedded devices.

IBM continues to develop PowerPC microprocessor cores for use in their [[application-specific integrated circuit]] (ASIC) offerings. Many high volume applications embed PowerPC cores.

The PowerPC specification is now handled by Power.org where IBM, Freescale, and AMCC are members. PowerPC, Cell and POWER processors are now jointly marketed as the [[Power Architecture]]. Power.org released a unified ISA, combining POWER and PowerPC ISAs into the new Power ISA v.2.03 specification and a new reference platform for servers called PAPR (Power Architecture Platform Reference).

=== Generations ===
Many PowerPC designs are named and labeled by their apparent technology generation. That began with the "G3", which was an internal project name inside [[AIM alliance|AIM]] for the development of what would become the [[PowerPC 7xx|PowerPC 750 family]].<ref>{{cite journal
 |url          = https://ieeexplore.ieee.org/document/584742
 |title        = A G3 PowerPC superscalar low-power microprocessor
 |doi          = 10.1109/CMPCON.1997.584742
 |publisher    = IEEE
 |journal      = Proceedings IEEE COMPCON 97. Digest of Papers
 |date         = 23 February 1997
 |author1      = A. R. Kennedy
 |author2      = M. Alexander
 |author3      = E. Fiene
 |author4      = J. Lyon
 |author5      = B. Kuttanna
 |author6      = R. Patel
 |author7      = M. Pham
 |author8      = M. Putrino
 |author9      = C. Croxton
 |author10     = S. Litch
 |author11     = B. Burgess
 |pages        = 315–324
 |s2cid        = 24733198
 |url-access   = subscription
 |access-date  = September 1, 2021
 |archive-date = September 1, 2021
 |archive-url  = https://web.archive.org/web/20210901203418/https://ieeexplore.ieee.org/document/584742
 |url-status   = live
}}</ref> Apple popularized the term "G3" when they introduced [[Power Macintosh G3 beige|Power Mac G3]] and [[PowerBook G3]] at an event at 10 November 1997. Motorola and Apple liked the moniker and used the term "G4" for the 7400 family introduced in 1998<ref>{{cite journal| url=http://www.eecg.toronto.edu/~moshovos/ACA07/lecturenotes/ppcg4%2520(mpr).pdf |title=G4 Is First PowerPC with AltiVec - Due Mid-1999, Motorola's Next Chip Aims at Macintosh, Networking |archive-url=https://web.archive.org/web/20160423044536/http://www.eecg.toronto.edu/~moshovos/ACA07/lecturenotes/ppcg4%2520(mpr).pdf |archive-date=April 23, 2016 |url-status=live |first=Linley |last=Gwennap |date=16 November 1998 |journal=[[Microprocessor Report]]}}</ref><ref>{{cite web |url=https://www.nxp.com/docs/en/white-paper/G4WP.pdf |title=PowerPC G4 Architecture White Paper |archive-url=https://web.archive.org/web/20160418222351/http://www.nxp.com/files/product/doc/G4WP.pdf |archive-date=April 18, 2016 |url-status=live |website=[[NXP Semiconductors]] |first = Susan | last = Seale | date = 2001}}</ref> and the [[Power Mac G4]] in 1999.

At the time the G4 was launched, Motorola categorized all their PowerPC models (former, current and future) according to what generation they adhered to, even renaming the older 603e core "G2". Motorola had a [[Motorola G5 project|G5 project]] that never came to fruition, and Apple later used the name when the [[PowerPC 970|970 family]] launched in 2003, though it was designed and built by IBM.

;PowerPC generations according to Motorola, c. 2000.<ref>{{cite web |url=https://www.nxp.com/docs/en/fact-sheet/PPCCPUINTFACT.pdf |title=Fact Sheet - Motorola PowerPC Processor | url-status=live |archive-url=https://web.archive.org/web/20160419012406/http://www.nxp.com/files/32bit/doc/fact_sheet/PPCCPUINTFACT.pdf |archive-date=April 19, 2016 |website=[[NXP Semiconductors]]}}</ref>
:G1: The [[PowerPC 600#PowerPC 601|601]], [[MPC5xx|500]] and [[PowerQUICC#PowerQUICC I|800]] family processors
:G2: The [[PowerPC 600#PowerPC 602|602]], [[PowerPC 600#PowerPC 603|603]], [[PowerPC 600#PowerPC 604|604]], [[PowerPC 600#PowerPC 620|620]], [[PowerQUICC#PowerQUICC II|8200]] and [[PowerPC 5000|5000]] families
:G3: The [[PowerPC 7xx|750]] and [[PowerQUICC#PowerQUICC II Pro|8300]] families
:G4: The [[PowerPC G4|7400]] and 8400* families
:G5: The [[Motorola G5 project|7500]]* and [[PowerQUICC#PowerQUICC III|8500]] families (Motorola abandoned the G5 name after Apple applied it to the 970)
:G6: The [[PowerPC e700|7600]]*
:''(*) These designs didn't become real products.''

== Design features ==
{{POWER, PowerPC, and Power ISA}}

The PowerPC is designed along [[RISC principles]] and allows for a [[superscalar]] implementation. Versions of the design exist in both 32-bit and 64-bit implementations. Starting with the basic POWER specification, the PowerPC added:
*Support for operation in both big-[[endianness|endian]] and little-endian modes; the PowerPC can switch from one mode to the other at run-time (see [[PowerPC#Endian modes|below]]). This feature is not supported in the [[PowerPC 970]].
*Single-precision forms of some [[floating-point]] instructions, in addition to double-precision forms
*Additional floating-point instructions at the behest of Apple
*A complete 64-bit specification that is backward compatible with the 32-bit mode
*A [[fused multiply–add]]
*A [[paged memory management]] architecture that is used extensively in server and PC systems.
*Addition of a new memory management architecture called Book-E, replacing the conventional paged memory management architecture for embedded applications. Book-E is application software compatible with existing PowerPC implementations but needs minor changes to the operating system.

Some instructions present in the POWER instruction set were deemed too complex and were removed in the PowerPC architecture. Some removed instructions could be emulated by the [[operating system]] if necessary. The removed instructions are:
*[[Conditional moves]]
*Load and store instructions for the quad-precision floating-point data type
*String instructions.

=== Endian modes ===<!-- This section is linked from [[PowerPC]] -->

Most PowerPC chips switch endianness via a bit in the MSR ([[machine state register]]), with a second bit provided to allow the OS to run with a different endianness. Accesses to the "[[inverted page table]]" (a hash table that functions as a [[Translation lookaside buffer|TLB]] with off-chip storage) are always done in big-endian mode. The processor starts in big-endian mode.

In little-endian mode, the three lowest-order bits of the effective address are [[Exclusive or|exclusive-ORed]] with a three bit value selected by the length of the operand. This is enough to appear fully little-endian to normal software. An operating system will see a warped view of the world when it accesses external chips such as video and network hardware. Fixing this warped view requires that the motherboard perform an unconditional 64-bit byte swap on all data entering or leaving the processor. Endianness thus becomes a property of the motherboard. An OS that operates in little-endian mode on a big-endian motherboard must both swap bytes and undo the exclusive-OR when accessing little-endian chips.

[[AltiVec]] operations, despite being 128-bit, are treated as if they were 64-bit. This allows for compatibility with little-endian motherboards that were designed prior to AltiVec.

An interesting side effect of this implementation is that a program can store a 64-bit value (the longest operand format) to memory while in one endian mode, switch modes, and read back the same 64-bit value without seeing a change of byte order. This will not be the case if the motherboard is switched at the same time.

[[Mercury Systems]] and [[Matrox]] ran the PowerPC in little-endian mode. This was done so that PowerPC devices serving as co-processors on PCI boards could share data structures with host computers based on [[x86]]. Both PCI and x86 are little-endian. OS/2 and Windows NT for PowerPC ran the processor in little-endian mode while Solaris, AIX and Linux ran in big endian.<ref>{{cite web| url=http://www.os2museum.com/wp/os2-for-powerpc-tidbits/ |title=OS/2 for PowerPC Tidbits |archive-url=https://web.archive.org/web/20160131121239/http://www.os2museum.com/wp/os2-for-powerpc-tidbits/ |archive-date=January 31, 2016 |date=16 November 2012 |first=Michal |last=Necasek |website=OS/2 Museum}}</ref>

Some of IBM's embedded PowerPC chips use a per-page [[endianness]] bit. None of the previous applies to them.

== Implementations ==
[[File:IBM PPC604e 200.jpg|thumb|IBM [[PowerPC 600#PowerPC 604e|PowerPC 604e]] 200 MHz]]
[[File:broadwaycpu.JPG|thumb|Custom PowerPC CPU from the [[Wii]] video game console]]
[[File:XPC855TZP66D4 3K20A.jpg|thumb|The Freescale XPC855T Service Processor of a [[Sun Fire]] V20z]]

The first implementation of the architecture was the [[PowerPC 601]], released in 1992, based on the RSC, implementing a hybrid of the [[POWER1]] and PowerPC instructions. This allowed the chip to be used by IBM in their existing POWER1-based platforms, although it also meant some slight pain when switching to the 2nd generation "pure" PowerPC designs. Apple continued work on a new line of Macintosh computers based on the chip, and eventually released them as the 601-based ''[[Power Macintosh]]'' on March 14, 1994.

Accelerator cards based on the first-generation PowerPC chips were created for the [[Amiga]] in anticipation for a move to a possible new Amiga platform designed around the PowerPC. The accelerator cards also included either a [[Motorola 68040]] or [[Motorola 68060|68060]] CPU in order to maintain backwards compatibility, as very few apps at the time could run natively on the PPC chips. However, the new machines never materialized, and Commodore subsequently declared bankruptcy. Over a decade later, [[AmigaOS 4]] would be released, which would put the platform permanently on the architecture. OS4 is compatible with those first-generation accelerators, as well as several custom motherboards created for a new incarnation of the Amiga platform.

IBM also had a full line of PowerPC based desktops built and ready to ship; unfortunately, the operating system that IBM had intended to run on these desktops—[[Microsoft]] [[Windows NT]]—was not complete by early 1993, when the machines were ready for marketing. Accordingly, and further because IBM had developed animosity toward Microsoft, IBM decided to port [[OS/2]] to the PowerPC in the form of Workplace OS. This new software platform spent three years (1992 to 1995) in development and was canceled with the December 1995 developer release, because of the disappointing launch of the PowerPC 620. For this reason, the IBM PowerPC desktops did not ship, although the reference design (codenamed Sandalbow) based on the PowerPC 601 CPU was released as an RS/6000 model (''[[Byte (magazine)|Byte]]''{{'}}s April 1994 issue included an extensive article about the Apple and IBM PowerPC desktops).

Apple, which also lacked a PowerPC based OS, took a different route. Utilizing the portability platform yielded by the secret [[Star Trek project]], the company ported the essential pieces of their [[Classic Mac OS|Mac OS]] operating system to the PowerPC architecture, and further wrote a [[Mac 68k emulator|68k emulator]] that could run [[Motorola 68000 family|68k]] based applications and the parts of the OS that had not been rewritten.

The second generation was "pure" and includes the "low end" [[PowerPC 603]] and "high end" [[PowerPC 604]]. The 603 is notable due to its very low cost and power consumption. This was a deliberate design goal on Motorola's part, who used the 603 project to build the basic core for all future generations of PPC chips. Apple tried to use the 603 in a new laptop design but was unable due to the small 8&nbsp;[[Kilobyte|KB]] level 1 cache. The 68000 emulator in the Mac OS could not fit in 8&nbsp;KB and thus slowed the computer drastically.<ref>{{cite journal|url=https://pdfs.semanticscholar.org/9492/040bfd1226a08b25c92539fe4d724d01a5dc.pdf|archive-url=https://web.archive.org/web/20180730110252/https://pdfs.semanticscholar.org/9492/040bfd1226a08b25c92539fe4d724d01a5dc.pdf|url-status=dead|archive-date=July 30, 2018|title=Arthur Revitalizes PowerPC Line|author=Linley Gwennap|journal=[[Microprocessor Report]]|volume=11|issue=2|date=February 27, 1997|s2cid=51808955|quote=The 603’s tiny 8K caches were notoriously poor for Mac OS software, particularly for 68K emulation; even the 603e’s caches cause a significant performance hit at higher clock speeds. Given Arthur’s design target of 250 MHz and up, doubling the caches again made sense.}}</ref><ref>{{cite web |url=http://lowendmac.com/2014/cpus-powerpc-603-and-603e/ |title=CPUs: PowerPC 603 and 603e |last=Jansen |first=Daniel |date=2014 |publisher=Low End Mac |access-date=29 July 2018 |archive-date=October 30, 2018 |archive-url=https://web.archive.org/web/20181030054318/http://lowendmac.com/2014/cpus-powerpc-603-and-603e/ |url-status=live }}</ref> The [[PowerPC 600#PowerPC 603e and 603ev|603e]] solved this problem by having a 16&nbsp;KB [[CPU cache|L1 cache]], which allowed the emulator to run efficiently.

In 1993, developers at IBM's [[Essex Junction, Vermont|Essex Junction, Burlington, Vermont]] facility started to work on a version of the PowerPC that would support the Intel [[x86]] instruction set directly on the CPU. While this was just one of several concurrent power architecture projects that IBM was working on, this chip began to be known inside IBM and by the media as the [[PowerPC 600#PowerPC 615|PowerPC 615]]. Profitability concerns and rumors of performance issues in the switching between the x86 and native PowerPC instruction sets resulted in the project being canceled in 1995 after only a limited number of chips were produced for in-house testing. Aside the rumors, the switching process took only 5 cycles, or the amount of time needed for the processor to empty its instruction pipeline. Microsoft also aided the processor's demise by refusing to support the PowerPC mode.<ref>{{cite web|url=https://www.theregister.co.uk/1998/10/01/microsoft_killed_the_powerpc/|title=Microsoft killed the PowerPC 615|website=The Register|date=October 1, 1998|access-date=August 16, 2009|url-status=live|archive-url=https://web.archive.org/web/20090207090933/http://www.theregister.co.uk/1998/10/01/microsoft_killed_the_powerpc/|archive-date=February 7, 2009|df=mdy-all}}</ref>

The first 64-bit implementation is the [[PowerPC 620]], but it appears to have seen little use because Apple didn't want to buy it and because, with its large die area, it was too costly for the embedded market. It was later and slower than promised, and IBM used their own [[POWER3]] design instead, offering no 64-bit "small" version until the late-2002 introduction of the [[PowerPC 970]]. The 970 is a 64-bit processor derived from the [[POWER4]] server processor. To create it, the POWER4 core was modified to be backward-compatible with 32-bit PowerPC processors, and a vector unit (similar to the [[AltiVec]] extensions in Motorola's 74xx series) was added.

IBM's [[IBM RS64|RS64]] processors are a family of chips implementing the "Amazon" variant of the PowerPC architecture. These processors are used in the [[RS/6000]] and [[IBM AS/400]] computer families; the Amazon architecture includes proprietary extensions used by AS/400.<ref>{{cite magazine|url=http://iprodeveloper.com/systems-management/inside-powerpc|title=Inside the PowerPC AS|date=July 1, 1995|author1=Adam T. Stallman|author2=Frank G. Soltis|magazine=System iNEWS Magazine|archive-url=https://web.archive.org/web/20130831203807/http://iprodeveloper.com/systems-management/inside-powerpc|archive-date=August 31, 2013}}</ref> The POWER4 and later POWER processors implement the Amazon architecture and replaced the RS64 chips in the RS/6000 and AS/400 families.

IBM developed a separate product line called the "4xx" line focused on the embedded market. These designs included the 401, 403, 405, 440, and 460. In 2004, IBM sold their 4xx product line to Applied Micro Circuits Corporation (AMCC). AMCC continues to develop new high performance products, partly based on IBM's technology, along with technology that was developed within AMCC. These products focus on a variety of applications including networking, wireless, storage, printing/imaging and industrial automation.

Numerically, the PowerPC is mostly found in controllers in cars. For the automotive market, Freescale Semiconductor initially offered many variations called the [[Mpc5xx|MPC5xx]] family such as the MPC555, built on a variation of the 601 core called the 8xx and designed in Israel by MSIL (Motorola Silicon Israel Limited). The 601 core is single issue, meaning it can only issue one instruction in a clock cycle. To this they add various bits of custom hardware, to allow for I/O on the one chip. In 2004, the next-generation four-digit [[PowerPC 5000#MPC55xx|55xx]] devices were launched for the automotive market. These use the newer [[PowerPC e200|e200]] series of PowerPC cores.

Networking is another area where embedded PowerPC processors are found in large numbers. MSIL took the [[QUICC]] engine from the [[Freescale 683XX|MC68302]] and made the [[PowerQUICC]] MPC860. This was a very famous processor used in many [[Cisco Systems|Cisco]] edge routers in the late 1990s. Variants of the PowerQUICC include the MPC850, and the MPC823/MPC823e. All variants include a separate RISC microengine called the [[Communication Processor Module|CPM]] that offloads communications processing tasks from the central processor and has functions for [[Direct memory access|DMA]]. The follow-on chip from this family, the MPC8260, has a 603e-based core and a different CPM.

Honda also uses PowerPC processors for its [[ASIMO]] robot.<ref>{{cite news|url=https://www.eetimes.com/latest-robots-fill-helper-entertainer-roles/|title=Latest robots fill helper, entertainer roles|date=28 November 2000|first=Yoshiko|last=Hara|publisher=EETimes.com|access-date=September 1, 2021|archive-date=September 1, 2021|archive-url=https://web.archive.org/web/20210901205052/https://www.eetimes.com/latest-robots-fill-helper-entertainer-roles/|url-status=live}}</ref>

In 2003, [[BAE Systems|BAE Systems Platform Solutions]] delivered the Vehicle-Management Computer for the [[Lockheed Martin F-35 Lightning II|F-35]] fighter jet. This platform consists of dual PowerPCs made by Freescale in a triple redundant setup.<ref>{{cite press release|url=http://news.lockheedmartin.com/2003-05-19-First-Lockheed-Martin-F-35-Joint-Strike-Fighter-Vehicle-Management-Computer-Delivered|title=First Lockheed Martin F-35 Joint Strike Fighter Vehicle-Management Computer Delivered|publisher=[[Lockheed Martin]]|date=May 16, 2003|access-date=January 14, 2018|archive-date=January 15, 2018|archive-url=https://web.archive.org/web/20180115071709/http://news.lockheedmartin.com/2003-05-19-First-Lockheed-Martin-F-35-Joint-Strike-Fighter-Vehicle-Management-Computer-Delivered|url-status=live}}</ref>

[[Aeronautical Development Establishment]] tested a high-performance digital flight control computer, powered by a quadraplex PowerPC-based processor setup on a [[HAL_Tejas#Tejas_Mark_1A|HAL Tejas Mark 1A]] in 2024.<ref>{{Cite news |date=2024-02-21 |title=Tejas combat jet flies successfully with home grown digital flight control computer |url=https://timesofindia.indiatimes.com/india/tejas-combat-jet-successfully-flies-with-home-grown-digital-flight-control-computer/articleshow/107859312.cms |access-date=2024-02-22 |work=The Times of India |issn=0971-8257}}</ref>

== Operating systems ==
Operating systems that work on the PowerPC architecture are generally divided into those that are oriented toward the general-purpose PowerPC systems, and those oriented toward the [[Embedded system|embedded]] PowerPC systems.

===Native===
*[[AmigaOS 4]]
*[[Classic Mac OS]] from [[System 7]].1.2; and [[Copland (operating system)|Copland]]
*[[BeOS]] R5 Pro
**[[Haiku (operating system)|Haiku]], experimental<ref>{{cite web| url = https://download.haiku-os.org/nightly-images/ppc/| title = PowerPC - Unsupported Builds| website = Haiku Files| access-date = January 14, 2022| archive-date = January 14, 2022| archive-url = https://web.archive.org/web/20220114081611/https://download.haiku-os.org/nightly-images/ppc/| url-status = live}}</ref>
*[[IBM i]]; formerly named i5/OS, originally OS/400
*[[MorphOS]]
*[[Plan 9 from Bell Labs|Plan 9]]
*[[Inferno (operating system)|Inferno]]
*[[POSIX]]: [[Unix]], [[Unix-like]]
**[[Rhapsody (operating system)|Rhapsody]] through [[Mac OS X Leopard]] 10.5.8
**[[IBM AIX|AIX]]
**[[Workplace OS]], including a port of [[OS/2]]
**[[FreeBSD]]<ref>{{cite web|url=http://www.freebsd.org/platforms/ppc.html|title=FreeBSD/ppc Project|publisher=Freebsd.org|access-date=August 16, 2009|url-status=live|archive-url=https://web.archive.org/web/20090813165650/http://www.freebsd.org/platforms/ppc.html|archive-date=August 13, 2009|df=mdy-all}}</ref>
**[[NetBSD]]
**[[OpenBSD]], 32-bit macppc<ref>{{cite web|url=http://www.openbsd.org/macppc.html|title=OpenBSD/macppc|publisher=Openbsd.org|access-date=August 16, 2009|url-status=live|archive-url=https://web.archive.org/web/20090706120107/http://www.openbsd.org/macppc.html|archive-date=July 6, 2009|df=mdy-all}}</ref>
**[[Linux]]
***[[Arch Linux]], supported in unofficial port<ref>{{Cite web |title=ArchPOWER - an unofficial port of Archlinux to powerpc64le and riscv64 |url=https://archlinuxpower.org/ |access-date=2024-03-01 |website=archlinuxpower.org}}</ref>
***[[CRUX#CRUX PPC|CRUX PPC]] through 2.0.1.1
***[[Debian]]:
****32-bit ''powerpc'' a released port since ''potato''<ref>{{cite web|url=http://www.debian.org/ports/powerpc/|title=PowerPC Port|publisher=Debian|access-date=August 16, 2009|url-status=live|archive-url=https://web.archive.org/web/20090830041154/http://www.debian.org/ports/powerpc/|archive-date=August 30, 2009|df=mdy-all}}</ref>
****64-bit big-endian ''[[ppc64]]''<ref>{{cite web|url=http://wiki.debian.org/PPC64|title=Debian PPC64 Port|publisher=Debian|access-date=July 4, 2012|url-status=live|archive-url=https://web.archive.org/web/20120627080559/http://wiki.debian.org/PPC64|archive-date=June 27, 2012|df=mdy-all}}</ref> in mostly stalled development
****64-bit little-endian ''[[ppc64]]le'' a released port since ''jessie''
***[[Fedora (operating system)|Fedora]]
***[[Gentoo Linux]], with 32-bit ''ppc'' releases and 64-bit ''[[ppc64]]'' releases<ref>{{cite web|url=https://wiki.gentoo.org/wiki/Project:PowerPC|title=Project:PowerPC|work=Gentoo Wiki|access-date=January 14, 2018|archive-date=January 15, 2018|archive-url=https://web.archive.org/web/20180115071651/https://wiki.gentoo.org/wiki/Project:PowerPC|url-status=live}}</ref>
***[[MintPPC]], support for Old World and New World 32/64-bit Macs based on Linux Mint LXDE and Debian<ref>{{cite web|url=http://www.mintppc.org|title=MintPPC|access-date=October 3, 2010|url-status=live|archive-url=https://web.archive.org/web/20101013025534/http://mintppc.org/|archive-date=October 13, 2010|df=mdy-all}}</ref>
***[[MkLinux]], Mach-kernel based distribution for older Macs, officially launched by Apple
***[[openSUSE]]
***[[Red Hat Enterprise Linux]]<ref>{{Cite web|title = Chapter 1. Architectures|url = https://access.redhat.com/documentation/en-US/Red_Hat_Enterprise_Linux/7/html/7.1_Release_Notes/chap-Red_Hat_Enterprise_Linux-7.1_Release_Notes-Architectures.html|website = access.redhat.com|access-date = 2015-12-06|url-status = live|archive-url = https://web.archive.org/web/20151208172326/https://access.redhat.com/documentation/en-US/Red_Hat_Enterprise_Linux/7/html/7.1_Release_Notes/chap-Red_Hat_Enterprise_Linux-7.1_Release_Notes-Architectures.html|archive-date = December 8, 2015|df = mdy-all}}</ref> 
***[[SUSE Linux Enterprise Server]]
***[[Ubuntu (operating system)|Ubuntu]]<ref>{{cite web|url=https://wiki.ubuntu.com/PowerPCFAQ#head-8d764a92cbe82911913d972b8189698f9f04e6f3|title=PowerPCFAQ - Ubuntu Wiki|publisher=Wiki.ubuntu.com|access-date=August 16, 2009|url-status=live|archive-url=https://web.archive.org/web/20110225062600/https://wiki.ubuntu.com/PowerPCFAQ#head-8d764a92cbe82911913d972b8189698f9f04e6f3|archive-date=February 25, 2011|df=mdy-all}}</ref>
***[[Yellow Dog Linux]], full support for 32/64-bit; PS3
***[[Void Linux]], support in third-party fork<ref>{{cite web |url=https://voidlinux-ppc.org/ |title=Void Linux for PowerPC/Power ISA (unofficial) |access-date=2020-10-27 |archive-date=October 30, 2020 |archive-url=https://web.archive.org/web/20201030072214/https://voidlinux-ppc.org/ |url-status=live }}</ref> for 32-bit and 64-bit (big-endian and little-endian)
**[[Solaris (operating system)|Solaris]] 2.5.1 PowerPC edition on the PReP platform
***[[OpenSolaris]], experimental<ref>{{cite web|url=http://labs.oracle.com/spotlight/2006/2006-06-14-SolarisPPC.html|archive-url=https://web.archive.org/web/20110807061921/http://labs.oracle.com/spotlight/2006/2006-06-14-SolarisPPC.html |archive-date=August 7, 2011|title=Embedded Solaris on PowerPC|publisher=Research.sun.com|date=June 14, 2006| access-date=August 16, 2009}}</ref><ref>{{cite web|url=http://hub.opensolaris.org/bin/view/Project+ppc-dev/WebHome|archive-url=https://web.archive.org/web/20110807060150/http://hub.opensolaris.org/bin/view/Project+ppc-dev/WebHome |archive-date=August 7, 2011| title=Solaris PowerPC Port at OpenSolaris.org|publisher=Opensolaris.org|date=October 2, 2006|access-date= August 16, 2009}}</ref>
*[[JavaOS]]
*[[Windows NT]] 3.5,<ref>{{Cite web|url=https://archive.org/details/NT3.5PPC|title=Windows NT 3.5 for PowerPC|date=November 9, 1994}}</ref> 3.51 and 4.0
*[[ReactOS]], PowerPC port no longer under active development<ref>{{Cite web|title = ReactOS ports - ReactOS Wiki|url = https://www.reactos.org/wiki/ReactOS_ports|website = www.reactos.org|access-date = 2015-12-06|url-status = live|archive-url = https://web.archive.org/web/20160227154523/https://reactos.org/wiki/ReactOS_ports|archive-date = February 27, 2016|df = mdy-all}}</ref>
*[[GameCube]], [[Wii system software|Wii]], and [[Wii U system software|Wii U]] system software
*[[Xbox 360 system software]]
*[[PlayStation 3 system software|CellOS]] for [[PlayStation 3]]
*[[HelenOS]]

=== Embedded ===
*[https://www.mss.ca/m-rtos M-RTOS]
*[[VxWorks]]
*VxWorks 653
*[[Nucleus RTOS]]
*LiveDevices RTA-OSEKLive
*[[OS-9|Microware OS-9]]
*[[MikroTik#RouterOS|MikroTik RouterOS]]
*[[MontaVista Software|MontaVista Linux]]
*[[Wind River Linux]]
*[[QNX]]
*[[Cisco IOS]]
*Cisco AireOS
*[[LynxOS]]
*[[PikeOS]] RTOS and virtualization platform from [[SYSGO]]
*ELinOS embedded Linux
*[[eCos]]
*[[Broadcom]] BCM Tech
*[[RTEMS]]
*BlueCat embedded [[Linux]] from [[LynuxWorks]]
*[[Operating System Embedded]] (OSE) from [[ENEA AB]]
*[[Integrity (operating system)|Integrity]]
*[[Juniper Networks]] [[Junos]] router and switch OS
*[[FreeRTOS]]
*Deos<ref>{{cite web|url=https://www.ddci.com/products_deos_do_178c_arinc_653/|title=DO-178C Certifiable Avionics RTOS with ARINC 653 & FACE Support|website=DDC-I|access-date=January 14, 2018|archive-date=August 8, 2018|archive-url=https://web.archive.org/web/20180808194716/https://www.ddci.com/products_deos_do_178c_arinc_653/|url-status=live}}</ref>
*SCIOPTA<ref>{{cite web|url=http://www.sciopta.com/cpu/cpu.html|title=Supported CPUs|website=SCIOPTA Systems AG|access-date=January 14, 2018|archive-date=January 1, 2018|archive-url=https://web.archive.org/web/20180101001334/http://www.sciopta.com/cpu/cpu.html|url-status=live}}</ref> RTOS, certified according [[IEC61508]], EN50128 and ISO26262
*Embedded PowerPC Operating System by IBM<ref>{{cite web |url=http://www.csit-sun.pub.ro/~cpop/Documentatie_SMP/IBM_PowerPC/750fxQuickStart.pdf |title=PowerPC 750FX Evaluation Kit Quick Setup for Windows |access-date=2018-01-14 |url-status=live |archive-url=https://web.archive.org/web/20170404220556/http://www.csit-sun.pub.ro/~cpop/Documentatie_SMP/IBM_PowerPC/750fxQuickStart.pdf |archive-date=April 4, 2017 |df=mdy-all }}</ref>

== Licensees ==
Companies that have licensed the 64-bit POWER or 32-bit PowerPC from IBM include:

=== 32-bit PowerPC ===
*[[Altera]], [[field-programmable gate array]] (FPGA) manufacturer now [[Intel]]
*[[Apple Inc.|Apple]] ('A' in original [[AIM alliance]]), switched to Intel in early 2006
*[[Applied Micro Circuits Corporation]] (AMCC)
*[[Avago Technologies]]
*[[BAE Systems]] for [[RAD750]] processor, used in spacecraft and planetary landers
*[[Cisco Systems]] for routers
*Culturecom for [[PowerPC 400#V-Dragon|V-Dragon]] CPU
*[[Exponential Technology]]
*[[Kumyoung]] used in [[karaoke]] player CPU (Muzen and Vivaus series)
*[[LSI Logic]]
*[[Motorola]] (was [[Freescale Semiconductor]] now [[NXP]]), as part of the original AIM alliance
*Rapport for [[Kilocore]] 1025 core CPU
*[[Samsung]]
*[[STMicroelectronics]] for the SPC5xx series
*[[Xilinx]], FPGA maker, embedded PowerPC in the Virtex-II Pro, Virtex-4, and Virtex-5 FPGAs

=== 64-bit PowerPC ===
*[[P.A. Semi]]
*[[Microsoft]]
*[[Hindustan Computers Ltd.]]
*[[Sony]]
*[[Freescale Semiconductor]]
*[[Toshiba]]

=== Game consoles ===
{{main|PowerPC based game consoles}}
PowerPC processors were used in a number of now-discontinued [[video game console]]s and [[arcade system boards]]:
*[[Bandai]] for its [[Bandai Pippin]], designed by [[Apple Computer]] (1995)
*[[Konami]], for the Konami Viper arcade hardware<ref>{{cite web |title=Konami Viper Hardware |url=https://www.system16.com/hardware.php?id=584 |website=System 16 |access-date=23 December 2024}}</ref>
*[[Microsoft]], for the [[Xbox 360]] processor, [[Xenon (processor)|Xenon]]<ref name="power-to-the-people">{{cite web|url=http://www.ibm.com/developerworks/power/library/pa-powerppl/|title=POWER To The People|date=March 30, 2004|publisher=IBM|archive-url=https://web.archive.org/web/20130204034335/http://www.ibm.com/developerworks/power/library/pa-powerppl/ |archive-date=2013-02-04}}</ref>
*[[Nintendo]] for the [[GameCube]],<ref name="power-to-the-people"/> [[Wii]], and [[Wii U]] processors
*[[Sega]], for the [[Sega Model 3]] arcade hardware<ref>{{cite web |title=Sega Model 3 Step 1.0 Hardware |url=https://www.system16.com/hardware.php?id=717 |website=System 16 |access-date=8 April 2024}}</ref>
*[[Sony]] and [[Toshiba]], for the [[Cell microprocessor|Cell]] processor (inside the [[PlayStation 3]] and other devices)<ref name="power-to-the-people"/>
*[[Taito]], for the Taito Power-JC<ref>{{cite web |title=Taito PPC JC System Type-C Hardware |url=https://www.system16.com/hardware.php?id=668 |website=System 16 |access-date=27 February 2024}}</ref> and Taito Type Zero hardware<ref>{{cite web |title=Taito Type-Zero Hardware |url=https://www.system16.com/hardware.php?id=673 |website=System 16 |access-date=23 December 2024}}</ref>

=== Desktop computers ===
The Power architecture is currently used in the following desktop computers:

* [[Sam440ep]], Sam440epFlex, based on an AMCC 440ep SoC, built by [[ACube Systems Srl|ACube Systems]]
* [[Sam460ex]], based on an AMCC 460ex SoC, built by ACube Systems
* Nemo motherboard based around PA6T-1682M found in the [[AmigaOne X1000]] from A-EON Technology
* Cyrus motherboard based around Freescale Qoriq P5020 found in the AmigaOne X5000 from A-EON Technology
* Tabor motherboard based around Freescale QorIQ P1022 found in the forthcoming AmigaOne A1222 from A-EON Technology
* Talos II and Blackbird mainboards/workstations, based around the IBM Power9 Sforza architecture, built by Raptor Computing Systems

=== Embedded applications ===
The Power architecture is currently used in the following embedded applications:

* [[National Instruments]] Smart Cameras for machine vision
* Mars rover ''[[Curiosity (rover)|Curiosity]]'' - uses [[RAD750]]
* Mars rover ''[[Perseverance (rover)|Perseverance]]'' - uses [[RAD750]] at 133 MHz<ref>{{cite web|url=https://ai.jpl.nasa.gov/public/documents/papers/rabideau_iwpss2017_prototyping.pdf|title=Prototyping an Onboard Scheduler for the Mars 2020 Rover|publisher=NASA|access-date=July 30, 2020|archive-date=February 18, 2021|archive-url=https://web.archive.org/web/20210218172828/https://ai.jpl.nasa.gov/public/documents/papers/rabideau_iwpss2017_prototyping.pdf|url-status=live}} {{PD-notice}}</ref>
* Space telescope ''[[James Webb Space Telescope]]'' - uses [[RAD750]] at 118 MHz<ref>{{Cite web|last=McComas|first=David|title=Lessons from 30 Years of Flight Software|url=https://ntrs.nasa.gov/api/citations/20150019915/downloads/20150019915.pdf|website=NTRS - NASA Technical Reports Server}}</ref>

== See also ==
*[[Common Hardware Reference Platform]] (CHRP)
*[[OpenPOWER Foundation]]
*[[Power ISA]]
*[[Power Architecture]]
*[[Power Architecture Platform Reference]] (PAPR)
*[[PowerOpen Environment]]
*[[PowerPC Reference Platform]] (PReP)
*[[RTEMS]] real-time operating system
*[[List of PowerPC processors]]
*[[List of PowerPC-based game consoles]]

== References ==
{{Reflist|30em}}

== Further reading ==
*{{cite book |last1=Weiss |first1=Shlomo |last2=Smith |first2=James Edward |title=POWER and PowerPC |date=1994 |publisher=Morgan Kaufmann |isbn=978-1558602793}}
*{{cite book|last=May|first=Cathy|year=1994|title=The PowerPC Architecture: A Specification for A New Family of RISC Processors|publisher=Morgan Kaufmann Publishers|isbn= 978-1-55860-316-5|edition=2nd|display-authors=etal|url=https://archive.org/details/bitsavers_ibmpowerpcCArchitectureMay94_24917510/mode/2up}}
*{{cite book|editor1-first=Steve|editor1-last=Hoxey|editor2-first=Faraydon|editor2-last=Karim|editor3-first=Bill|editor3-last=Hay|editor4-first=Hank|editor4-last=Warren|display-editors=1|title=The PowerPC Compiler Writer's Guide|year=1996|publisher=Warthman Associates|isbn=0-9649654-0-2|url=https://www.warthman.com/projects-IBM-CWG-PowerPC-compiler-writers-guide.htm|archive-url=https://web.archive.org/web/20210408011135/https://www.warthman.com/projects-IBM-CWG-PowerPC-compiler-writers-guide.htm|archive-date=April 8, 2021|url-status=live}} <!-- original web version at https://web.archive.org/web/19970416181905/http://www.chips.ibm.com/products/ppc/Developers/Compiler/cover.htm -->
*{{cite book|publisher=Motorola|url=http://www.freescale.com/files/product/doc/MPCFPE32B.pdf|archive-url=https://web.archive.org/web/20050514011919/http://www.freescale.com/files/product/doc/MPCFPE32B.pdf|archive-date=May 14, 2005|url-status=dead|title=Programming Environments Manual for 32-bit Implementations of the PowerPC Architecture}} A 640-page PDF manual.
*{{cite book|publisher=IBM|year=2000|title=Book E: Enhanced PowerPC Architecture|edition=3rd|url=https://archive.org/details/BookEEnhancedPowerPCArchitecture}}
*{{cite book|first1=Jeff|last1=Duntemann|first2=Ron|last2=Pronk|date=1994|title=Inside the PowerPC Revolution|publisher=Coriolis Group Books|isbn=978-1-883577-04-9}}
*{{cite web|url=http://www-03.ibm.com/systems/p/hardware/whitepapers/power/ppc_arch.html|archive-url=https://web.archive.org/web/20080214120610/http://www-03.ibm.com/systems/p/hardware/whitepapers/power/ppc_arch.html|archive-date=February 14, 2008|url-status=dead|title=PowerPC Architecture}} An IBM article giving POWER and PowerPC history.
*{{cite book |last1=Chakravarty |first1=Dipto |last2=Cannon |first2=Casey |title=PowerPC: Concepts, Architecture, and Design |date=1994 |publisher=McGraw Hill |isbn=9780070111929 |url=https://archive.org/details/powerpcconceptsa0000chak |url-access=registration}}

== External links ==
*[https://openpowerfoundation.org/ OpenPOWER Foundation]
*[https://m.youtube.com/watch?v=kfem6lllSBI Evolution of PowerPC Architecture, lecture by Michael W. Blasgen and Richard Oehler]
*[http://titancity.com/articles/ppc.html PPC Overview] - an overview of PowerPC processors
*[http://www.os2museum.com/wp/os2-history/os2-warp-powerpc-edition/ OS/2 Warp, PowerPC Edition] review by Michal Necasek
*[https://web.archive.org/web/20120310172455/http://meld.org/library/education/powerpc-architectures PowerPC Architecture History Diagram]
*[http://oscomp.hu/bgafc/oses4ppc.php A quite extensive list of operating systems supporting PowerPC processors]

{{Motorola processors}}
{{RISC-based processor architectures}}
{{Microcontrollers}}
{{CPU technologies}}
{{Authority control}}

{{DEFAULTSORT:Powerpc}}
[[Category:PowerPC architecture| ]]
[[Category:Computer-related introductions in 1991]]